Camera_driver: remove legacy driver

resources/Camera_driver/Camera_driver.ioc

@@ -1,210 +0,0 @@
-#MicroXplorer Configuration settings - do not modify
-Dma.Request0=USART2_TX
-Dma.Request1=SPI1_RX
-Dma.RequestsNb=2
-Dma.SPI1_RX.1.Direction=DMA_PERIPH_TO_MEMORY
-Dma.SPI1_RX.1.Instance=DMA2_Channel3
-Dma.SPI1_RX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
-Dma.SPI1_RX.1.MemInc=DMA_MINC_ENABLE
-Dma.SPI1_RX.1.Mode=DMA_NORMAL
-Dma.SPI1_RX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
-Dma.SPI1_RX.1.PeriphInc=DMA_PINC_DISABLE
-Dma.SPI1_RX.1.Priority=DMA_PRIORITY_LOW
-Dma.SPI1_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
-Dma.USART2_TX.0.Direction=DMA_MEMORY_TO_PERIPH
-Dma.USART2_TX.0.Instance=DMA1_Channel7
-Dma.USART2_TX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
-Dma.USART2_TX.0.MemInc=DMA_MINC_ENABLE
-Dma.USART2_TX.0.Mode=DMA_NORMAL
-Dma.USART2_TX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
-Dma.USART2_TX.0.PeriphInc=DMA_PINC_DISABLE
-Dma.USART2_TX.0.Priority=DMA_PRIORITY_LOW
-Dma.USART2_TX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
-File.Version=6
-I2C1.IPParameters=Timing
-I2C1.Timing=0x00707CBB
-KeepUserPlacement=false
-Mcu.Family=STM32L4
-Mcu.IP0=DMA
-Mcu.IP1=I2C1
-Mcu.IP2=NVIC
-Mcu.IP3=RCC
-Mcu.IP4=SPI1
-Mcu.IP5=SYS
-Mcu.IP6=USART2
-Mcu.IPNb=7
-Mcu.Name=STM32L432K(B-C)Ux
-Mcu.Package=UFQFPN32
-Mcu.Pin0=PC14-OSC32_IN (PC14)
-Mcu.Pin1=PC15-OSC32_OUT (PC15)
-Mcu.Pin10=PA14 (JTCK-SWCLK)
-Mcu.Pin11=PA15 (JTDI)
-Mcu.Pin12=PB3 (JTDO-TRACESWO)
-Mcu.Pin13=VP_SYS_VS_Systick
-Mcu.Pin2=PA0
-Mcu.Pin3=PA2
-Mcu.Pin4=PA5
-Mcu.Pin5=PA6
-Mcu.Pin6=PA7
-Mcu.Pin7=PA9
-Mcu.Pin8=PA10
-Mcu.Pin9=PA13 (JTMS-SWDIO)
-Mcu.PinsNb=14
-Mcu.ThirdPartyNb=0
-Mcu.UserConstants=
-Mcu.UserName=STM32L432KCUx
-MxCube.Version=6.2.1
-MxDb.Version=DB.6.0.21
-NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
-NVIC.DMA1_Channel7_IRQn=true\:0\:0\:false\:false\:true\:false\:true
-NVIC.DMA2_Channel3_IRQn=true\:0\:0\:false\:false\:true\:false\:true
-NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
-NVIC.ForceEnableDMAVector=true
-NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
-NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
-NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
-NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
-NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
-NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
-NVIC.SysTick_IRQn=true\:0\:0\:true\:false\:true\:true\:true
-NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
-PA0.GPIOParameters=GPIO_Label
-PA0.GPIO_Label=MCO [High speed clock in]
-PA0.Locked=true
-PA0.Mode=HSE-External-Clock-Source-for-LittleOrca
-PA0.Signal=RCC_CK_IN
-PA10.Mode=I2C
-PA10.Signal=I2C1_SDA
-PA13\ (JTMS-SWDIO).GPIOParameters=GPIO_Label
-PA13\ (JTMS-SWDIO).GPIO_Label=SWDIO
-PA13\ (JTMS-SWDIO).Locked=true
-PA13\ (JTMS-SWDIO).Mode=Serial_Wire
-PA13\ (JTMS-SWDIO).Signal=SYS_JTMS-SWDIO
-PA14\ (JTCK-SWCLK).GPIOParameters=GPIO_Label
-PA14\ (JTCK-SWCLK).GPIO_Label=SWCLK
-PA14\ (JTCK-SWCLK).Locked=true
-PA14\ (JTCK-SWCLK).Mode=Serial_Wire
-PA14\ (JTCK-SWCLK).Signal=SYS_JTCK-SWCLK
-PA15\ (JTDI).GPIOParameters=GPIO_Label
-PA15\ (JTDI).GPIO_Label=VCP_RX
-PA15\ (JTDI).Locked=true
-PA15\ (JTDI).Mode=Asynchronous
-PA15\ (JTDI).Signal=USART2_RX
-PA2.GPIOParameters=GPIO_Label
-PA2.GPIO_Label=VCP_TX
-PA2.Locked=true
-PA2.Mode=Asynchronous
-PA2.Signal=USART2_TX
-PA5.Locked=true
-PA5.Mode=Full_Duplex_Master
-PA5.Signal=SPI1_SCK
-PA6.Mode=Full_Duplex_Master
-PA6.Signal=SPI1_MISO
-PA7.Mode=Full_Duplex_Master
-PA7.Signal=SPI1_MOSI
-PA9.Mode=I2C
-PA9.Signal=I2C1_SCL
-PB3\ (JTDO-TRACESWO).GPIOParameters=GPIO_Label
-PB3\ (JTDO-TRACESWO).GPIO_Label=LD3 [Green]
-PB3\ (JTDO-TRACESWO).Locked=true
-PB3\ (JTDO-TRACESWO).Signal=GPIO_Output
-PC14-OSC32_IN\ (PC14).Locked=true
-PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator
-PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN
-PC15-OSC32_OUT\ (PC15).Locked=true
-PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator
-PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT
-PinOutPanel.RotationAngle=0
-ProjectManager.AskForMigrate=true
-ProjectManager.BackupPrevious=false
-ProjectManager.CompilerOptimize=6
-ProjectManager.ComputerToolchain=false
-ProjectManager.CoupleFile=false
-ProjectManager.CustomerFirmwarePackage=
-ProjectManager.DefaultFWLocation=true
-ProjectManager.DeletePrevious=true
-ProjectManager.DeviceId=STM32L432KCUx
-ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.17.2
-ProjectManager.FreePins=false
-ProjectManager.HalAssertFull=false
-ProjectManager.HeapSize=0x200
-ProjectManager.KeepUserCode=true
-ProjectManager.LastFirmware=true
-ProjectManager.LibraryCopy=0
-ProjectManager.MainLocation=Src
-ProjectManager.NoMain=false
-ProjectManager.PreviousToolchain=
-ProjectManager.ProjectBuild=false
-ProjectManager.ProjectFileName=Camera_driver.ioc
-ProjectManager.ProjectName=Camera_driver
-ProjectManager.RegisterCallBack=
-ProjectManager.StackSize=0x400
-ProjectManager.TargetToolchain=Makefile
-ProjectManager.ToolChainLocation=
-ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true,6-MX_USART2_UART_Init-USART2-false-HAL-true
-RCC.48CLKFreq_Value=24000000
-RCC.AHBFreq_Value=32000000
-RCC.APB1Freq_Value=32000000
-RCC.APB1TimFreq_Value=32000000
-RCC.APB2Freq_Value=32000000
-RCC.APB2TimFreq_Value=32000000
-RCC.CortexFreq_Value=32000000
-RCC.FCLKCortexFreq_Value=32000000
-RCC.FamilyName=M
-RCC.HCLKFreq_Value=32000000
-RCC.HSE_VALUE=8000000
-RCC.HSI16_VALUE=16000000
-RCC.HSI48_VALUE=48000000
-RCC.HSI_VALUE=16000000
-RCC.I2C1Freq_Value=32000000
-RCC.I2C2Freq_Value=16000000
-RCC.I2C3Freq_Value=32000000
-RCC.IPParameters=48CLKFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI16_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LCDFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIMFreq_Value,LPUART1Freq_Value,LPUARTFreq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MCOPinFreq_Value,MSI_VALUE,PLLCLKFreq_Value,PLLMUL,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PWRFreq_Value,RTCFreq_Value,RTCHSEDivFreq_Value,SAI1Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TIMFreq_Value,TimerFreq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,WatchDogFreq_Value
-RCC.LCDFreq_Value=37000
-RCC.LPTIM1Freq_Value=32000000
-RCC.LPTIM2Freq_Value=32000000
-RCC.LPTIMFreq_Value=32000000
-RCC.LPUART1Freq_Value=32000000
-RCC.LPUARTFreq_Value=32000000
-RCC.LSCOPinFreq_Value=32000
-RCC.LSI_VALUE=32000
-RCC.MCO1PinFreq_Value=32000000
-RCC.MCOPinFreq_Value=32000000
-RCC.MSI_VALUE=4000000
-RCC.PLLCLKFreq_Value=32000000
-RCC.PLLMUL=RCC_PLLMUL_4
-RCC.PLLN=16
-RCC.PLLPoutputFreq_Value=9142857.142857144
-RCC.PLLQoutputFreq_Value=32000000
-RCC.PLLRCLKFreq_Value=32000000
-RCC.PLLSAI1PoutputFreq_Value=4571428.571428572
-RCC.PLLSAI1QoutputFreq_Value=16000000
-RCC.PLLSAI1RoutputFreq_Value=16000000
-RCC.PWRFreq_Value=32000000
-RCC.RTCFreq_Value=32000
-RCC.RTCHSEDivFreq_Value=4000000
-RCC.SAI1Freq_Value=4571428.571428572
-RCC.SWPMI1Freq_Value=32000000
-RCC.SYSCLKFreq_VALUE=32000000
-RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
-RCC.TIMFreq_Value=32000000
-RCC.TimerFreq_Value=32000000
-RCC.USART1Freq_Value=32000000
-RCC.USART2Freq_Value=32000000
-RCC.USART3Freq_Value=16000000
-RCC.VCOInputFreq_Value=4000000
-RCC.VCOOutputFreq_Value=64000000
-RCC.VCOSAI1OutputFreq_Value=32000000
-RCC.WatchDogFreq_Value=32000
-SPI1.CalculateBaudRate=16.0 MBits/s
-SPI1.Direction=SPI_DIRECTION_2LINES
-SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
-SPI1.Mode=SPI_MODE_MASTER
-SPI1.VirtualType=VM_MASTER
-USART2.IPParameters=VirtualMode-Asynchronous
-USART2.VirtualMode-Asynchronous=VM_ASYNC
-VP_SYS_VS_Systick.Mode=SysTick
-VP_SYS_VS_Systick.Signal=SYS_VS_Systick
-board=NUCLEO-L432KC
-boardIOC=true

resources/Camera_driver/Inc/main.h

@@ -7,13 +7,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2022 STMicroelectronics.
+  * Copyright (c) 2023 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
   */
@@ -58,18 +57,15 @@ void Error_Handler(void);
 /* USER CODE END EFP */
 
 /* Private defines -----------------------------------------------------------*/
-#define MCO_Pin GPIO_PIN_0
+#define CAMERA_EN_Pin GPIO_PIN_4
-#define MCO_GPIO_Port GPIOA
+#define CAMERA_EN_GPIO_Port GPIOA
-#define VCP_TX_Pin GPIO_PIN_2
+#define CAMERA_CS_Pin GPIO_PIN_0
-#define VCP_TX_GPIO_Port GPIOA
+#define CAMERA_CS_GPIO_Port GPIOB
-#define SWDIO_Pin GPIO_PIN_13
+#define LED1_Pin GPIO_PIN_15
-#define SWDIO_GPIO_Port GPIOA
+#define LED1_GPIO_Port GPIOB
-#define SWCLK_Pin GPIO_PIN_14
+#define LED2_Pin GPIO_PIN_8
-#define SWCLK_GPIO_Port GPIOA
+#define LED2_GPIO_Port GPIOA
-#define VCP_RX_Pin GPIO_PIN_15
+
-#define VCP_RX_GPIO_Port GPIOA
-#define LD3_Pin GPIO_PIN_3
-#define LD3_GPIO_Port GPIOB
 /* USER CODE BEGIN Private defines */
 
 /* USER CODE END Private defines */
@@ -79,5 +75,3 @@ void Error_Handler(void);
 #endif
 
 #endif /* __MAIN_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

resources/Camera_driver/Inc/stm32l4xx_hal_conf.h

@@ -1,3 +1,4 @@
+/* USER CODE BEGIN Header */
 /**
   ******************************************************************************
   * @file    stm32l4xx_hal_conf.h
@@ -8,16 +9,16 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
   */
+/* USER CODE END Header */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef STM32L4xx_HAL_CONF_H
@@ -181,7 +182,7 @@
   */
 
 #define  VDD_VALUE					  3300U /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            0U    /*!< tick interrupt priority */
+#define  TICK_INT_PRIORITY            15U    /*!< tick interrupt priority */
 #define  USE_RTOS                     0U
 #define  PREFETCH_ENABLE              0U
 #define  INSTRUCTION_CACHE_ENABLE     1U
@@ -479,5 +480,3 @@
 #endif
 
 #endif /* STM32L4xx_HAL_CONF_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

resources/Camera_driver/Inc/stm32l4xx_it.h

@@ -6,13 +6,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2022 STMicroelectronics.
+  * Copyright (c) 2023 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
   *
  ******************************************************************************
   */
@@ -56,8 +55,8 @@ void SVC_Handler(void);
 void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
-void DMA1_Channel7_IRQHandler(void);
+void DMA1_Channel2_IRQHandler(void);
-void DMA2_Channel3_IRQHandler(void);
+void DMA1_Channel3_IRQHandler(void);
 /* USER CODE BEGIN EFP */
 
 /* USER CODE END EFP */
@@ -67,5 +66,3 @@ void DMA2_Channel3_IRQHandler(void);
 #endif
 
 #endif /* __STM32L4xx_IT_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

resources/Camera_driver/Makefile

@@ -1,5 +1,5 @@
 ##########################################################################################################################
-# File automatically-generated by tool: [projectgenerator] version: [3.13.0-B3] date: [Fri Aug 12 09:52:20 CEST 2022]
+# File automatically-generated by tool: [projectgenerator] version: [3.18.0-B7] date: [Mon Jan 23 20:54:47 CET 2023] 
 ##########################################################################################################################
 
 # ------------------------------------------------
@@ -13,7 +13,7 @@
 ######################################
 # target
 ######################################
-TARGET = Camera_driver
+TARGET = FC_camera
 
 
 ######################################
@@ -67,7 +67,7 @@ Src/system_stm32l4xx.c
 
 # ASM sources
 ASM_SOURCES =  \
-startup_stm32l432xx.s
+startup_stm32l452xx.s
 
 
 #######################################
@@ -107,25 +107,21 @@ AS_DEFS =
 C_DEFS =  \
 -DSTM32_L4 \
 -DUSE_HAL_DRIVER \
--DSTM32L432xx
+-DSTM32L452xx
 
 
 # AS includes
 AS_INCLUDES =
 
-ALOHAL_INC := $(addprefix -I,$(shell find alohal -type d -print))
-
 # C includes
 C_INCLUDES =  \
--I$(ALOHAL_INC) \
--Ialohal \
--I. \
 -IInc \
 -IDrivers/STM32L4xx_HAL_Driver/Inc \
 -IDrivers/STM32L4xx_HAL_Driver/Inc/Legacy \
 -IDrivers/CMSIS/Device/ST/STM32L4xx/Include \
--IDrivers/CMSIS/Include
+-IDrivers/CMSIS/Include \
-
+-ICamera_driver \
+-IApp
 
 # compile gcc flags
 ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
@@ -149,7 +145,7 @@ $(eval CPP_SOURCES=$(shell  $(CC) $(C_INCLUDES) $(C_DEFS) -MM Src/main.c | sed '
 # LDFLAGS
 #######################################
 # link script
-LDSCRIPT = STM32L432KCUx_FLASH.ld
+LDSCRIPT = STM32L452CEUx_FLASH.ld
 
 # libraries
 LIBS = -lc -lm -lnosys

resources/Camera_driver/STM32L432KCUx_FLASH.ld

@@ -1,203 +0,0 @@
-/*
-******************************************************************************
-**
-
-**  File        : LinkerScript.ld
-**
-**  Author		: Auto-generated by System Workbench for STM32
-**
-**  Abstract    : Linker script for STM32L432KCUx series
-**                256Kbytes FLASH and 64Kbytes RAM
-**
-**                Set heap size, stack size and stack location according
-**                to application requirements.
-**
-**                Set memory bank area and size if external memory is used.
-**
-**  Target      : STMicroelectronics STM32
-**
-**  Distribution: The file is distributed “as is,” without any warranty
-**                of any kind.
-**
-*****************************************************************************
-** @attention
-**
-** <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
-**
-** Redistribution and use in source and binary forms, with or without modification,
-** are permitted provided that the following conditions are met:
-**   1. Redistributions of source code must retain the above copyright notice,
-**      this list of conditions and the following disclaimer.
-**   2. Redistributions in binary form must reproduce the above copyright notice,
-**      this list of conditions and the following disclaimer in the documentation
-**      and/or other materials provided with the distribution.
-**   3. Neither the name of STMicroelectronics nor the names of its contributors
-**      may be used to endorse or promote products derived from this software
-**      without specific prior written permission.
-**
-** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20010000;    /* end of RAM */
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200;      /* required amount of heap  */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 64K
-FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 256K
-}
-
-/* Define output sections */
-SECTIONS
-{
-  /* The startup code goes first into FLASH */
-  .isr_vector :
-  {
-    . = ALIGN(8);
-    KEEP(*(.isr_vector)) /* Startup code */
-    . = ALIGN(8);
-  } >FLASH
-
-  /* The program code and other data goes into FLASH */
-  .text :
-  {
-    . = ALIGN(8);
-    *(.text)           /* .text sections (code) */
-    *(.text*)          /* .text* sections (code) */
-    *(.glue_7)         /* glue arm to thumb code */
-    *(.glue_7t)        /* glue thumb to arm code */
-    *(.eh_frame)
-
-    KEEP (*(.init))
-    KEEP (*(.fini))
-
-    . = ALIGN(8);
-    _etext = .;        /* define a global symbols at end of code */
-  } >FLASH
-
-  /* Constant data goes into FLASH */
-  .rodata :
-  {
-    . = ALIGN(8);
-    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
-    . = ALIGN(8);
-  } >FLASH
-
-  .ARM.extab   : 
-  { 
-  . = ALIGN(8);
-  *(.ARM.extab* .gnu.linkonce.armextab.*)
-  . = ALIGN(8);
-  } >FLASH
-  .ARM : {
-	. = ALIGN(8);
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-	. = ALIGN(8);
-  } >FLASH
-
-  .preinit_array     :
-  {
-	. = ALIGN(8);
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-	. = ALIGN(8);
-  } >FLASH
-  
-  .init_array :
-  {
-	. = ALIGN(8);
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-	. = ALIGN(8);
-  } >FLASH
-  .fini_array :
-  {
-	. = ALIGN(8);
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-	. = ALIGN(8);
-  } >FLASH
-
-  /* used by the startup to initialize data */
-  _sidata = LOADADDR(.data);
-
-  /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
-  {
-    . = ALIGN(8);
-    _sdata = .;        /* create a global symbol at data start */
-    *(.data)           /* .data sections */
-    *(.data*)          /* .data* sections */
-
-    . = ALIGN(8);
-    _edata = .;        /* define a global symbol at data end */
-  } >RAM AT> FLASH
-
-  
-  /* Uninitialized data section */
-  . = ALIGN(4);
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss secion */
-    _sbss = .;         /* define a global symbol at bss start */
-    __bss_start__ = _sbss;
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-
-    . = ALIGN(4);
-    _ebss = .;         /* define a global symbol at bss end */
-    __bss_end__ = _ebss;
-  } >RAM
-
-  /* User_heap_stack section, used to check that there is enough RAM left */
-  ._user_heap_stack :
-  {
-    . = ALIGN(8);
-    PROVIDE ( end = . );
-    PROVIDE ( _end = . );
-    . = . + _Min_Heap_Size;
-    . = . + _Min_Stack_Size;
-    . = ALIGN(8);
-  } >RAM
-
-  
-
-  /* Remove information from the standard libraries */
-  /DISCARD/ :
-  {
-    libc.a ( * )
-    libm.a ( * )
-    libgcc.a ( * )
-  }
-
-  .ARM.attributes 0 : { *(.ARM.attributes) }
-}
-
-

resources/Camera_driver/Src/main.c

@@ -1,4 +1,5 @@
 /* USER CODE BEGIN Header */
+
 /**
   ******************************************************************************
   * @file           : main.c
@@ -6,13 +7,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2022 STMicroelectronics.
+  * Copyright (c) 2023 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
   */
@@ -22,7 +22,10 @@
 
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
-
+#include "SPI_camera.hpp"
+#include "OV2640.hpp"
+#include "OV2640_regs.hpp"
+#include "butcube_imager.hpp"
 /* USER CODE END Includes */
 
 /* Private typedef -----------------------------------------------------------*/
@@ -44,9 +47,10 @@ I2C_HandleTypeDef hi2c1;
 
 SPI_HandleTypeDef hspi1;
 DMA_HandleTypeDef hdma_spi1_rx;
+DMA_HandleTypeDef hdma_spi1_tx;
 
-UART_HandleTypeDef huart2;
+UART_HandleTypeDef huart1;
-DMA_HandleTypeDef hdma_usart2_tx;
+UART_HandleTypeDef huart3;
 
 /* USER CODE BEGIN PV */
 
@@ -58,7 +62,8 @@ static void MX_GPIO_Init(void);
 static void MX_DMA_Init(void);
 static void MX_I2C1_Init(void);
 static void MX_SPI1_Init(void);
-static void MX_USART2_UART_Init(void);
+static void MX_USART1_UART_Init(void);
+static void MX_USART3_UART_Init(void);
 /* USER CODE BEGIN PFP */
 
 /* USER CODE END PFP */
@@ -66,16 +71,26 @@ static void MX_USART2_UART_Init(void);
 /* Private user code ---------------------------------------------------------*/
 /* USER CODE BEGIN 0 */
 
+void Image_capture(OV2640 *camera, ButCube_imager *transmitter){
+    HAL_GPIO_TogglePin(LED1_GPIO_Port, LED1_Pin);
+
+    camera->Init(OV2640_320x240_JPEG);
+
+    HAL_Delay(1000);
+
+    camera->Capture();
+    transmitter->Transmit(camera->Image_data());
+    HAL_Delay(1000);
+}
+
 /* USER CODE END 0 */
 
 /**
   * @brief  The application entry point.
   * @retval int
   */
-int main(void)
+int main(void){
-{
     /* USER CODE BEGIN 1 */
-
     /* USER CODE END 1 */
 
     /* MCU Configuration--------------------------------------------------------*/
@@ -84,14 +99,12 @@ int main(void)
     HAL_Init();
 
     /* USER CODE BEGIN Init */
-
     /* USER CODE END Init */
 
     /* Configure the system clock */
     SystemClock_Config();
 
     /* USER CODE BEGIN SysInit */
-
     /* USER CODE END SysInit */
 
     /* Initialize all configured peripherals */
@@ -99,55 +112,78 @@ int main(void)
     MX_DMA_Init();
     MX_I2C1_Init();
     MX_SPI1_Init();
-  MX_USART2_UART_Init();
+    MX_USART1_UART_Init();
+    MX_USART3_UART_Init();
     /* USER CODE BEGIN 2 */
 
+    // Initialize SPI clock
+    uint8_t empty = 0x00;
+    HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_RESET);
+    HAL_SPI_Transmit(&hspi1, &empty, 1, HAL_MAX_DELAY);
+    HAL_SPI_Receive(&hspi1, (uint8_t *) &empty, 1, HAL_MAX_DELAY);
+    HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_SET);
+
+    // Initialize LEDs
+    HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_SET);
+
+    HAL_Delay(500);
+
+    ButCube_imager *transmitter = new ButCube_imager();
+    transmitter->Add_output(huart1);
+    transmitter->Add_output(huart3);
+    transmitter->Camera_power(true);
+
+    // Wait for power rail to stabilize
+    HAL_Delay(1000);
+
+    OV2640 *camera = new OV2640(hi2c1, 0x60, hspi1, SPI_camera::Chip_select_pin{ GPIOB, GPIO_PIN_0 });
+
     /* USER CODE END 2 */
 
     /* Infinite loop */
     /* USER CODE BEGIN WHILE */
-  while (1)
+    while (1) {
-  {
         /* USER CODE END WHILE */
 
         /* USER CODE BEGIN 3 */
+        Image_capture(camera, transmitter);
     }
     /* USER CODE END 3 */
-}
+} // main
 
 /**
   * @brief System Clock Configuration
   * @retval None
   */
-void SystemClock_Config(void)
+void SystemClock_Config(void){
-{
     RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
     RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
-  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 
-  /** Configure LSE Drive Capability
+    /** Configure the main internal regulator output voltage
     */
-  HAL_PWR_EnableBkUpAccess();
+    if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) {
-  __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
+        Error_Handler();
+    }
+
     /** Initializes the RCC Oscillators according to the specified parameters
     * in the RCC_OscInitTypeDef structure.
     */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI;
+    RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_MSI;
-  RCC_OscInitStruct.LSEState = RCC_LSE_ON;
     RCC_OscInitStruct.MSIState            = RCC_MSI_ON;
     RCC_OscInitStruct.MSICalibrationValue = 0;
     RCC_OscInitStruct.MSIClockRange       = RCC_MSIRANGE_6;
     RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
     RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_MSI;
     RCC_OscInitStruct.PLL.PLLM            = 1;
-  RCC_OscInitStruct.PLL.PLLN = 16;
+    RCC_OscInitStruct.PLL.PLLN            = 40;
     RCC_OscInitStruct.PLL.PLLP            = RCC_PLLP_DIV7;
     RCC_OscInitStruct.PLL.PLLQ            = RCC_PLLQ_DIV2;
     RCC_OscInitStruct.PLL.PLLR            = RCC_PLLR_DIV2;
-  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
-  {
         Error_Handler();
     }
+
     /** Initializes the CPU, AHB and APB buses clocks
     */
     RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
@@ -157,36 +193,17 @@ void SystemClock_Config(void)
     RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
     RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 
-  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
-  {
         Error_Handler();
     }
-  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2|RCC_PERIPHCLK_I2C1;
+} // SystemClock_Config
-  PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
-  PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure the main internal regulator output voltage
-  */
-  if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Enable MSI Auto calibration
-  */
-  HAL_RCCEx_EnableMSIPLLMode();
-}
 
 /**
   * @brief I2C1 Initialization Function
   * @param None
   * @retval None
   */
-static void MX_I2C1_Init(void)
+static void MX_I2C1_Init(void){
-{
-
     /* USER CODE BEGIN I2C1_Init 0 */
 
     /* USER CODE END I2C1_Init 0 */
@@ -195,7 +212,7 @@ static void MX_I2C1_Init(void)
 
     /* USER CODE END I2C1_Init 1 */
     hi2c1.Instance              = I2C1;
-  hi2c1.Init.Timing = 0x00707CBB;
+    hi2c1.Init.Timing           = 0x10909CEC;
     hi2c1.Init.OwnAddress1      = 0;
     hi2c1.Init.AddressingMode   = I2C_ADDRESSINGMODE_7BIT;
     hi2c1.Init.DualAddressMode  = I2C_DUALADDRESS_DISABLE;
@@ -203,36 +220,32 @@ static void MX_I2C1_Init(void)
     hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
     hi2c1.Init.GeneralCallMode  = I2C_GENERALCALL_DISABLE;
     hi2c1.Init.NoStretchMode    = I2C_NOSTRETCH_DISABLE;
-  if (HAL_I2C_Init(&hi2c1) != HAL_OK)
+    if (HAL_I2C_Init(&hi2c1) != HAL_OK) {
-  {
         Error_Handler();
     }
+
     /** Configure Analogue filter
     */
-  if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
+    if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK) {
-  {
         Error_Handler();
     }
+
     /** Configure Digital filter
     */
-  if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
+    if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK) {
-  {
         Error_Handler();
     }
     /* USER CODE BEGIN I2C1_Init 2 */
 
     /* USER CODE END I2C1_Init 2 */
-
+} // MX_I2C1_Init
-}
 
 /**
   * @brief SPI1 Initialization Function
   * @param None
   * @retval None
   */
-static void MX_SPI1_Init(void)
+static void MX_SPI1_Init(void){
-{
-
     /* USER CODE BEGIN SPI1_Init 0 */
 
     /* USER CODE END SPI1_Init 0 */
@@ -244,80 +257,101 @@ static void MX_SPI1_Init(void)
     hspi1.Instance               = SPI1;
     hspi1.Init.Mode              = SPI_MODE_MASTER;
     hspi1.Init.Direction         = SPI_DIRECTION_2LINES;
-  hspi1.Init.DataSize = SPI_DATASIZE_4BIT;
+    hspi1.Init.DataSize          = SPI_DATASIZE_8BIT;
     hspi1.Init.CLKPolarity       = SPI_POLARITY_LOW;
     hspi1.Init.CLKPhase          = SPI_PHASE_1EDGE;
     hspi1.Init.NSS               = SPI_NSS_SOFT;
-  hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
+    hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
     hspi1.Init.FirstBit          = SPI_FIRSTBIT_MSB;
     hspi1.Init.TIMode            = SPI_TIMODE_DISABLE;
     hspi1.Init.CRCCalculation    = SPI_CRCCALCULATION_DISABLE;
     hspi1.Init.CRCPolynomial     = 7;
     hspi1.Init.CRCLength         = SPI_CRC_LENGTH_DATASIZE;
     hspi1.Init.NSSPMode          = SPI_NSS_PULSE_ENABLE;
-  if (HAL_SPI_Init(&hspi1) != HAL_OK)
+    if (HAL_SPI_Init(&hspi1) != HAL_OK) {
-  {
         Error_Handler();
     }
     /* USER CODE BEGIN SPI1_Init 2 */
 
     /* USER CODE END SPI1_Init 2 */
-
 }
 
 /**
-  * @brief USART2 Initialization Function
+  * @brief USART1 Initialization Function
   * @param None
   * @retval None
   */
-static void MX_USART2_UART_Init(void)
+static void MX_USART1_UART_Init(void){
-{
+    /* USER CODE BEGIN USART1_Init 0 */
-
+
-  /* USER CODE BEGIN USART2_Init 0 */
+    /* USER CODE END USART1_Init 0 */
-
+
-  /* USER CODE END USART2_Init 0 */
+    /* USER CODE BEGIN USART1_Init 1 */
-
+
-  /* USER CODE BEGIN USART2_Init 1 */
+    /* USER CODE END USART1_Init 1 */
-
+    huart1.Instance                    = USART1;
-  /* USER CODE END USART2_Init 1 */
+    huart1.Init.BaudRate               = 115200;
-  huart2.Instance = USART2;
+    huart1.Init.WordLength             = UART_WORDLENGTH_8B;
-  huart2.Init.BaudRate = 115200;
+    huart1.Init.StopBits               = UART_STOPBITS_1;
-  huart2.Init.WordLength = UART_WORDLENGTH_8B;
+    huart1.Init.Parity                 = UART_PARITY_NONE;
-  huart2.Init.StopBits = UART_STOPBITS_1;
+    huart1.Init.Mode                   = UART_MODE_TX_RX;
-  huart2.Init.Parity = UART_PARITY_NONE;
+    huart1.Init.HwFlowCtl              = UART_HWCONTROL_NONE;
-  huart2.Init.Mode = UART_MODE_TX_RX;
+    huart1.Init.OverSampling           = UART_OVERSAMPLING_16;
-  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+    huart1.Init.OneBitSampling         = UART_ONE_BIT_SAMPLE_DISABLE;
-  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
+    huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
-  huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+    if (HAL_UART_Init(&huart1) != HAL_OK) {
-  huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
-  if (HAL_UART_Init(&huart2) != HAL_OK)
-  {
         Error_Handler();
     }
-  /* USER CODE BEGIN USART2_Init 2 */
+    /* USER CODE BEGIN USART1_Init 2 */
 
-  /* USER CODE END USART2_Init 2 */
+    /* USER CODE END USART1_Init 2 */
+}
+
+/**
+  * @brief USART3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART3_UART_Init(void){
+    /* USER CODE BEGIN USART3_Init 0 */
+
+    /* USER CODE END USART3_Init 0 */
+
+    /* USER CODE BEGIN USART3_Init 1 */
+
+    /* USER CODE END USART3_Init 1 */
+    huart3.Instance                    = USART3;
+    huart3.Init.BaudRate               = 115200;
+    huart3.Init.WordLength             = UART_WORDLENGTH_8B;
+    huart3.Init.StopBits               = UART_STOPBITS_1;
+    huart3.Init.Parity                 = UART_PARITY_NONE;
+    huart3.Init.Mode                   = UART_MODE_TX_RX;
+    huart3.Init.HwFlowCtl              = UART_HWCONTROL_NONE;
+    huart3.Init.OverSampling           = UART_OVERSAMPLING_16;
+    huart3.Init.OneBitSampling         = UART_ONE_BIT_SAMPLE_DISABLE;
+    huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+    if (HAL_UART_Init(&huart3) != HAL_OK) {
+        Error_Handler();
+    }
+    /* USER CODE BEGIN USART3_Init 2 */
 
+    /* USER CODE END USART3_Init 2 */
 }
 
 /**
   * Enable DMA controller clock
   */
-static void MX_DMA_Init(void)
+static void MX_DMA_Init(void){
-{
-
     /* DMA controller clock enable */
     __HAL_RCC_DMA1_CLK_ENABLE();
-  __HAL_RCC_DMA2_CLK_ENABLE();
 
     /* DMA interrupt init */
-  /* DMA1_Channel7_IRQn interrupt configuration */
+    /* DMA1_Channel2_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 0, 0);
+    HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
-  HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn);
+    HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
-  /* DMA2_Channel3_IRQn interrupt configuration */
+    /* DMA1_Channel3_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(DMA2_Channel3_IRQn, 0, 0);
+    HAL_NVIC_SetPriority(DMA1_Channel3_IRQn, 0, 0);
-  HAL_NVIC_EnableIRQ(DMA2_Channel3_IRQn);
+    HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn);
-
 }
 
 /**
@@ -325,26 +359,61 @@ static void MX_DMA_Init(void)
   * @param None
   * @retval None
   */
-static void MX_GPIO_Init(void)
+static void MX_GPIO_Init(void){
-{
     GPIO_InitTypeDef GPIO_InitStruct = { 0 };
 
     /* GPIO Ports Clock Enable */
-  __HAL_RCC_GPIOC_CLK_ENABLE();
     __HAL_RCC_GPIOA_CLK_ENABLE();
     __HAL_RCC_GPIOB_CLK_ENABLE();
+    __HAL_RCC_GPIOH_CLK_ENABLE();
+
+    /*Configure GPIO pin Output Level */
+    HAL_GPIO_WritePin(GPIOA, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_15, GPIO_PIN_SET);
+
+    /*Configure GPIO pin Output Level */
+    HAL_GPIO_WritePin(GPIOA, CAMERA_EN_Pin | LED2_Pin, GPIO_PIN_RESET);
+
+    /*Configure GPIO pin Output Level */
+    HAL_GPIO_WritePin(GPIOB, CAMERA_CS_Pin | LED1_Pin, GPIO_PIN_RESET);
 
     /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(LD3_GPIO_Port, LD3_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(GPIOH, GPIO_PIN_3, GPIO_PIN_SET);
 
-  /*Configure GPIO pin : LD3_Pin */
+    /*Configure GPIO pins : PA0 PA1 PA2 PA15 */
-  GPIO_InitStruct.Pin = LD3_Pin;
+    GPIO_InitStruct.Pin   = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_15;
     GPIO_InitStruct.Mode  = GPIO_MODE_OUTPUT_PP;
     GPIO_InitStruct.Pull  = GPIO_NOPULL;
     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(LD3_GPIO_Port, &GPIO_InitStruct);
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
-}
+    /*Configure GPIO pins : CAMERA_EN_Pin LED2_Pin */
+    GPIO_InitStruct.Pin   = CAMERA_EN_Pin | LED2_Pin;
+    GPIO_InitStruct.Mode  = GPIO_MODE_OUTPUT_PP;
+    GPIO_InitStruct.Pull  = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /*Configure GPIO pin : CAMERA_CS_Pin */
+    GPIO_InitStruct.Pin   = CAMERA_CS_Pin;
+    GPIO_InitStruct.Mode  = GPIO_MODE_OUTPUT_PP;
+    GPIO_InitStruct.Pull  = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    HAL_GPIO_Init(CAMERA_CS_GPIO_Port, &GPIO_InitStruct);
+
+    /*Configure GPIO pin : LED1_Pin */
+    GPIO_InitStruct.Pin   = LED1_Pin;
+    GPIO_InitStruct.Mode  = GPIO_MODE_OUTPUT_PP;
+    GPIO_InitStruct.Pull  = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    HAL_GPIO_Init(LED1_GPIO_Port, &GPIO_InitStruct);
+
+    /*Configure GPIO pin : PH3 */
+    GPIO_InitStruct.Pin   = GPIO_PIN_3;
+    GPIO_InitStruct.Mode  = GPIO_MODE_OUTPUT_PP;
+    GPIO_InitStruct.Pull  = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
+} // MX_GPIO_Init
 
 /* USER CODE BEGIN 4 */
 
@@ -354,18 +423,16 @@ static void MX_GPIO_Init(void)
   * @brief  This function is executed in case of error occurrence.
   * @retval None
   */
-void Error_Handler(void)
+void Error_Handler(void){
-{
     /* USER CODE BEGIN Error_Handler_Debug */
     /* User can add his own implementation to report the HAL error return state */
     __disable_irq();
-  while (1)
+    while (1) { }
-  {
-  }
     /* USER CODE END Error_Handler_Debug */
 }
 
 #ifdef  USE_FULL_ASSERT
+
 /**
   * @brief  Reports the name of the source file and the source line number
   *         where the assert_param error has occurred.
@@ -373,13 +440,12 @@ void Error_Handler(void)
   * @param  line: assert_param error line source number
   * @retval None
   */
-void assert_failed(uint8_t *file, uint32_t line)
+void assert_failed(uint8_t *file, uint32_t line){
-{
     /* USER CODE BEGIN 6 */
+
     /* User can add his own implementation to report the file name and line number,
        ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
     /* USER CODE END 6 */
 }
-#endif /* USE_FULL_ASSERT */
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+#endif /* USE_FULL_ASSERT */

resources/Camera_driver/Src/stm32l4xx_hal_msp.c

@@ -7,13 +7,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2022 STMicroelectronics.
+  * Copyright (c) 2023 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
   */
@@ -26,7 +25,7 @@
 /* USER CODE END Includes */
 extern DMA_HandleTypeDef hdma_spi1_rx;
 
-extern DMA_HandleTypeDef hdma_usart2_tx;
+extern DMA_HandleTypeDef hdma_spi1_tx;
 
 /* Private typedef -----------------------------------------------------------*/
 /* USER CODE BEGIN TD */
@@ -89,23 +88,33 @@ void HAL_MspInit(void)
 void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
 {
   GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
   if(hi2c->Instance==I2C1)
   {
   /* USER CODE BEGIN I2C1_MspInit 0 */
 
   /* USER CODE END I2C1_MspInit 0 */
 
-    __HAL_RCC_GPIOA_CLK_ENABLE();
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C1;
+    PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
     /**I2C1 GPIO Configuration
-    PA9     ------> I2C1_SCL
+    PB8     ------> I2C1_SCL
-    PA10     ------> I2C1_SDA
+    PB9     ------> I2C1_SDA
     */
-    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
+    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
     GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
-    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
     GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
-    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
     /* Peripheral clock enable */
     __HAL_RCC_I2C1_CLK_ENABLE();
@@ -133,12 +142,12 @@ void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
     __HAL_RCC_I2C1_CLK_DISABLE();
 
     /**I2C1 GPIO Configuration
-    PA9     ------> I2C1_SCL
+    PB8     ------> I2C1_SCL
-    PA10     ------> I2C1_SDA
+    PB9     ------> I2C1_SDA
     */
-    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9);
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8);
 
-    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_10);
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_9);
 
   /* USER CODE BEGIN I2C1_MspDeInit 1 */
 
@@ -172,22 +181,22 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
     */
     GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
     GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
     /* SPI1 DMA Init */
     /* SPI1_RX Init */
-    hdma_spi1_rx.Instance = DMA2_Channel3;
+    hdma_spi1_rx.Instance = DMA1_Channel2;
-    hdma_spi1_rx.Init.Request = DMA_REQUEST_4;
+    hdma_spi1_rx.Init.Request = DMA_REQUEST_1;
     hdma_spi1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
     hdma_spi1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
     hdma_spi1_rx.Init.MemInc = DMA_MINC_ENABLE;
     hdma_spi1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
     hdma_spi1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
     hdma_spi1_rx.Init.Mode = DMA_NORMAL;
-    hdma_spi1_rx.Init.Priority = DMA_PRIORITY_LOW;
+    hdma_spi1_rx.Init.Priority = DMA_PRIORITY_HIGH;
     if (HAL_DMA_Init(&hdma_spi1_rx) != HAL_OK)
     {
       Error_Handler();
@@ -195,6 +204,23 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
 
     __HAL_LINKDMA(hspi,hdmarx,hdma_spi1_rx);
 
+    /* SPI1_TX Init */
+    hdma_spi1_tx.Instance = DMA1_Channel3;
+    hdma_spi1_tx.Init.Request = DMA_REQUEST_1;
+    hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_spi1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_spi1_tx.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_spi1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+    hdma_spi1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+    hdma_spi1_tx.Init.Mode = DMA_NORMAL;
+    hdma_spi1_tx.Init.Priority = DMA_PRIORITY_MEDIUM;
+    if (HAL_DMA_Init(&hdma_spi1_tx) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hspi,hdmatx,hdma_spi1_tx);
+
   /* USER CODE BEGIN SPI1_MspInit 1 */
 
   /* USER CODE END SPI1_MspInit 1 */
@@ -227,6 +253,7 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
 
     /* SPI1 DMA DeInit */
     HAL_DMA_DeInit(hspi->hdmarx);
+    HAL_DMA_DeInit(hspi->hdmatx);
   /* USER CODE BEGIN SPI1_MspDeInit 1 */
 
   /* USER CODE END SPI1_MspDeInit 1 */
@@ -243,54 +270,74 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
 void HAL_UART_MspInit(UART_HandleTypeDef* huart)
 {
   GPIO_InitTypeDef GPIO_InitStruct = {0};
-  if(huart->Instance==USART2)
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspInit 0 */
+
+  /* USER CODE END USART1_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
+    PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
     {
-  /* USER CODE BEGIN USART2_MspInit 0 */
+      Error_Handler();
+    }
 
-  /* USER CODE END USART2_MspInit 0 */
     /* Peripheral clock enable */
-    __HAL_RCC_USART2_CLK_ENABLE();
+    __HAL_RCC_USART1_CLK_ENABLE();
 
     __HAL_RCC_GPIOA_CLK_ENABLE();
-    /**USART2 GPIO Configuration
+    /**USART1 GPIO Configuration
-    PA2     ------> USART2_TX
+    PA9     ------> USART1_TX
-    PA15 (JTDI)     ------> USART2_RX
+    PA10     ------> USART1_RX
     */
-    GPIO_InitStruct.Pin = VCP_TX_Pin;
+    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
     GPIO_InitStruct.Pull = GPIO_NOPULL;
     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-    GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
-    HAL_GPIO_Init(VCP_TX_GPIO_Port, &GPIO_InitStruct);
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
-    GPIO_InitStruct.Pin = VCP_RX_Pin;
+  /* USER CODE BEGIN USART1_MspInit 1 */
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
+  /* USER CODE END USART1_MspInit 1 */
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  }
-    GPIO_InitStruct.Alternate = GPIO_AF3_USART2;
+  else if(huart->Instance==USART3)
-    HAL_GPIO_Init(VCP_RX_GPIO_Port, &GPIO_InitStruct);
+  {
-
+  /* USER CODE BEGIN USART3_MspInit 0 */
-    /* USART2 DMA Init */
+
-    /* USART2_TX Init */
+  /* USER CODE END USART3_MspInit 0 */
-    hdma_usart2_tx.Instance = DMA1_Channel7;
+
-    hdma_usart2_tx.Init.Request = DMA_REQUEST_2;
+  /** Initializes the peripherals clock
-    hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+  */
-    hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART3;
-    hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE;
+    PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
-    hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
-    hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
-    hdma_usart2_tx.Init.Mode = DMA_NORMAL;
-    hdma_usart2_tx.Init.Priority = DMA_PRIORITY_LOW;
-    if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK)
     {
       Error_Handler();
     }
 
-    __HAL_LINKDMA(huart,hdmatx,hdma_usart2_tx);
+    /* Peripheral clock enable */
+    __HAL_RCC_USART3_CLK_ENABLE();
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**USART3 GPIO Configuration
+    PB10     ------> USART3_TX
+    PB11     ------> USART3_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
-  /* USER CODE BEGIN USART2_MspInit 1 */
+  /* USER CODE BEGIN USART3_MspInit 1 */
 
-  /* USER CODE END USART2_MspInit 1 */
+  /* USER CODE END USART3_MspInit 1 */
   }
 
 }
@@ -303,25 +350,41 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
 */
 void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
 {
-  if(huart->Instance==USART2)
+  if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspDeInit 0 */
+
+  /* USER CODE END USART1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART1_CLK_DISABLE();
+
+    /**USART1 GPIO Configuration
+    PA9     ------> USART1_TX
+    PA10     ------> USART1_RX
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
+
+  /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+  /* USER CODE END USART1_MspDeInit 1 */
+  }
+  else if(huart->Instance==USART3)
   {
-  /* USER CODE BEGIN USART2_MspDeInit 0 */
+  /* USER CODE BEGIN USART3_MspDeInit 0 */
 
-  /* USER CODE END USART2_MspDeInit 0 */
+  /* USER CODE END USART3_MspDeInit 0 */
     /* Peripheral clock disable */
-    __HAL_RCC_USART2_CLK_DISABLE();
+    __HAL_RCC_USART3_CLK_DISABLE();
 
-    /**USART2 GPIO Configuration
+    /**USART3 GPIO Configuration
-    PA2     ------> USART2_TX
+    PB10     ------> USART3_TX
-    PA15 (JTDI)     ------> USART2_RX
+    PB11     ------> USART3_RX
     */
-    HAL_GPIO_DeInit(GPIOA, VCP_TX_Pin|VCP_RX_Pin);
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_11);
 
-    /* USART2 DMA DeInit */
+  /* USER CODE BEGIN USART3_MspDeInit 1 */
-    HAL_DMA_DeInit(huart->hdmatx);
-  /* USER CODE BEGIN USART2_MspDeInit 1 */
 
-  /* USER CODE END USART2_MspDeInit 1 */
+  /* USER CODE END USART3_MspDeInit 1 */
   }
 
 }
@@ -329,5 +392,3 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
 /* USER CODE BEGIN 1 */
 
 /* USER CODE END 1 */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

resources/Camera_driver/Src/stm32l4xx_it.c

@@ -6,13 +6,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2022 STMicroelectronics.
+  * Copyright (c) 2023 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
   */
@@ -57,7 +56,7 @@
 
 /* External variables --------------------------------------------------------*/
 extern DMA_HandleTypeDef hdma_spi1_rx;
-extern DMA_HandleTypeDef hdma_usart2_tx;
+extern DMA_HandleTypeDef hdma_spi1_tx;
 /* USER CODE BEGIN EV */
 
 /* USER CODE END EV */
@@ -201,34 +200,33 @@ void SysTick_Handler(void)
 /******************************************************************************/
 
 /**
-  * @brief This function handles DMA1 channel7 global interrupt.
+  * @brief This function handles DMA1 channel2 global interrupt.
   */
-void DMA1_Channel7_IRQHandler(void)
+void DMA1_Channel2_IRQHandler(void)
 {
-  /* USER CODE BEGIN DMA1_Channel7_IRQn 0 */
+  /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
 
-  /* USER CODE END DMA1_Channel7_IRQn 0 */
+  /* USER CODE END DMA1_Channel2_IRQn 0 */
-  HAL_DMA_IRQHandler(&hdma_usart2_tx);
+  HAL_DMA_IRQHandler(&hdma_spi1_rx);
-  /* USER CODE BEGIN DMA1_Channel7_IRQn 1 */
+  /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
 
-  /* USER CODE END DMA1_Channel7_IRQn 1 */
+  /* USER CODE END DMA1_Channel2_IRQn 1 */
 }
 
 /**
-  * @brief This function handles DMA2 channel3 global interrupt.
+  * @brief This function handles DMA1 channel3 global interrupt.
   */
-void DMA2_Channel3_IRQHandler(void)
+void DMA1_Channel3_IRQHandler(void)
 {
-  /* USER CODE BEGIN DMA2_Channel3_IRQn 0 */
+  /* USER CODE BEGIN DMA1_Channel3_IRQn 0 */
 
-  /* USER CODE END DMA2_Channel3_IRQn 0 */
+  /* USER CODE END DMA1_Channel3_IRQn 0 */
-  HAL_DMA_IRQHandler(&hdma_spi1_rx);
+  HAL_DMA_IRQHandler(&hdma_spi1_tx);
-  /* USER CODE BEGIN DMA2_Channel3_IRQn 1 */
+  /* USER CODE BEGIN DMA1_Channel3_IRQn 1 */
 
-  /* USER CODE END DMA2_Channel3_IRQn 1 */
+  /* USER CODE END DMA1_Channel3_IRQn 1 */
 }
 
 /* USER CODE BEGIN 1 */
 
 /* USER CODE END 1 */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

resources/Camera_driver/alohal

@@ -1 +0,0 @@
-Subproject commit 4f857f7092bd8d7435f3e28125e62f72d19c65bb

resources/Camera_driver/startup_stm32l432xx.s

@@ -1,449 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l432xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L432xx devices vector table for GCC toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address,
-  *                - Configure the clock system  
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M4 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-	.cpu cortex-m4
-	.fpu softvfp
-	.thumb
-
-.global	g_pfnVectors
-.global	Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word	_sidata
-/* start address for the .data section. defined in linker script */
-.word	_sdata
-/* end address for the .data section. defined in linker script */
-.word	_edata
-/* start address for the .bss section. defined in linker script */
-.word	_sbss
-/* end address for the .bss section. defined in linker script */
-.word	_ebss
-
-.equ  BootRAM,        0xF1E0F85F
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-    .section	.text.Reset_Handler
-	.weak	Reset_Handler
-	.type	Reset_Handler, %function
-Reset_Handler:
-  ldr   sp, =_estack    /* Set stack pointer */
-
-/* Call the clock system initialization function.*/
-    bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-	bl	main
-
-LoopForever:
-    b LoopForever
-    
-.size	Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section	.text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-	b	Infinite_Loop
-	.size	Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex-M4.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
- 	.section	.isr_vector,"a",%progbits
-	.type	g_pfnVectors, %object
-	.size	g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-	.word	_estack
-	.word	Reset_Handler
-	.word	NMI_Handler
-	.word	HardFault_Handler
-	.word	MemManage_Handler
-	.word	BusFault_Handler
-	.word	UsageFault_Handler
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	SVC_Handler
-	.word	DebugMon_Handler
-	.word	0
-	.word	PendSV_Handler
-	.word	SysTick_Handler
-	.word	WWDG_IRQHandler
-	.word	PVD_PVM_IRQHandler
-	.word	TAMP_STAMP_IRQHandler
-	.word	RTC_WKUP_IRQHandler
-	.word	FLASH_IRQHandler
-	.word	RCC_IRQHandler
-	.word	EXTI0_IRQHandler
-	.word	EXTI1_IRQHandler
-	.word	EXTI2_IRQHandler
-	.word	EXTI3_IRQHandler
-	.word	EXTI4_IRQHandler
-	.word	DMA1_Channel1_IRQHandler
-	.word	DMA1_Channel2_IRQHandler
-	.word	DMA1_Channel3_IRQHandler
-	.word	DMA1_Channel4_IRQHandler
-	.word	DMA1_Channel5_IRQHandler
-	.word	DMA1_Channel6_IRQHandler
-	.word	DMA1_Channel7_IRQHandler
-	.word	ADC1_IRQHandler
-	.word	CAN1_TX_IRQHandler
-	.word	CAN1_RX0_IRQHandler
-	.word	CAN1_RX1_IRQHandler
-	.word	CAN1_SCE_IRQHandler
-	.word	EXTI9_5_IRQHandler
-	.word	TIM1_BRK_TIM15_IRQHandler
-	.word	TIM1_UP_TIM16_IRQHandler
-	.word	TIM1_TRG_COM_IRQHandler
-	.word	TIM1_CC_IRQHandler
-	.word	TIM2_IRQHandler
-	.word	0
-	.word	0
-	.word	I2C1_EV_IRQHandler
-	.word	I2C1_ER_IRQHandler
-	.word	0
-	.word	0
-	.word	SPI1_IRQHandler
-	.word	0
-	.word	USART1_IRQHandler
-	.word	USART2_IRQHandler
-	.word	0
-	.word	EXTI15_10_IRQHandler
-	.word	RTC_Alarm_IRQHandler
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	SPI3_IRQHandler
-	.word	0
-	.word	0
-	.word	TIM6_DAC_IRQHandler
-	.word	TIM7_IRQHandler
-	.word	DMA2_Channel1_IRQHandler
-	.word	DMA2_Channel2_IRQHandler
-	.word	DMA2_Channel3_IRQHandler
-	.word	DMA2_Channel4_IRQHandler
-	.word	DMA2_Channel5_IRQHandler
-	.word	0
-	.word	0
-	.word	0
-	.word	COMP_IRQHandler
-	.word	LPTIM1_IRQHandler
-	.word	LPTIM2_IRQHandler
-	.word	USB_IRQHandler
-	.word	DMA2_Channel6_IRQHandler
-	.word	DMA2_Channel7_IRQHandler
-	.word	LPUART1_IRQHandler
-	.word	QUADSPI_IRQHandler
-	.word	I2C3_EV_IRQHandler
-	.word	I2C3_ER_IRQHandler
-	.word	SAI1_IRQHandler
-	.word	0
-	.word	SWPMI1_IRQHandler
-	.word	TSC_IRQHandler
-	.word	0
-	.word	0
-	.word	RNG_IRQHandler
-	.word	FPU_IRQHandler
-	.word	CRS_IRQHandler
-
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-  .weak	NMI_Handler
-	.thumb_set NMI_Handler,Default_Handler
-
-  .weak	HardFault_Handler
-	.thumb_set HardFault_Handler,Default_Handler
-
-  .weak	MemManage_Handler
-	.thumb_set MemManage_Handler,Default_Handler
-
-  .weak	BusFault_Handler
-	.thumb_set BusFault_Handler,Default_Handler
-
-	.weak	UsageFault_Handler
-	.thumb_set UsageFault_Handler,Default_Handler
-
-	.weak	SVC_Handler
-	.thumb_set SVC_Handler,Default_Handler
-
-	.weak	DebugMon_Handler
-	.thumb_set DebugMon_Handler,Default_Handler
-
-	.weak	PendSV_Handler
-	.thumb_set PendSV_Handler,Default_Handler
-
-	.weak	SysTick_Handler
-	.thumb_set SysTick_Handler,Default_Handler
-
-	.weak	WWDG_IRQHandler
-	.thumb_set WWDG_IRQHandler,Default_Handler
-
-	.weak	PVD_PVM_IRQHandler
-	.thumb_set PVD_PVM_IRQHandler,Default_Handler
-
-	.weak	TAMP_STAMP_IRQHandler
-	.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
-
-	.weak	RTC_WKUP_IRQHandler
-	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
-
-	.weak	FLASH_IRQHandler
-	.thumb_set FLASH_IRQHandler,Default_Handler
-
-	.weak	RCC_IRQHandler
-	.thumb_set RCC_IRQHandler,Default_Handler
-
-	.weak	EXTI0_IRQHandler
-	.thumb_set EXTI0_IRQHandler,Default_Handler
-
-	.weak	EXTI1_IRQHandler
-	.thumb_set EXTI1_IRQHandler,Default_Handler
-
-	.weak	EXTI2_IRQHandler
-	.thumb_set EXTI2_IRQHandler,Default_Handler
-
-	.weak	EXTI3_IRQHandler
-	.thumb_set EXTI3_IRQHandler,Default_Handler
-
-	.weak	EXTI4_IRQHandler
-	.thumb_set EXTI4_IRQHandler,Default_Handler
-
-	.weak	DMA1_Channel1_IRQHandler
-	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-	.weak	DMA1_Channel2_IRQHandler
-	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-	.weak	DMA1_Channel3_IRQHandler
-	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-	.weak	DMA1_Channel4_IRQHandler
-	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-	.weak	DMA1_Channel5_IRQHandler
-	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-	.weak	DMA1_Channel6_IRQHandler
-	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-	.weak	DMA1_Channel7_IRQHandler
-	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-	.weak	ADC1_IRQHandler
-	.thumb_set ADC1_IRQHandler,Default_Handler
-
-	.weak	CAN1_TX_IRQHandler
-	.thumb_set CAN1_TX_IRQHandler,Default_Handler
-
-	.weak	CAN1_RX0_IRQHandler
-	.thumb_set CAN1_RX0_IRQHandler,Default_Handler
-
-	.weak	CAN1_RX1_IRQHandler
-	.thumb_set CAN1_RX1_IRQHandler,Default_Handler
-
-	.weak	CAN1_SCE_IRQHandler
-	.thumb_set CAN1_SCE_IRQHandler,Default_Handler
-
-	.weak	EXTI9_5_IRQHandler
-	.thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-	.weak	TIM1_BRK_TIM15_IRQHandler
-	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
-
-	.weak	TIM1_UP_TIM16_IRQHandler
-	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
-
-	.weak	TIM1_TRG_COM_IRQHandler
-	.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
-
-	.weak	TIM1_CC_IRQHandler
-	.thumb_set TIM1_CC_IRQHandler,Default_Handler
-
-	.weak	TIM2_IRQHandler
-	.thumb_set TIM2_IRQHandler,Default_Handler
-
-	.weak	I2C1_EV_IRQHandler
-	.thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-	.weak	I2C1_ER_IRQHandler
-	.thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-	.weak	SPI1_IRQHandler
-	.thumb_set SPI1_IRQHandler,Default_Handler
-
-	.weak	USART1_IRQHandler
-	.thumb_set USART1_IRQHandler,Default_Handler
-
-	.weak	USART2_IRQHandler
-	.thumb_set USART2_IRQHandler,Default_Handler
-
-	.weak	EXTI15_10_IRQHandler
-	.thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-	.weak	RTC_Alarm_IRQHandler
-	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-	.weak	SPI3_IRQHandler
-	.thumb_set SPI3_IRQHandler,Default_Handler
-
-	.weak	TIM6_DAC_IRQHandler
-	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
-
-	.weak	TIM7_IRQHandler
-	.thumb_set TIM7_IRQHandler,Default_Handler
-
-	.weak	DMA2_Channel1_IRQHandler
-	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
-
-	.weak	DMA2_Channel2_IRQHandler
-	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
-
-	.weak	DMA2_Channel3_IRQHandler
-	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
-
-	.weak	DMA2_Channel4_IRQHandler
-	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
-
-	.weak	DMA2_Channel5_IRQHandler
-	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
-
-	.weak	COMP_IRQHandler
-	.thumb_set COMP_IRQHandler,Default_Handler
-	
-	.weak	LPTIM1_IRQHandler
-	.thumb_set LPTIM1_IRQHandler,Default_Handler
-	
-	.weak	LPTIM2_IRQHandler
-	.thumb_set LPTIM2_IRQHandler,Default_Handler	
-	
-	.weak	USB_IRQHandler
-	.thumb_set USB_IRQHandler,Default_Handler	
-	
-	.weak	DMA2_Channel6_IRQHandler
-	.thumb_set DMA2_Channel6_IRQHandler,Default_Handler	
-	
-	.weak	DMA2_Channel7_IRQHandler
-	.thumb_set DMA2_Channel7_IRQHandler,Default_Handler	
-	
-	.weak	LPUART1_IRQHandler
-	.thumb_set LPUART1_IRQHandler,Default_Handler	
-	
-	.weak	QUADSPI_IRQHandler
-	.thumb_set QUADSPI_IRQHandler,Default_Handler	
-	
-	.weak	I2C3_EV_IRQHandler
-	.thumb_set I2C3_EV_IRQHandler,Default_Handler	
-	
-	.weak	I2C3_ER_IRQHandler
-	.thumb_set I2C3_ER_IRQHandler,Default_Handler	
-	
-	.weak	SAI1_IRQHandler
-	.thumb_set SAI1_IRQHandler,Default_Handler
-	
-	.weak	SWPMI1_IRQHandler
-	.thumb_set SWPMI1_IRQHandler,Default_Handler
-	
-	.weak	TSC_IRQHandler
-	.thumb_set TSC_IRQHandler,Default_Handler
-	
-	.weak	RNG_IRQHandler
-	.thumb_set RNG_IRQHandler,Default_Handler
-	
-	.weak	FPU_IRQHandler
-	.thumb_set FPU_IRQHandler,Default_Handler
-	
-	.weak	CRS_IRQHandler
-	.thumb_set CRS_IRQHandler,Default_Handler
-

resources/FC_camera/Drivers/CMSIS/Core/Include/cmsis_armcc.h

@@ -1,894 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_armcc.h
- * @brief    CMSIS compiler ARMCC (Arm Compiler 5) header file
- * @version  V5.1.0
- * @date     08. May 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __CMSIS_ARMCC_H
-#define __CMSIS_ARMCC_H
-
-
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
-  #error "Please use Arm Compiler Toolchain V4.0.677 or later!"
-#endif
-
-/* CMSIS compiler control architecture macros */
-#if ((defined (__TARGET_ARCH_6_M  ) && (__TARGET_ARCH_6_M   == 1)) || \
-     (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M  == 1))   )
-  #define __ARM_ARCH_6M__           1
-#endif
-
-#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M  == 1))
-  #define __ARM_ARCH_7M__           1
-#endif
-
-#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
-  #define __ARM_ARCH_7EM__          1
-#endif
-
-  /* __ARM_ARCH_8M_BASE__  not applicable */
-  /* __ARM_ARCH_8M_MAIN__  not applicable */
-
-/* CMSIS compiler control DSP macros */
-#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-  #define __ARM_FEATURE_DSP         1
-#endif
-
-/* CMSIS compiler specific defines */
-#ifndef   __ASM
-  #define __ASM                                  __asm
-#endif
-#ifndef   __INLINE
-  #define __INLINE                               __inline
-#endif
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE                        static __inline
-#endif
-#ifndef   __STATIC_FORCEINLINE                 
-  #define __STATIC_FORCEINLINE                   static __forceinline
-#endif           
-#ifndef   __NO_RETURN
-  #define __NO_RETURN                            __declspec(noreturn)
-#endif
-#ifndef   __USED
-  #define __USED                                 __attribute__((used))
-#endif
-#ifndef   __WEAK
-  #define __WEAK                                 __attribute__((weak))
-#endif
-#ifndef   __PACKED
-  #define __PACKED                               __attribute__((packed))
-#endif
-#ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT                        __packed struct
-#endif
-#ifndef   __PACKED_UNION
-  #define __PACKED_UNION                         __packed union
-#endif
-#ifndef   __UNALIGNED_UINT32        /* deprecated */
-  #define __UNALIGNED_UINT32(x)                  (*((__packed uint32_t *)(x)))
-#endif
-#ifndef   __UNALIGNED_UINT16_WRITE
-  #define __UNALIGNED_UINT16_WRITE(addr, val)    ((*((__packed uint16_t *)(addr))) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT16_READ
-  #define __UNALIGNED_UINT16_READ(addr)          (*((const __packed uint16_t *)(addr)))
-#endif
-#ifndef   __UNALIGNED_UINT32_WRITE
-  #define __UNALIGNED_UINT32_WRITE(addr, val)    ((*((__packed uint32_t *)(addr))) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT32_READ
-  #define __UNALIGNED_UINT32_READ(addr)          (*((const __packed uint32_t *)(addr)))
-#endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)                           __attribute__((aligned(x)))
-#endif
-#ifndef   __RESTRICT
-  #define __RESTRICT                             __restrict
-#endif
-#ifndef   __COMPILER_BARRIER
-  #define __COMPILER_BARRIER()                   __memory_changed()
-#endif
-
-/* #########################  Startup and Lowlevel Init  ######################## */
-
-#ifndef __PROGRAM_START
-#define __PROGRAM_START           __main
-#endif
-
-#ifndef __INITIAL_SP
-#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
-#endif
-
-#ifndef __STACK_LIMIT
-#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
-#endif
-
-#ifndef __VECTOR_TABLE
-#define __VECTOR_TABLE            __Vectors
-#endif
-
-#ifndef __VECTOR_TABLE_ATTRIBUTE
-#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section("RESET")))
-#endif
-
-/* ###########################  Core Function Access  ########################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
-  @{
- */
-
-/**
-  \brief   Enable IRQ Interrupts
-  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-/* intrinsic void __enable_irq();     */
-
-
-/**
-  \brief   Disable IRQ Interrupts
-  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-/* intrinsic void __disable_irq();    */
-
-/**
-  \brief   Get Control Register
-  \details Returns the content of the Control Register.
-  \return               Control Register value
- */
-__STATIC_INLINE uint32_t __get_CONTROL(void)
-{
-  register uint32_t __regControl         __ASM("control");
-  return(__regControl);
-}
-
-
-/**
-  \brief   Set Control Register
-  \details Writes the given value to the Control Register.
-  \param [in]    control  Control Register value to set
- */
-__STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
-  register uint32_t __regControl         __ASM("control");
-  __regControl = control;
-}
-
-
-/**
-  \brief   Get IPSR Register
-  \details Returns the content of the IPSR Register.
-  \return               IPSR Register value
- */
-__STATIC_INLINE uint32_t __get_IPSR(void)
-{
-  register uint32_t __regIPSR          __ASM("ipsr");
-  return(__regIPSR);
-}
-
-
-/**
-  \brief   Get APSR Register
-  \details Returns the content of the APSR Register.
-  \return               APSR Register value
- */
-__STATIC_INLINE uint32_t __get_APSR(void)
-{
-  register uint32_t __regAPSR          __ASM("apsr");
-  return(__regAPSR);
-}
-
-
-/**
-  \brief   Get xPSR Register
-  \details Returns the content of the xPSR Register.
-  \return               xPSR Register value
- */
-__STATIC_INLINE uint32_t __get_xPSR(void)
-{
-  register uint32_t __regXPSR          __ASM("xpsr");
-  return(__regXPSR);
-}
-
-
-/**
-  \brief   Get Process Stack Pointer
-  \details Returns the current value of the Process Stack Pointer (PSP).
-  \return               PSP Register value
- */
-__STATIC_INLINE uint32_t __get_PSP(void)
-{
-  register uint32_t __regProcessStackPointer  __ASM("psp");
-  return(__regProcessStackPointer);
-}
-
-
-/**
-  \brief   Set Process Stack Pointer
-  \details Assigns the given value to the Process Stack Pointer (PSP).
-  \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
-  register uint32_t __regProcessStackPointer  __ASM("psp");
-  __regProcessStackPointer = topOfProcStack;
-}
-
-
-/**
-  \brief   Get Main Stack Pointer
-  \details Returns the current value of the Main Stack Pointer (MSP).
-  \return               MSP Register value
- */
-__STATIC_INLINE uint32_t __get_MSP(void)
-{
-  register uint32_t __regMainStackPointer     __ASM("msp");
-  return(__regMainStackPointer);
-}
-
-
-/**
-  \brief   Set Main Stack Pointer
-  \details Assigns the given value to the Main Stack Pointer (MSP).
-  \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
-  register uint32_t __regMainStackPointer     __ASM("msp");
-  __regMainStackPointer = topOfMainStack;
-}
-
-
-/**
-  \brief   Get Priority Mask
-  \details Returns the current state of the priority mask bit from the Priority Mask Register.
-  \return               Priority Mask value
- */
-__STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
-  register uint32_t __regPriMask         __ASM("primask");
-  return(__regPriMask);
-}
-
-
-/**
-  \brief   Set Priority Mask
-  \details Assigns the given value to the Priority Mask Register.
-  \param [in]    priMask  Priority Mask
- */
-__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
-  register uint32_t __regPriMask         __ASM("primask");
-  __regPriMask = (priMask);
-}
-
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-
-/**
-  \brief   Enable FIQ
-  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq                __enable_fiq
-
-
-/**
-  \brief   Disable FIQ
-  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq               __disable_fiq
-
-
-/**
-  \brief   Get Base Priority
-  \details Returns the current value of the Base Priority register.
-  \return               Base Priority register value
- */
-__STATIC_INLINE uint32_t  __get_BASEPRI(void)
-{
-  register uint32_t __regBasePri         __ASM("basepri");
-  return(__regBasePri);
-}
-
-
-/**
-  \brief   Set Base Priority
-  \details Assigns the given value to the Base Priority register.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
-{
-  register uint32_t __regBasePri         __ASM("basepri");
-  __regBasePri = (basePri & 0xFFU);
-}
-
-
-/**
-  \brief   Set Base Priority with condition
-  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
-           or the new value increases the BASEPRI priority level.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
-{
-  register uint32_t __regBasePriMax      __ASM("basepri_max");
-  __regBasePriMax = (basePri & 0xFFU);
-}
-
-
-/**
-  \brief   Get Fault Mask
-  \details Returns the current value of the Fault Mask register.
-  \return               Fault Mask register value
- */
-__STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
-  register uint32_t __regFaultMask       __ASM("faultmask");
-  return(__regFaultMask);
-}
-
-
-/**
-  \brief   Set Fault Mask
-  \details Assigns the given value to the Fault Mask register.
-  \param [in]    faultMask  Fault Mask value to set
- */
-__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
-  register uint32_t __regFaultMask       __ASM("faultmask");
-  __regFaultMask = (faultMask & (uint32_t)1U);
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
-
-
-/**
-  \brief   Get FPSCR
-  \details Returns the current value of the Floating Point Status/Control register.
-  \return               Floating Point Status/Control register value
- */
-__STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-  register uint32_t __regfpscr         __ASM("fpscr");
-  return(__regfpscr);
-#else
-   return(0U);
-#endif
-}
-
-
-/**
-  \brief   Set FPSCR
-  \details Assigns the given value to the Floating Point Status/Control register.
-  \param [in]    fpscr  Floating Point Status/Control value to set
- */
-__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-  register uint32_t __regfpscr         __ASM("fpscr");
-  __regfpscr = (fpscr);
-#else
-  (void)fpscr;
-#endif
-}
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ##########################  Core Instruction Access  ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
-  Access to dedicated instructions
-  @{
-*/
-
-/**
-  \brief   No Operation
-  \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP                             __nop
-
-
-/**
-  \brief   Wait For Interrupt
-  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-#define __WFI                             __wfi
-
-
-/**
-  \brief   Wait For Event
-  \details Wait For Event is a hint instruction that permits the processor to enter
-           a low-power state until one of a number of events occurs.
- */
-#define __WFE                             __wfe
-
-
-/**
-  \brief   Send Event
-  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV                             __sev
-
-
-/**
-  \brief   Instruction Synchronization Barrier
-  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
-           so that all instructions following the ISB are fetched from cache or memory,
-           after the instruction has been completed.
- */
-#define __ISB() do {\
-                   __schedule_barrier();\
-                   __isb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Data Synchronization Barrier
-  \details Acts as a special kind of Data Memory Barrier.
-           It completes when all explicit memory accesses before this instruction complete.
- */
-#define __DSB() do {\
-                   __schedule_barrier();\
-                   __dsb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Data Memory Barrier
-  \details Ensures the apparent order of the explicit memory operations before
-           and after the instruction, without ensuring their completion.
- */
-#define __DMB() do {\
-                   __schedule_barrier();\
-                   __dmb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-                  
-/**
-  \brief   Reverse byte order (32 bit)
-  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REV                             __rev
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
-{
-  rev16 r0, r0
-  bx lr
-}
-#endif
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
-{
-  revsh r0, r0
-  bx lr
-}
-#endif
-
-
-/**
-  \brief   Rotate Right in unsigned value (32 bit)
-  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-  \param [in]    op1  Value to rotate
-  \param [in]    op2  Number of Bits to rotate
-  \return               Rotated value
- */
-#define __ROR                             __ror
-
-
-/**
-  \brief   Breakpoint
-  \details Causes the processor to enter Debug state.
-           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
-  \param [in]    value  is ignored by the processor.
-                 If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value)                       __breakpoint(value)
-
-
-/**
-  \brief   Reverse bit order of value
-  \details Reverses the bit order of the given value.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-  #define __RBIT                          __rbit
-#else
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
-{
-  uint32_t result;
-  uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
-
-  result = value;                      /* r will be reversed bits of v; first get LSB of v */
-  for (value >>= 1U; value != 0U; value >>= 1U)
-  {
-    result <<= 1U;
-    result |= value & 1U;
-    s--;
-  }
-  result <<= s;                        /* shift when v's highest bits are zero */
-  return result;
-}
-#endif
-
-
-/**
-  \brief   Count leading zeros
-  \details Counts the number of leading zeros of a data value.
-  \param [in]  value  Value to count the leading zeros
-  \return             number of leading zeros in value
- */
-#define __CLZ                             __clz
-
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-
-/**
-  \brief   LDR Exclusive (8 bit)
-  \details Executes a exclusive LDR instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXB(ptr)                                                        ((uint8_t ) __ldrex(ptr))
-#else
-  #define __LDREXB(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-
-/**
-  \brief   LDR Exclusive (16 bit)
-  \details Executes a exclusive LDR instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXH(ptr)                                                        ((uint16_t) __ldrex(ptr))
-#else
-  #define __LDREXH(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-
-/**
-  \brief   LDR Exclusive (32 bit)
-  \details Executes a exclusive LDR instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXW(ptr)                                                        ((uint32_t ) __ldrex(ptr))
-#else
-  #define __LDREXW(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-
-/**
-  \brief   STR Exclusive (8 bit)
-  \details Executes a exclusive STR instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXB(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXB(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-
-/**
-  \brief   STR Exclusive (16 bit)
-  \details Executes a exclusive STR instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXH(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXH(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-
-/**
-  \brief   STR Exclusive (32 bit)
-  \details Executes a exclusive STR instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXW(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXW(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-
-/**
-  \brief   Remove the exclusive lock
-  \details Removes the exclusive lock which is created by LDREX.
- */
-#define __CLREX                           __clrex
-
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-#define __SSAT                            __ssat
-
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-#define __USAT                            __usat
-
-
-/**
-  \brief   Rotate Right with Extend (32 bit)
-  \details Moves each bit of a bitstring right by one bit.
-           The carry input is shifted in at the left end of the bitstring.
-  \param [in]    value  Value to rotate
-  \return               Rotated value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
-{
-  rrx r0, r0
-  bx lr
-}
-#endif
-
-
-/**
-  \brief   LDRT Unprivileged (8 bit)
-  \details Executes a Unprivileged LDRT instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#define __LDRBT(ptr)                      ((uint8_t )  __ldrt(ptr))
-
-
-/**
-  \brief   LDRT Unprivileged (16 bit)
-  \details Executes a Unprivileged LDRT instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#define __LDRHT(ptr)                      ((uint16_t)  __ldrt(ptr))
-
-
-/**
-  \brief   LDRT Unprivileged (32 bit)
-  \details Executes a Unprivileged LDRT instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#define __LDRT(ptr)                       ((uint32_t ) __ldrt(ptr))
-
-
-/**
-  \brief   STRT Unprivileged (8 bit)
-  \details Executes a Unprivileged STRT instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-#define __STRBT(value, ptr)               __strt(value, ptr)
-
-
-/**
-  \brief   STRT Unprivileged (16 bit)
-  \details Executes a Unprivileged STRT instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-#define __STRHT(value, ptr)               __strt(value, ptr)
-
-
-/**
-  \brief   STRT Unprivileged (32 bit)
-  \details Executes a Unprivileged STRT instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-#define __STRT(value, ptr)                __strt(value, ptr)
-
-#else  /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
-{
-  if ((sat >= 1U) && (sat <= 32U))
-  {
-    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
-    const int32_t min = -1 - max ;
-    if (val > max)
-    {
-      return max;
-    }
-    else if (val < min)
-    {
-      return min;
-    }
-  }
-  return val;
-}
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
-{
-  if (sat <= 31U)
-  {
-    const uint32_t max = ((1U << sat) - 1U);
-    if (val > (int32_t)max)
-    {
-      return max;
-    }
-    else if (val < 0)
-    {
-      return 0U;
-    }
-  }
-  return (uint32_t)val;
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ###################  Compiler specific Intrinsics  ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
-  Access to dedicated SIMD instructions
-  @{
-*/
-
-#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-
-#define __SADD8                           __sadd8
-#define __QADD8                           __qadd8
-#define __SHADD8                          __shadd8
-#define __UADD8                           __uadd8
-#define __UQADD8                          __uqadd8
-#define __UHADD8                          __uhadd8
-#define __SSUB8                           __ssub8
-#define __QSUB8                           __qsub8
-#define __SHSUB8                          __shsub8
-#define __USUB8                           __usub8
-#define __UQSUB8                          __uqsub8
-#define __UHSUB8                          __uhsub8
-#define __SADD16                          __sadd16
-#define __QADD16                          __qadd16
-#define __SHADD16                         __shadd16
-#define __UADD16                          __uadd16
-#define __UQADD16                         __uqadd16
-#define __UHADD16                         __uhadd16
-#define __SSUB16                          __ssub16
-#define __QSUB16                          __qsub16
-#define __SHSUB16                         __shsub16
-#define __USUB16                          __usub16
-#define __UQSUB16                         __uqsub16
-#define __UHSUB16                         __uhsub16
-#define __SASX                            __sasx
-#define __QASX                            __qasx
-#define __SHASX                           __shasx
-#define __UASX                            __uasx
-#define __UQASX                           __uqasx
-#define __UHASX                           __uhasx
-#define __SSAX                            __ssax
-#define __QSAX                            __qsax
-#define __SHSAX                           __shsax
-#define __USAX                            __usax
-#define __UQSAX                           __uqsax
-#define __UHSAX                           __uhsax
-#define __USAD8                           __usad8
-#define __USADA8                          __usada8
-#define __SSAT16                          __ssat16
-#define __USAT16                          __usat16
-#define __UXTB16                          __uxtb16
-#define __UXTAB16                         __uxtab16
-#define __SXTB16                          __sxtb16
-#define __SXTAB16                         __sxtab16
-#define __SMUAD                           __smuad
-#define __SMUADX                          __smuadx
-#define __SMLAD                           __smlad
-#define __SMLADX                          __smladx
-#define __SMLALD                          __smlald
-#define __SMLALDX                         __smlaldx
-#define __SMUSD                           __smusd
-#define __SMUSDX                          __smusdx
-#define __SMLSD                           __smlsd
-#define __SMLSDX                          __smlsdx
-#define __SMLSLD                          __smlsld
-#define __SMLSLDX                         __smlsldx
-#define __SEL                             __sel
-#define __QADD                            __qadd
-#define __QSUB                            __qsub
-
-#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
-                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
-
-#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
-                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
-
-#define __SMMLA(ARG1,ARG2,ARG3)          ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
-                                                      ((int64_t)(ARG3) << 32U)     ) >> 32U))
-
-#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#endif /* __CMSIS_ARMCC_H */

resources/FC_camera/Drivers/CMSIS/Core/Include/cmsis_compiler.h

@@ -1,283 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_compiler.h
- * @brief    CMSIS compiler generic header file
- * @version  V5.1.0
- * @date     09. October 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __CMSIS_COMPILER_H
-#define __CMSIS_COMPILER_H
-
-#include <stdint.h>
-
-/*
- * Arm Compiler 4/5
- */
-#if   defined ( __CC_ARM )
-  #include "cmsis_armcc.h"
-
-
-/*
- * Arm Compiler 6.6 LTM (armclang)
- */
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
-  #include "cmsis_armclang_ltm.h"
-
-  /*
- * Arm Compiler above 6.10.1 (armclang)
- */
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
-  #include "cmsis_armclang.h"
-
-
-/*
- * GNU Compiler
- */
-#elif defined ( __GNUC__ )
-  #include "cmsis_gcc.h"
-
-
-/*
- * IAR Compiler
- */
-#elif defined ( __ICCARM__ )
-  #include <cmsis_iccarm.h>
-
-
-/*
- * TI Arm Compiler
- */
-#elif defined ( __TI_ARM__ )
-  #include <cmsis_ccs.h>
-
-  #ifndef   __ASM
-    #define __ASM                                  __asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                               inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE                        static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    #define __NO_RETURN                            __attribute__((noreturn))
-  #endif
-  #ifndef   __USED
-    #define __USED                                 __attribute__((used))
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                                 __attribute__((weak))
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                               __attribute__((packed))
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT                        struct __attribute__((packed))
-  #endif
-  #ifndef   __PACKED_UNION
-    #define __PACKED_UNION                         union __attribute__((packed))
-  #endif
-  #ifndef   __UNALIGNED_UINT32        /* deprecated */
-    struct __attribute__((packed)) T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT16_WRITE
-    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT16_READ
-    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT32_WRITE
-    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT32_READ
-    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #define __ALIGNED(x)                           __attribute__((aligned(x)))
-  #endif
-  #ifndef   __RESTRICT
-    #define __RESTRICT                             __restrict
-  #endif
-  #ifndef   __COMPILER_BARRIER
-    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
-    #define __COMPILER_BARRIER()                   (void)0
-  #endif
-
-
-/*
- * TASKING Compiler
- */
-#elif defined ( __TASKING__ )
-  /*
-   * The CMSIS functions have been implemented as intrinsics in the compiler.
-   * Please use "carm -?i" to get an up to date list of all intrinsics,
-   * Including the CMSIS ones.
-   */
-
-  #ifndef   __ASM
-    #define __ASM                                  __asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                               inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE                        static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    #define __NO_RETURN                            __attribute__((noreturn))
-  #endif
-  #ifndef   __USED
-    #define __USED                                 __attribute__((used))
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                                 __attribute__((weak))
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                               __packed__
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT                        struct __packed__
-  #endif
-  #ifndef   __PACKED_UNION
-    #define __PACKED_UNION                         union __packed__
-  #endif
-  #ifndef   __UNALIGNED_UINT32        /* deprecated */
-    struct __packed__ T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT16_WRITE
-    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT16_READ
-    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT32_WRITE
-    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT32_READ
-    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #define __ALIGNED(x)              __align(x)
-  #endif
-  #ifndef   __RESTRICT
-    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
-    #define __RESTRICT
-  #endif
-  #ifndef   __COMPILER_BARRIER
-    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
-    #define __COMPILER_BARRIER()                   (void)0
-  #endif
-
-
-/*
- * COSMIC Compiler
- */
-#elif defined ( __CSMC__ )
-   #include <cmsis_csm.h>
-
- #ifndef   __ASM
-    #define __ASM                                  _asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                               inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE                        static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    // NO RETURN is automatically detected hence no warning here
-    #define __NO_RETURN
-  #endif
-  #ifndef   __USED
-    #warning No compiler specific solution for __USED. __USED is ignored.
-    #define __USED
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                                 __weak
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                               @packed
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT                        @packed struct
-  #endif
-  #ifndef   __PACKED_UNION
-    #define __PACKED_UNION                         @packed union
-  #endif
-  #ifndef   __UNALIGNED_UINT32        /* deprecated */
-    @packed struct T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT16_WRITE
-    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT16_READ
-    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT32_WRITE
-    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT32_READ
-    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
-    #define __ALIGNED(x)
-  #endif
-  #ifndef   __RESTRICT
-    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
-    #define __RESTRICT
-  #endif
-  #ifndef   __COMPILER_BARRIER
-    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
-    #define __COMPILER_BARRIER()                   (void)0
-  #endif
-
-
-#else
-  #error Unknown compiler.
-#endif
-
-
-#endif /* __CMSIS_COMPILER_H */
-

resources/FC_camera/Drivers/CMSIS/Core/Include/cmsis_iccarm.h

@@ -1,964 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_iccarm.h
- * @brief    CMSIS compiler ICCARM (IAR Compiler for Arm) header file
- * @version  V5.1.0
- * @date     08. May 2019
- ******************************************************************************/
-
-//------------------------------------------------------------------------------
-//
-// Copyright (c) 2017-2019 IAR Systems
-// Copyright (c) 2017-2019 Arm Limited. All rights reserved. 
-//
-// Licensed under the Apache License, Version 2.0 (the "License")
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-//
-//------------------------------------------------------------------------------
-
-
-#ifndef __CMSIS_ICCARM_H__
-#define __CMSIS_ICCARM_H__
-
-#ifndef __ICCARM__
-  #error This file should only be compiled by ICCARM
-#endif
-
-#pragma system_include
-
-#define __IAR_FT _Pragma("inline=forced") __intrinsic
-
-#if (__VER__ >= 8000000)
-  #define __ICCARM_V8 1
-#else
-  #define __ICCARM_V8 0
-#endif
-
-#ifndef __ALIGNED
-  #if __ICCARM_V8
-    #define __ALIGNED(x) __attribute__((aligned(x)))
-  #elif (__VER__ >= 7080000)
-    /* Needs IAR language extensions */
-    #define __ALIGNED(x) __attribute__((aligned(x)))
-  #else
-    #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
-    #define __ALIGNED(x)
-  #endif
-#endif
-
-
-/* Define compiler macros for CPU architecture, used in CMSIS 5.
- */
-#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
-/* Macros already defined */
-#else
-  #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
-    #define __ARM_ARCH_8M_MAIN__ 1
-  #elif defined(__ARM8M_BASELINE__)
-    #define __ARM_ARCH_8M_BASE__ 1
-  #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
-    #if __ARM_ARCH == 6
-      #define __ARM_ARCH_6M__ 1
-    #elif __ARM_ARCH == 7
-      #if __ARM_FEATURE_DSP
-        #define __ARM_ARCH_7EM__ 1
-      #else
-        #define __ARM_ARCH_7M__ 1
-      #endif
-    #endif /* __ARM_ARCH */
-  #endif /* __ARM_ARCH_PROFILE == 'M' */
-#endif
-
-/* Alternativ core deduction for older ICCARM's */
-#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
-    !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
-  #if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
-    #define __ARM_ARCH_6M__ 1
-  #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
-    #define __ARM_ARCH_7M__ 1
-  #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
-    #define __ARM_ARCH_7EM__  1
-  #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
-    #define __ARM_ARCH_8M_BASE__ 1
-  #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
-    #define __ARM_ARCH_8M_MAIN__ 1
-  #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
-    #define __ARM_ARCH_8M_MAIN__ 1
-  #else
-    #error "Unknown target."
-  #endif
-#endif
-
-
-
-#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
-  #define __IAR_M0_FAMILY  1
-#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
-  #define __IAR_M0_FAMILY  1
-#else
-  #define __IAR_M0_FAMILY  0
-#endif
-
-
-#ifndef __ASM
-  #define __ASM __asm
-#endif
-
-#ifndef   __COMPILER_BARRIER
-  #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
-#endif
-
-#ifndef __INLINE
-  #define __INLINE inline
-#endif
-
-#ifndef   __NO_RETURN
-  #if __ICCARM_V8
-    #define __NO_RETURN __attribute__((__noreturn__))
-  #else
-    #define __NO_RETURN _Pragma("object_attribute=__noreturn")
-  #endif
-#endif
-
-#ifndef   __PACKED
-  #if __ICCARM_V8
-    #define __PACKED __attribute__((packed, aligned(1)))
-  #else
-    /* Needs IAR language extensions */
-    #define __PACKED __packed
-  #endif
-#endif
-
-#ifndef   __PACKED_STRUCT
-  #if __ICCARM_V8
-    #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
-  #else
-    /* Needs IAR language extensions */
-    #define __PACKED_STRUCT __packed struct
-  #endif
-#endif
-
-#ifndef   __PACKED_UNION
-  #if __ICCARM_V8
-    #define __PACKED_UNION union __attribute__((packed, aligned(1)))
-  #else
-    /* Needs IAR language extensions */
-    #define __PACKED_UNION __packed union
-  #endif
-#endif
-
-#ifndef   __RESTRICT
-  #if __ICCARM_V8
-    #define __RESTRICT            __restrict
-  #else
-    /* Needs IAR language extensions */
-    #define __RESTRICT            restrict
-  #endif
-#endif
-
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE       static inline
-#endif
-
-#ifndef   __FORCEINLINE
-  #define __FORCEINLINE         _Pragma("inline=forced")
-#endif
-
-#ifndef   __STATIC_FORCEINLINE
-  #define __STATIC_FORCEINLINE  __FORCEINLINE __STATIC_INLINE
-#endif
-
-#ifndef __UNALIGNED_UINT16_READ
-#pragma language=save
-#pragma language=extended
-__IAR_FT uint16_t __iar_uint16_read(void const *ptr)
-{
-  return *(__packed uint16_t*)(ptr);
-}
-#pragma language=restore
-#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
-#endif
-
-
-#ifndef __UNALIGNED_UINT16_WRITE
-#pragma language=save
-#pragma language=extended
-__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
-{
-  *(__packed uint16_t*)(ptr) = val;;
-}
-#pragma language=restore
-#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
-#endif
-
-#ifndef __UNALIGNED_UINT32_READ
-#pragma language=save
-#pragma language=extended
-__IAR_FT uint32_t __iar_uint32_read(void const *ptr)
-{
-  return *(__packed uint32_t*)(ptr);
-}
-#pragma language=restore
-#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
-#endif
-
-#ifndef __UNALIGNED_UINT32_WRITE
-#pragma language=save
-#pragma language=extended
-__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
-{
-  *(__packed uint32_t*)(ptr) = val;;
-}
-#pragma language=restore
-#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
-#endif
-
-#ifndef __UNALIGNED_UINT32   /* deprecated */
-#pragma language=save
-#pragma language=extended
-__packed struct  __iar_u32 { uint32_t v; };
-#pragma language=restore
-#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
-#endif
-
-#ifndef   __USED
-  #if __ICCARM_V8
-    #define __USED __attribute__((used))
-  #else
-    #define __USED _Pragma("__root")
-  #endif
-#endif
-
-#ifndef   __WEAK
-  #if __ICCARM_V8
-    #define __WEAK __attribute__((weak))
-  #else
-    #define __WEAK _Pragma("__weak")
-  #endif
-#endif
-
-#ifndef __PROGRAM_START
-#define __PROGRAM_START           __iar_program_start
-#endif
-
-#ifndef __INITIAL_SP
-#define __INITIAL_SP              CSTACK$$Limit
-#endif
-
-#ifndef __STACK_LIMIT
-#define __STACK_LIMIT             CSTACK$$Base
-#endif
-
-#ifndef __VECTOR_TABLE
-#define __VECTOR_TABLE            __vector_table
-#endif
-
-#ifndef __VECTOR_TABLE_ATTRIBUTE
-#define __VECTOR_TABLE_ATTRIBUTE  @".intvec"
-#endif
-
-#ifndef __ICCARM_INTRINSICS_VERSION__
-  #define __ICCARM_INTRINSICS_VERSION__  0
-#endif
-
-#if __ICCARM_INTRINSICS_VERSION__ == 2
-
-  #if defined(__CLZ)
-    #undef __CLZ
-  #endif
-  #if defined(__REVSH)
-    #undef __REVSH
-  #endif
-  #if defined(__RBIT)
-    #undef __RBIT
-  #endif
-  #if defined(__SSAT)
-    #undef __SSAT
-  #endif
-  #if defined(__USAT)
-    #undef __USAT
-  #endif
-
-  #include "iccarm_builtin.h"
-
-  #define __disable_fault_irq __iar_builtin_disable_fiq
-  #define __disable_irq       __iar_builtin_disable_interrupt
-  #define __enable_fault_irq  __iar_builtin_enable_fiq
-  #define __enable_irq        __iar_builtin_enable_interrupt
-  #define __arm_rsr           __iar_builtin_rsr
-  #define __arm_wsr           __iar_builtin_wsr
-
-
-  #define __get_APSR()                (__arm_rsr("APSR"))
-  #define __get_BASEPRI()             (__arm_rsr("BASEPRI"))
-  #define __get_CONTROL()             (__arm_rsr("CONTROL"))
-  #define __get_FAULTMASK()           (__arm_rsr("FAULTMASK"))
-
-  #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-       (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-    #define __get_FPSCR()             (__arm_rsr("FPSCR"))
-    #define __set_FPSCR(VALUE)        (__arm_wsr("FPSCR", (VALUE)))
-  #else
-    #define __get_FPSCR()             ( 0 )
-    #define __set_FPSCR(VALUE)        ((void)VALUE)
-  #endif
-
-  #define __get_IPSR()                (__arm_rsr("IPSR"))
-  #define __get_MSP()                 (__arm_rsr("MSP"))
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure MSPLIM is RAZ/WI
-    #define __get_MSPLIM()            (0U)
-  #else
-    #define __get_MSPLIM()            (__arm_rsr("MSPLIM"))
-  #endif
-  #define __get_PRIMASK()             (__arm_rsr("PRIMASK"))
-  #define __get_PSP()                 (__arm_rsr("PSP"))
-
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure PSPLIM is RAZ/WI
-    #define __get_PSPLIM()            (0U)
-  #else
-    #define __get_PSPLIM()            (__arm_rsr("PSPLIM"))
-  #endif
-
-  #define __get_xPSR()                (__arm_rsr("xPSR"))
-
-  #define __set_BASEPRI(VALUE)        (__arm_wsr("BASEPRI", (VALUE)))
-  #define __set_BASEPRI_MAX(VALUE)    (__arm_wsr("BASEPRI_MAX", (VALUE)))
-  #define __set_CONTROL(VALUE)        (__arm_wsr("CONTROL", (VALUE)))
-  #define __set_FAULTMASK(VALUE)      (__arm_wsr("FAULTMASK", (VALUE)))
-  #define __set_MSP(VALUE)            (__arm_wsr("MSP", (VALUE)))
-
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure MSPLIM is RAZ/WI
-    #define __set_MSPLIM(VALUE)       ((void)(VALUE))
-  #else
-    #define __set_MSPLIM(VALUE)       (__arm_wsr("MSPLIM", (VALUE)))
-  #endif
-  #define __set_PRIMASK(VALUE)        (__arm_wsr("PRIMASK", (VALUE)))
-  #define __set_PSP(VALUE)            (__arm_wsr("PSP", (VALUE)))
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure PSPLIM is RAZ/WI
-    #define __set_PSPLIM(VALUE)       ((void)(VALUE))
-  #else
-    #define __set_PSPLIM(VALUE)       (__arm_wsr("PSPLIM", (VALUE)))
-  #endif
-
-  #define __TZ_get_CONTROL_NS()       (__arm_rsr("CONTROL_NS"))
-  #define __TZ_set_CONTROL_NS(VALUE)  (__arm_wsr("CONTROL_NS", (VALUE)))
-  #define __TZ_get_PSP_NS()           (__arm_rsr("PSP_NS"))
-  #define __TZ_set_PSP_NS(VALUE)      (__arm_wsr("PSP_NS", (VALUE)))
-  #define __TZ_get_MSP_NS()           (__arm_rsr("MSP_NS"))
-  #define __TZ_set_MSP_NS(VALUE)      (__arm_wsr("MSP_NS", (VALUE)))
-  #define __TZ_get_SP_NS()            (__arm_rsr("SP_NS"))
-  #define __TZ_set_SP_NS(VALUE)       (__arm_wsr("SP_NS", (VALUE)))
-  #define __TZ_get_PRIMASK_NS()       (__arm_rsr("PRIMASK_NS"))
-  #define __TZ_set_PRIMASK_NS(VALUE)  (__arm_wsr("PRIMASK_NS", (VALUE)))
-  #define __TZ_get_BASEPRI_NS()       (__arm_rsr("BASEPRI_NS"))
-  #define __TZ_set_BASEPRI_NS(VALUE)  (__arm_wsr("BASEPRI_NS", (VALUE)))
-  #define __TZ_get_FAULTMASK_NS()     (__arm_rsr("FAULTMASK_NS"))
-  #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
-
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure PSPLIM is RAZ/WI
-    #define __TZ_get_PSPLIM_NS()      (0U)
-    #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE))
-  #else
-    #define __TZ_get_PSPLIM_NS()      (__arm_rsr("PSPLIM_NS"))
-    #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
-  #endif
-
-  #define __TZ_get_MSPLIM_NS()        (__arm_rsr("MSPLIM_NS"))
-  #define __TZ_set_MSPLIM_NS(VALUE)   (__arm_wsr("MSPLIM_NS", (VALUE)))
-
-  #define __NOP     __iar_builtin_no_operation
-
-  #define __CLZ     __iar_builtin_CLZ
-  #define __CLREX   __iar_builtin_CLREX
-
-  #define __DMB     __iar_builtin_DMB
-  #define __DSB     __iar_builtin_DSB
-  #define __ISB     __iar_builtin_ISB
-
-  #define __LDREXB  __iar_builtin_LDREXB
-  #define __LDREXH  __iar_builtin_LDREXH
-  #define __LDREXW  __iar_builtin_LDREX
-
-  #define __RBIT    __iar_builtin_RBIT
-  #define __REV     __iar_builtin_REV
-  #define __REV16   __iar_builtin_REV16
-
-  __IAR_FT int16_t __REVSH(int16_t val)
-  {
-    return (int16_t) __iar_builtin_REVSH(val);
-  }
-
-  #define __ROR     __iar_builtin_ROR
-  #define __RRX     __iar_builtin_RRX
-
-  #define __SEV     __iar_builtin_SEV
-
-  #if !__IAR_M0_FAMILY
-    #define __SSAT    __iar_builtin_SSAT
-  #endif
-
-  #define __STREXB  __iar_builtin_STREXB
-  #define __STREXH  __iar_builtin_STREXH
-  #define __STREXW  __iar_builtin_STREX
-
-  #if !__IAR_M0_FAMILY
-    #define __USAT    __iar_builtin_USAT
-  #endif
-
-  #define __WFE     __iar_builtin_WFE
-  #define __WFI     __iar_builtin_WFI
-
-  #if __ARM_MEDIA__
-    #define __SADD8   __iar_builtin_SADD8
-    #define __QADD8   __iar_builtin_QADD8
-    #define __SHADD8  __iar_builtin_SHADD8
-    #define __UADD8   __iar_builtin_UADD8
-    #define __UQADD8  __iar_builtin_UQADD8
-    #define __UHADD8  __iar_builtin_UHADD8
-    #define __SSUB8   __iar_builtin_SSUB8
-    #define __QSUB8   __iar_builtin_QSUB8
-    #define __SHSUB8  __iar_builtin_SHSUB8
-    #define __USUB8   __iar_builtin_USUB8
-    #define __UQSUB8  __iar_builtin_UQSUB8
-    #define __UHSUB8  __iar_builtin_UHSUB8
-    #define __SADD16  __iar_builtin_SADD16
-    #define __QADD16  __iar_builtin_QADD16
-    #define __SHADD16 __iar_builtin_SHADD16
-    #define __UADD16  __iar_builtin_UADD16
-    #define __UQADD16 __iar_builtin_UQADD16
-    #define __UHADD16 __iar_builtin_UHADD16
-    #define __SSUB16  __iar_builtin_SSUB16
-    #define __QSUB16  __iar_builtin_QSUB16
-    #define __SHSUB16 __iar_builtin_SHSUB16
-    #define __USUB16  __iar_builtin_USUB16
-    #define __UQSUB16 __iar_builtin_UQSUB16
-    #define __UHSUB16 __iar_builtin_UHSUB16
-    #define __SASX    __iar_builtin_SASX
-    #define __QASX    __iar_builtin_QASX
-    #define __SHASX   __iar_builtin_SHASX
-    #define __UASX    __iar_builtin_UASX
-    #define __UQASX   __iar_builtin_UQASX
-    #define __UHASX   __iar_builtin_UHASX
-    #define __SSAX    __iar_builtin_SSAX
-    #define __QSAX    __iar_builtin_QSAX
-    #define __SHSAX   __iar_builtin_SHSAX
-    #define __USAX    __iar_builtin_USAX
-    #define __UQSAX   __iar_builtin_UQSAX
-    #define __UHSAX   __iar_builtin_UHSAX
-    #define __USAD8   __iar_builtin_USAD8
-    #define __USADA8  __iar_builtin_USADA8
-    #define __SSAT16  __iar_builtin_SSAT16
-    #define __USAT16  __iar_builtin_USAT16
-    #define __UXTB16  __iar_builtin_UXTB16
-    #define __UXTAB16 __iar_builtin_UXTAB16
-    #define __SXTB16  __iar_builtin_SXTB16
-    #define __SXTAB16 __iar_builtin_SXTAB16
-    #define __SMUAD   __iar_builtin_SMUAD
-    #define __SMUADX  __iar_builtin_SMUADX
-    #define __SMMLA   __iar_builtin_SMMLA
-    #define __SMLAD   __iar_builtin_SMLAD
-    #define __SMLADX  __iar_builtin_SMLADX
-    #define __SMLALD  __iar_builtin_SMLALD
-    #define __SMLALDX __iar_builtin_SMLALDX
-    #define __SMUSD   __iar_builtin_SMUSD
-    #define __SMUSDX  __iar_builtin_SMUSDX
-    #define __SMLSD   __iar_builtin_SMLSD
-    #define __SMLSDX  __iar_builtin_SMLSDX
-    #define __SMLSLD  __iar_builtin_SMLSLD
-    #define __SMLSLDX __iar_builtin_SMLSLDX
-    #define __SEL     __iar_builtin_SEL
-    #define __QADD    __iar_builtin_QADD
-    #define __QSUB    __iar_builtin_QSUB
-    #define __PKHBT   __iar_builtin_PKHBT
-    #define __PKHTB   __iar_builtin_PKHTB
-  #endif
-
-#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
-
-  #if __IAR_M0_FAMILY
-   /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
-    #define __CLZ  __cmsis_iar_clz_not_active
-    #define __SSAT __cmsis_iar_ssat_not_active
-    #define __USAT __cmsis_iar_usat_not_active
-    #define __RBIT __cmsis_iar_rbit_not_active
-    #define __get_APSR  __cmsis_iar_get_APSR_not_active
-  #endif
-
-
-  #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-         (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     ))
-    #define __get_FPSCR __cmsis_iar_get_FPSR_not_active
-    #define __set_FPSCR __cmsis_iar_set_FPSR_not_active
-  #endif
-
-  #ifdef __INTRINSICS_INCLUDED
-  #error intrinsics.h is already included previously!
-  #endif
-
-  #include <intrinsics.h>
-
-  #if __IAR_M0_FAMILY
-   /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
-    #undef __CLZ
-    #undef __SSAT
-    #undef __USAT
-    #undef __RBIT
-    #undef __get_APSR
-
-    __STATIC_INLINE uint8_t __CLZ(uint32_t data)
-    {
-      if (data == 0U) { return 32U; }
-
-      uint32_t count = 0U;
-      uint32_t mask = 0x80000000U;
-
-      while ((data & mask) == 0U)
-      {
-        count += 1U;
-        mask = mask >> 1U;
-      }
-      return count;
-    }
-
-    __STATIC_INLINE uint32_t __RBIT(uint32_t v)
-    {
-      uint8_t sc = 31U;
-      uint32_t r = v;
-      for (v >>= 1U; v; v >>= 1U)
-      {
-        r <<= 1U;
-        r |= v & 1U;
-        sc--;
-      }
-      return (r << sc);
-    }
-
-    __STATIC_INLINE  uint32_t __get_APSR(void)
-    {
-      uint32_t res;
-      __asm("MRS      %0,APSR" : "=r" (res));
-      return res;
-    }
-
-  #endif
-
-  #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-         (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     ))
-    #undef __get_FPSCR
-    #undef __set_FPSCR
-    #define __get_FPSCR()       (0)
-    #define __set_FPSCR(VALUE)  ((void)VALUE)
-  #endif
-
-  #pragma diag_suppress=Pe940
-  #pragma diag_suppress=Pe177
-
-  #define __enable_irq    __enable_interrupt
-  #define __disable_irq   __disable_interrupt
-  #define __NOP           __no_operation
-
-  #define __get_xPSR      __get_PSR
-
-  #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
-
-    __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
-    {
-      return __LDREX((unsigned long *)ptr);
-    }
-
-    __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
-    {
-      return __STREX(value, (unsigned long *)ptr);
-    }
-  #endif
-
-
-  /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
-  #if (__CORTEX_M >= 0x03)
-
-    __IAR_FT uint32_t __RRX(uint32_t value)
-    {
-      uint32_t result;
-      __ASM("RRX      %0, %1" : "=r"(result) : "r" (value) : "cc");
-      return(result);
-    }
-
-    __IAR_FT void __set_BASEPRI_MAX(uint32_t value)
-    {
-      __asm volatile("MSR      BASEPRI_MAX,%0"::"r" (value));
-    }
-
-
-    #define __enable_fault_irq  __enable_fiq
-    #define __disable_fault_irq __disable_fiq
-
-
-  #endif /* (__CORTEX_M >= 0x03) */
-
-  __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
-  {
-    return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
-  }
-
-  #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-       (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-
-   __IAR_FT uint32_t __get_MSPLIM(void)
-    {
-      uint32_t res;
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure MSPLIM is RAZ/WI
-      res = 0U;
-    #else
-      __asm volatile("MRS      %0,MSPLIM" : "=r" (res));
-    #endif
-      return res;
-    }
-
-    __IAR_FT void   __set_MSPLIM(uint32_t value)
-    {
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure MSPLIM is RAZ/WI
-      (void)value;
-    #else
-      __asm volatile("MSR      MSPLIM,%0" :: "r" (value));
-    #endif
-    }
-
-    __IAR_FT uint32_t __get_PSPLIM(void)
-    {
-      uint32_t res;
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure PSPLIM is RAZ/WI
-      res = 0U;
-    #else
-      __asm volatile("MRS      %0,PSPLIM" : "=r" (res));
-    #endif
-      return res;
-    }
-
-    __IAR_FT void   __set_PSPLIM(uint32_t value)
-    {
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure PSPLIM is RAZ/WI
-      (void)value;
-    #else
-      __asm volatile("MSR      PSPLIM,%0" :: "r" (value));
-    #endif
-    }
-
-    __IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,CONTROL_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_CONTROL_NS(uint32_t value)
-    {
-      __asm volatile("MSR      CONTROL_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_PSP_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,PSP_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_PSP_NS(uint32_t value)
-    {
-      __asm volatile("MSR      PSP_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_MSP_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,MSP_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_MSP_NS(uint32_t value)
-    {
-      __asm volatile("MSR      MSP_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_SP_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,SP_NS" : "=r" (res));
-      return res;
-    }
-    __IAR_FT void   __TZ_set_SP_NS(uint32_t value)
-    {
-      __asm volatile("MSR      SP_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_PRIMASK_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,PRIMASK_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_PRIMASK_NS(uint32_t value)
-    {
-      __asm volatile("MSR      PRIMASK_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_BASEPRI_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,BASEPRI_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_BASEPRI_NS(uint32_t value)
-    {
-      __asm volatile("MSR      BASEPRI_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_FAULTMASK_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,FAULTMASK_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_FAULTMASK_NS(uint32_t value)
-    {
-      __asm volatile("MSR      FAULTMASK_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_PSPLIM_NS(void)
-    {
-      uint32_t res;
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure PSPLIM is RAZ/WI
-      res = 0U;
-    #else
-      __asm volatile("MRS      %0,PSPLIM_NS" : "=r" (res));
-    #endif
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_PSPLIM_NS(uint32_t value)
-    {
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure PSPLIM is RAZ/WI
-      (void)value;
-    #else
-      __asm volatile("MSR      PSPLIM_NS,%0" :: "r" (value));
-    #endif
-    }
-
-    __IAR_FT uint32_t   __TZ_get_MSPLIM_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,MSPLIM_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_MSPLIM_NS(uint32_t value)
-    {
-      __asm volatile("MSR      MSPLIM_NS,%0" :: "r" (value));
-    }
-
-  #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
-
-#endif   /* __ICCARM_INTRINSICS_VERSION__ == 2 */
-
-#define __BKPT(value)    __asm volatile ("BKPT     %0" : : "i"(value))
-
-#if __IAR_M0_FAMILY
-  __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
-  {
-    if ((sat >= 1U) && (sat <= 32U))
-    {
-      const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
-      const int32_t min = -1 - max ;
-      if (val > max)
-      {
-        return max;
-      }
-      else if (val < min)
-      {
-        return min;
-      }
-    }
-    return val;
-  }
-
-  __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
-  {
-    if (sat <= 31U)
-    {
-      const uint32_t max = ((1U << sat) - 1U);
-      if (val > (int32_t)max)
-      {
-        return max;
-      }
-      else if (val < 0)
-      {
-        return 0U;
-      }
-    }
-    return (uint32_t)val;
-  }
-#endif
-
-#if (__CORTEX_M >= 0x03)   /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
-
-  __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
-  {
-    uint32_t res;
-    __ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
-    return ((uint8_t)res);
-  }
-
-  __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
-  {
-    uint32_t res;
-    __ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
-    return ((uint16_t)res);
-  }
-
-  __IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
-  {
-    uint32_t res;
-    __ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
-    return res;
-  }
-
-  __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
-  {
-    __ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
-  }
-
-  __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
-  {
-    __ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
-  }
-
-  __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
-  {
-    __ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
-  }
-
-#endif /* (__CORTEX_M >= 0x03) */
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-
-
-  __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return ((uint8_t)res);
-  }
-
-  __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return ((uint16_t)res);
-  }
-
-  __IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return res;
-  }
-
-  __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
-  {
-    __ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
-  }
-
-  __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
-  {
-    __ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
-  }
-
-  __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
-  {
-    __ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
-  }
-
-  __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return ((uint8_t)res);
-  }
-
-  __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return ((uint16_t)res);
-  }
-
-  __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return res;
-  }
-
-  __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
-    return res;
-  }
-
-  __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
-    return res;
-  }
-
-  __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
-    return res;
-  }
-
-#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
-
-#undef __IAR_FT
-#undef __IAR_M0_FAMILY
-#undef __ICCARM_V8
-
-#pragma diag_default=Pe940
-#pragma diag_default=Pe177
-
-#endif /* __CMSIS_ICCARM_H__ */

resources/FC_camera/Drivers/CMSIS/Core/Include/cmsis_version.h

@@ -1,39 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_version.h
- * @brief    CMSIS Core(M) Version definitions
- * @version  V5.0.3
- * @date     24. June 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2019 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CMSIS_VERSION_H
-#define __CMSIS_VERSION_H
-
-/*  CMSIS Version definitions */
-#define __CM_CMSIS_VERSION_MAIN  ( 5U)                                      /*!< [31:16] CMSIS Core(M) main version */
-#define __CM_CMSIS_VERSION_SUB   ( 3U)                                      /*!< [15:0]  CMSIS Core(M) sub version */
-#define __CM_CMSIS_VERSION       ((__CM_CMSIS_VERSION_MAIN << 16U) | \
-                                   __CM_CMSIS_VERSION_SUB           )       /*!< CMSIS Core(M) version number */
-#endif

resources/FC_camera/Drivers/CMSIS/Core/Include/core_cm0.h

@@ -1,952 +0,0 @@
-/**************************************************************************//**
- * @file     core_cm0.h
- * @brief    CMSIS Cortex-M0 Core Peripheral Access Layer Header File
- * @version  V5.0.6
- * @date     13. March 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM0_H_GENERIC
-#define __CORE_CM0_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M0
-  @{
- */
-
-#include "cmsis_version.h"
- 
-/*  CMSIS CM0 definitions */
-#define __CM0_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM0_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16U) | \
-                                    __CM0_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                (0U)                                   /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_FP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM0_H_DEPENDANT
-#define __CORE_CM0_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM0_REV
-    #define __CM0_REV               0x0000U
-    #warning "__CM0_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M0 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[31U];
-  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RESERVED1[31U];
-  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[31U];
-  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[31U];
-        uint32_t RESERVED4[64U];
-  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
-}  NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-        uint32_t RESERVED0;
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-        uint32_t RESERVED1;
-  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
-            Therefore they are not covered by the Cortex-M0 header file.
-  @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M0 */
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
-#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
-#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
-#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
-#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
-
-#define __NVIC_SetPriorityGrouping(X) (void)(X)
-#define __NVIC_GetPriorityGrouping()  (0U)
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           Address 0 must be mapped to SRAM.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t vectors = 0x0U;
-  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
-  /* ARM Application Note 321 states that the M0 does not require the architectural barrier */
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t vectors = 0x0U;
-  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                 SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-    return 0U;           /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */

resources/FC_camera/Drivers/CMSIS/Core/Include/core_cm1.h

@@ -1,979 +0,0 @@
-/**************************************************************************//**
- * @file     core_cm1.h
- * @brief    CMSIS Cortex-M1 Core Peripheral Access Layer Header File
- * @version  V1.0.1
- * @date     12. November 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM1_H_GENERIC
-#define __CORE_CM1_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M1
-  @{
- */
-
-#include "cmsis_version.h"
- 
-/*  CMSIS CM1 definitions */
-#define __CM1_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM1_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __CM1_CMSIS_VERSION       ((__CM1_CMSIS_VERSION_MAIN << 16U) | \
-                                    __CM1_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                (1U)                                   /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_FP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM1_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM1_H_DEPENDANT
-#define __CORE_CM1_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM1_REV
-    #define __CM1_REV               0x0100U
-    #warning "__CM1_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M1 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[31U];
-  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[31U];
-  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[31U];
-  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[31U];
-        uint32_t RESERVED4[64U];
-  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
-}  NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-        uint32_t RESERVED0;
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-        uint32_t RESERVED1;
-  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_ITCMUAEN_Pos            4U                                        /*!< ACTLR: Instruction TCM Upper Alias Enable Position */
-#define SCnSCB_ACTLR_ITCMUAEN_Msk           (1UL << SCnSCB_ACTLR_ITCMUAEN_Pos)         /*!< ACTLR: Instruction TCM Upper Alias Enable Mask */
-
-#define SCnSCB_ACTLR_ITCMLAEN_Pos            3U                                        /*!< ACTLR: Instruction TCM Lower Alias Enable Position */
-#define SCnSCB_ACTLR_ITCMLAEN_Msk           (1UL << SCnSCB_ACTLR_ITCMLAEN_Pos)         /*!< ACTLR: Instruction TCM Lower Alias Enable Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Cortex-M1 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
-            Therefore they are not covered by the Cortex-M1 header file.
-  @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M1 */
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
-#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
-#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
-#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
-#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
-
-#define __NVIC_SetPriorityGrouping(X) (void)(X)
-#define __NVIC_GetPriorityGrouping()  (0U)
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           Address 0 must be mapped to SRAM.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t *vectors = (uint32_t *)0x0U;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-  /* ARM Application Note 321 states that the M1 does not require the architectural barrier */
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t *vectors = (uint32_t *)0x0U;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                 SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-    return 0U;           /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM1_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */

resources/FC_camera/Drivers/CMSIS/Core/Include/mpu_armv7.h

@@ -1,272 +0,0 @@
-/******************************************************************************
- * @file     mpu_armv7.h
- * @brief    CMSIS MPU API for Armv7-M MPU
- * @version  V5.1.0
- * @date     08. March 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2017-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
- 
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header    /* treat file as system include file */
-#endif
- 
-#ifndef ARM_MPU_ARMV7_H
-#define ARM_MPU_ARMV7_H
-
-#define ARM_MPU_REGION_SIZE_32B      ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
-#define ARM_MPU_REGION_SIZE_64B      ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
-#define ARM_MPU_REGION_SIZE_128B     ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
-#define ARM_MPU_REGION_SIZE_256B     ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
-#define ARM_MPU_REGION_SIZE_512B     ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
-#define ARM_MPU_REGION_SIZE_1KB      ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
-#define ARM_MPU_REGION_SIZE_2KB      ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
-#define ARM_MPU_REGION_SIZE_4KB      ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
-#define ARM_MPU_REGION_SIZE_8KB      ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
-#define ARM_MPU_REGION_SIZE_16KB     ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
-#define ARM_MPU_REGION_SIZE_32KB     ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
-#define ARM_MPU_REGION_SIZE_64KB     ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
-#define ARM_MPU_REGION_SIZE_128KB    ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
-#define ARM_MPU_REGION_SIZE_256KB    ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
-#define ARM_MPU_REGION_SIZE_512KB    ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
-#define ARM_MPU_REGION_SIZE_1MB      ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
-#define ARM_MPU_REGION_SIZE_2MB      ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
-#define ARM_MPU_REGION_SIZE_4MB      ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
-#define ARM_MPU_REGION_SIZE_8MB      ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
-#define ARM_MPU_REGION_SIZE_16MB     ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
-#define ARM_MPU_REGION_SIZE_32MB     ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
-#define ARM_MPU_REGION_SIZE_64MB     ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
-#define ARM_MPU_REGION_SIZE_128MB    ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
-#define ARM_MPU_REGION_SIZE_256MB    ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
-#define ARM_MPU_REGION_SIZE_512MB    ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
-#define ARM_MPU_REGION_SIZE_1GB      ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
-#define ARM_MPU_REGION_SIZE_2GB      ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
-#define ARM_MPU_REGION_SIZE_4GB      ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
-
-#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
-#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
-#define ARM_MPU_AP_URO  2U ///!< MPU Access Permission unprivileged access read-only
-#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
-#define ARM_MPU_AP_PRO  5U ///!< MPU Access Permission privileged access read-only
-#define ARM_MPU_AP_RO   6U ///!< MPU Access Permission read-only access
-
-/** MPU Region Base Address Register Value
-*
-* \param Region The region to be configured, number 0 to 15.
-* \param BaseAddress The base address for the region.
-*/
-#define ARM_MPU_RBAR(Region, BaseAddress) \
-  (((BaseAddress) & MPU_RBAR_ADDR_Msk) |  \
-   ((Region) & MPU_RBAR_REGION_Msk)    |  \
-   (MPU_RBAR_VALID_Msk))
-
-/**
-* MPU Memory Access Attributes
-* 
-* \param TypeExtField      Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
-* \param IsShareable       Region is shareable between multiple bus masters.
-* \param IsCacheable       Region is cacheable, i.e. its value may be kept in cache.
-* \param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
-*/  
-#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable)   \
-  ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk)                  | \
-   (((IsShareable)  << MPU_RASR_S_Pos)   & MPU_RASR_S_Msk)                    | \
-   (((IsCacheable)  << MPU_RASR_C_Pos)   & MPU_RASR_C_Msk)                    | \
-   (((IsBufferable) << MPU_RASR_B_Pos)   & MPU_RASR_B_Msk))
-
-/**
-* MPU Region Attribute and Size Register Value
-* 
-* \param DisableExec       Instruction access disable bit, 1= disable instruction fetches.
-* \param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged mode.
-* \param AccessAttributes  Memory access attribution, see \ref ARM_MPU_ACCESS_.
-* \param SubRegionDisable  Sub-region disable field.
-* \param Size              Region size of the region to be configured, for example 4K, 8K.
-*/
-#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size)    \
-  ((((DisableExec)      << MPU_RASR_XN_Pos)   & MPU_RASR_XN_Msk)                                  | \
-   (((AccessPermission) << MPU_RASR_AP_Pos)   & MPU_RASR_AP_Msk)                                  | \
-   (((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
-   (((SubRegionDisable) << MPU_RASR_SRD_Pos)  & MPU_RASR_SRD_Msk)                                 | \
-   (((Size)             << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk)                                | \
-   (((MPU_RASR_ENABLE_Msk))))
-
-/**
-* MPU Region Attribute and Size Register Value
-* 
-* \param DisableExec       Instruction access disable bit, 1= disable instruction fetches.
-* \param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged mode.
-* \param TypeExtField      Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
-* \param IsShareable       Region is shareable between multiple bus masters.
-* \param IsCacheable       Region is cacheable, i.e. its value may be kept in cache.
-* \param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
-* \param SubRegionDisable  Sub-region disable field.
-* \param Size              Region size of the region to be configured, for example 4K, 8K.
-*/                         
-#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
-  ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
-
-/**
-* MPU Memory Access Attribute for strongly ordered memory.
-*  - TEX: 000b
-*  - Shareable
-*  - Non-cacheable
-*  - Non-bufferable
-*/ 
-#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
-
-/**
-* MPU Memory Access Attribute for device memory.
-*  - TEX: 000b (if shareable) or 010b (if non-shareable)
-*  - Shareable or non-shareable
-*  - Non-cacheable
-*  - Bufferable (if shareable) or non-bufferable (if non-shareable)
-*
-* \param IsShareable Configures the device memory as shareable or non-shareable.
-*/ 
-#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
-
-/**
-* MPU Memory Access Attribute for normal memory.
-*  - TEX: 1BBb (reflecting outer cacheability rules)
-*  - Shareable or non-shareable
-*  - Cacheable or non-cacheable (reflecting inner cacheability rules)
-*  - Bufferable or non-bufferable (reflecting inner cacheability rules)
-*
-* \param OuterCp Configures the outer cache policy.
-* \param InnerCp Configures the inner cache policy.
-* \param IsShareable Configures the memory as shareable or non-shareable.
-*/ 
-#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
-
-/**
-* MPU Memory Access Attribute non-cacheable policy.
-*/
-#define ARM_MPU_CACHEP_NOCACHE 0U
-
-/**
-* MPU Memory Access Attribute write-back, write and read allocate policy.
-*/
-#define ARM_MPU_CACHEP_WB_WRA 1U
-
-/**
-* MPU Memory Access Attribute write-through, no write allocate policy.
-*/
-#define ARM_MPU_CACHEP_WT_NWA 2U
-
-/**
-* MPU Memory Access Attribute write-back, no write allocate policy.
-*/
-#define ARM_MPU_CACHEP_WB_NWA 3U
-
-
-/**
-* Struct for a single MPU Region
-*/
-typedef struct {
-  uint32_t RBAR; //!< The region base address register value (RBAR)
-  uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
-} ARM_MPU_Region_t;
-    
-/** Enable the MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
-__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
-{
-  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  __DSB();
-  __ISB();
-}
-
-/** Disable the MPU.
-*/
-__STATIC_INLINE void ARM_MPU_Disable(void)
-{
-  __DMB();
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
-}
-
-/** Clear and disable the given MPU region.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
-{
-  MPU->RNR = rnr;
-  MPU->RASR = 0U;
-}
-
-/** Configure an MPU region.
-* \param rbar Value for RBAR register.
-* \param rsar Value for RSAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
-{
-  MPU->RBAR = rbar;
-  MPU->RASR = rasr;
-}
-
-/** Configure the given MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rsar Value for RSAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
-{
-  MPU->RNR = rnr;
-  MPU->RBAR = rbar;
-  MPU->RASR = rasr;
-}
-
-/** Memcopy with strictly ordered memory access, e.g. for register targets.
-* \param dst Destination data is copied to.
-* \param src Source data is copied from.
-* \param len Amount of data words to be copied.
-*/
-__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
-{
-  uint32_t i;
-  for (i = 0U; i < len; ++i) 
-  {
-    dst[i] = src[i];
-  }
-}
-
-/** Load the given number of MPU regions from a table.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) 
-{
-  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
-  while (cnt > MPU_TYPE_RALIASES) {
-    ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
-    table += MPU_TYPE_RALIASES;
-    cnt -= MPU_TYPE_RALIASES;
-  }
-  ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
-}
-
-#endif

resources/FC_camera/Drivers/CMSIS/Core/Include/mpu_armv8.h

@@ -1,346 +0,0 @@
-/******************************************************************************
- * @file     mpu_armv8.h
- * @brief    CMSIS MPU API for Armv8-M and Armv8.1-M MPU
- * @version  V5.1.0
- * @date     08. March 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2017-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header    /* treat file as system include file */
-#endif
-
-#ifndef ARM_MPU_ARMV8_H
-#define ARM_MPU_ARMV8_H
-
-/** \brief Attribute for device memory (outer only) */
-#define ARM_MPU_ATTR_DEVICE                           ( 0U )
-
-/** \brief Attribute for non-cacheable, normal memory */
-#define ARM_MPU_ATTR_NON_CACHEABLE                    ( 4U )
-
-/** \brief Attribute for normal memory (outer and inner)
-* \param NT Non-Transient: Set to 1 for non-transient data.
-* \param WB Write-Back: Set to 1 to use write-back update policy.
-* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
-* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
-*/
-#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
-  (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
-
-/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
-
-/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_nGnRE  (1U)
-
-/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_nGRE   (2U)
-
-/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_GRE    (3U)
-
-/** \brief Memory Attribute
-* \param O Outer memory attributes
-* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
-*/
-#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
-
-/** \brief Normal memory non-shareable  */
-#define ARM_MPU_SH_NON   (0U)
-
-/** \brief Normal memory outer shareable  */
-#define ARM_MPU_SH_OUTER (2U)
-
-/** \brief Normal memory inner shareable  */
-#define ARM_MPU_SH_INNER (3U)
-
-/** \brief Memory access permissions
-* \param RO Read-Only: Set to 1 for read-only memory.
-* \param NP Non-Privileged: Set to 1 for non-privileged memory.
-*/
-#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))
-
-/** \brief Region Base Address Register value
-* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
-* \param SH Defines the Shareability domain for this memory region.
-* \param RO Read-Only: Set to 1 for a read-only memory region.
-* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
-* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
-*/
-#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
-  ((BASE & MPU_RBAR_BASE_Msk) | \
-  ((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
-  ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
-  ((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
-
-/** \brief Region Limit Address Register value
-* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
-* \param IDX The attribute index to be associated with this memory region.
-*/
-#define ARM_MPU_RLAR(LIMIT, IDX) \
-  ((LIMIT & MPU_RLAR_LIMIT_Msk) | \
-  ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
-  (MPU_RLAR_EN_Msk))
-
-#if defined(MPU_RLAR_PXN_Pos)
-  
-/** \brief Region Limit Address Register with PXN value
-* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
-* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
-* \param IDX The attribute index to be associated with this memory region.
-*/
-#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
-  ((LIMIT & MPU_RLAR_LIMIT_Msk) | \
-  ((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
-  ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
-  (MPU_RLAR_EN_Msk))
-  
-#endif
-
-/**
-* Struct for a single MPU Region
-*/
-typedef struct {
-  uint32_t RBAR;                   /*!< Region Base Address Register value */
-  uint32_t RLAR;                   /*!< Region Limit Address Register value */
-} ARM_MPU_Region_t;
-    
-/** Enable the MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
-__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
-{
-  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  __DSB();
-  __ISB();
-}
-
-/** Disable the MPU.
-*/
-__STATIC_INLINE void ARM_MPU_Disable(void)
-{
-  __DMB();
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
-}
-
-#ifdef MPU_NS
-/** Enable the Non-secure MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
-__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
-{
-  MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  __DSB();
-  __ISB();
-}
-
-/** Disable the Non-secure MPU.
-*/
-__STATIC_INLINE void ARM_MPU_Disable_NS(void)
-{
-  __DMB();
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  MPU_NS->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
-}
-#endif
-
-/** Set the memory attribute encoding to the given MPU.
-* \param mpu Pointer to the MPU to be configured.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
-__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
-{
-  const uint8_t reg = idx / 4U;
-  const uint32_t pos = ((idx % 4U) * 8U);
-  const uint32_t mask = 0xFFU << pos;
-  
-  if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
-    return; // invalid index
-  }
-  
-  mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
-}
-
-/** Set the memory attribute encoding.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
-__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
-{
-  ARM_MPU_SetMemAttrEx(MPU, idx, attr);
-}
-
-#ifdef MPU_NS
-/** Set the memory attribute encoding to the Non-secure MPU.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
-__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
-{
-  ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
-}
-#endif
-
-/** Clear and disable the given MPU region of the given MPU.
-* \param mpu Pointer to MPU to be used.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
-{
-  mpu->RNR = rnr;
-  mpu->RLAR = 0U;
-}
-
-/** Clear and disable the given MPU region.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
-{
-  ARM_MPU_ClrRegionEx(MPU, rnr);
-}
-
-#ifdef MPU_NS
-/** Clear and disable the given Non-secure MPU region.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
-{  
-  ARM_MPU_ClrRegionEx(MPU_NS, rnr);
-}
-#endif
-
-/** Configure the given MPU region of the given MPU.
-* \param mpu Pointer to MPU to be used.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
-{
-  mpu->RNR = rnr;
-  mpu->RBAR = rbar;
-  mpu->RLAR = rlar;
-}
-
-/** Configure the given MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
-{
-  ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
-}
-
-#ifdef MPU_NS
-/** Configure the given Non-secure MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
-{
-  ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);  
-}
-#endif
-
-/** Memcopy with strictly ordered memory access, e.g. for register targets.
-* \param dst Destination data is copied to.
-* \param src Source data is copied from.
-* \param len Amount of data words to be copied.
-*/
-__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
-{
-  uint32_t i;
-  for (i = 0U; i < len; ++i) 
-  {
-    dst[i] = src[i];
-  }
-}
-
-/** Load the given number of MPU regions from a table to the given MPU.
-* \param mpu Pointer to the MPU registers to be used.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
-{
-  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
-  if (cnt == 1U) {
-    mpu->RNR = rnr;
-    ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
-  } else {
-    uint32_t rnrBase   = rnr & ~(MPU_TYPE_RALIASES-1U);
-    uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
-    
-    mpu->RNR = rnrBase;
-    while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
-      uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
-      ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
-      table += c;
-      cnt -= c;
-      rnrOffset = 0U;
-      rnrBase += MPU_TYPE_RALIASES;
-      mpu->RNR = rnrBase;
-    }
-    
-    ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
-  }
-}
-
-/** Load the given number of MPU regions from a table.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
-{
-  ARM_MPU_LoadEx(MPU, rnr, table, cnt);
-}
-
-#ifdef MPU_NS
-/** Load the given number of MPU regions from a table to the Non-secure MPU.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
-{
-  ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
-}
-#endif
-
-#endif
-

resources/FC_camera/Drivers/CMSIS/Core/Include/tz_context.h

@@ -1,70 +0,0 @@
-/******************************************************************************
- * @file     tz_context.h
- * @brief    Context Management for Armv8-M TrustZone
- * @version  V1.0.1
- * @date     10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef TZ_CONTEXT_H
-#define TZ_CONTEXT_H
- 
-#include <stdint.h>
- 
-#ifndef TZ_MODULEID_T
-#define TZ_MODULEID_T
-/// \details Data type that identifies secure software modules called by a process.
-typedef uint32_t TZ_ModuleId_t;
-#endif
- 
-/// \details TZ Memory ID identifies an allocated memory slot.
-typedef uint32_t TZ_MemoryId_t;
-  
-/// Initialize secure context memory system
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_InitContextSystem_S (void);
- 
-/// Allocate context memory for calling secure software modules in TrustZone
-/// \param[in]  module   identifies software modules called from non-secure mode
-/// \return value != 0 id TrustZone memory slot identifier
-/// \return value 0    no memory available or internal error
-TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
- 
-/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
-/// \param[in]  id  TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
- 
-/// Load secure context (called on RTOS thread context switch)
-/// \param[in]  id  TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
- 
-/// Store secure context (called on RTOS thread context switch)
-/// \param[in]  id  TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
- 
-#endif  // TZ_CONTEXT_H

resources/FC_camera/Drivers/CMSIS/Core/Template/ARMv8-M/main_s.c

@@ -1,58 +0,0 @@
-/******************************************************************************
- * @file     main_s.c
- * @brief    Code template for secure main function
- * @version  V1.1.1
- * @date     10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2013-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* Use CMSE intrinsics */
-#include <arm_cmse.h>
- 
-#include "RTE_Components.h"
-#include CMSIS_device_header
- 
-/* TZ_START_NS: Start address of non-secure application */
-#ifndef TZ_START_NS
-#define TZ_START_NS (0x200000U)
-#endif
- 
-/* typedef for non-secure callback functions */
-typedef void (*funcptr_void) (void) __attribute__((cmse_nonsecure_call));
- 
-/* Secure main() */
-int main(void) {
-  funcptr_void NonSecure_ResetHandler;
- 
-  /* Add user setup code for secure part here*/
- 
-  /* Set non-secure main stack (MSP_NS) */
-  __TZ_set_MSP_NS(*((uint32_t *)(TZ_START_NS)));
- 
-  /* Get non-secure reset handler */
-  NonSecure_ResetHandler = (funcptr_void)(*((uint32_t *)((TZ_START_NS) + 4U)));
- 
-  /* Start non-secure state software application */
-  NonSecure_ResetHandler();
- 
-  /* Non-secure software does not return, this code is not executed */
-  while (1) {
-    __NOP();
-  }
-}

resources/FC_camera/Drivers/CMSIS/Core/Template/ARMv8-M/tz_context.c

@@ -1,200 +0,0 @@
-/******************************************************************************
- * @file     tz_context.c
- * @brief    Context Management for Armv8-M TrustZone - Sample implementation
- * @version  V1.1.1
- * @date     10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2016-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "RTE_Components.h"
-#include CMSIS_device_header
-#include "tz_context.h"
-
-/// Number of process slots (threads may call secure library code)
-#ifndef TZ_PROCESS_STACK_SLOTS
-#define TZ_PROCESS_STACK_SLOTS     8U
-#endif
-
-/// Stack size of the secure library code
-#ifndef TZ_PROCESS_STACK_SIZE
-#define TZ_PROCESS_STACK_SIZE      256U
-#endif
-
-typedef struct {
-  uint32_t sp_top;      // stack space top
-  uint32_t sp_limit;    // stack space limit
-  uint32_t sp;          // current stack pointer
-} stack_info_t;
-
-static stack_info_t ProcessStackInfo  [TZ_PROCESS_STACK_SLOTS];
-static uint64_t     ProcessStackMemory[TZ_PROCESS_STACK_SLOTS][TZ_PROCESS_STACK_SIZE/8U];
-static uint32_t     ProcessStackFreeSlot = 0xFFFFFFFFU;
-
-
-/// Initialize secure context memory system
-/// \return execution status (1: success, 0: error)
-__attribute__((cmse_nonsecure_entry))
-uint32_t TZ_InitContextSystem_S (void) {
-  uint32_t n;
-
-  if (__get_IPSR() == 0U) {
-    return 0U;  // Thread Mode
-  }
-
-  for (n = 0U; n < TZ_PROCESS_STACK_SLOTS; n++) {
-    ProcessStackInfo[n].sp = 0U;
-    ProcessStackInfo[n].sp_limit = (uint32_t)&ProcessStackMemory[n];
-    ProcessStackInfo[n].sp_top   = (uint32_t)&ProcessStackMemory[n] + TZ_PROCESS_STACK_SIZE;
-    *((uint32_t *)ProcessStackMemory[n]) = n + 1U;
-  }
-  *((uint32_t *)ProcessStackMemory[--n]) = 0xFFFFFFFFU;
-
-  ProcessStackFreeSlot = 0U;
-
-  // Default process stack pointer and stack limit
-  __set_PSPLIM((uint32_t)ProcessStackMemory);
-  __set_PSP   ((uint32_t)ProcessStackMemory);
-
-  // Privileged Thread Mode using PSP
-  __set_CONTROL(0x02U);
-
-  return 1U;    // Success
-}
-
-
-/// Allocate context memory for calling secure software modules in TrustZone
-/// \param[in]  module   identifies software modules called from non-secure mode
-/// \return value != 0 id TrustZone memory slot identifier
-/// \return value 0    no memory available or internal error
-__attribute__((cmse_nonsecure_entry))
-TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module) {
-  uint32_t slot;
-
-  (void)module; // Ignore (fixed Stack size)
-
-  if (__get_IPSR() == 0U) {
-    return 0U;  // Thread Mode
-  }
-
-  if (ProcessStackFreeSlot == 0xFFFFFFFFU) {
-    return 0U;  // No slot available
-  }
-
-  slot = ProcessStackFreeSlot;
-  ProcessStackFreeSlot = *((uint32_t *)ProcessStackMemory[slot]);
-
-  ProcessStackInfo[slot].sp = ProcessStackInfo[slot].sp_top;
-
-  return (slot + 1U);
-}
-
-
-/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
-/// \param[in]  id  TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-__attribute__((cmse_nonsecure_entry))
-uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id) {
-  uint32_t slot;
-
-  if (__get_IPSR() == 0U) {
-    return 0U;  // Thread Mode
-  }
-
-  if ((id == 0U) || (id > TZ_PROCESS_STACK_SLOTS)) {
-    return 0U;  // Invalid ID
-  }
-
-  slot = id - 1U;
-
-  if (ProcessStackInfo[slot].sp == 0U) {
-    return 0U;  // Inactive slot
-  }
-  ProcessStackInfo[slot].sp = 0U;
-
-  *((uint32_t *)ProcessStackMemory[slot]) = ProcessStackFreeSlot;
-  ProcessStackFreeSlot = slot;
-
-  return 1U;    // Success
-}
-
-
-/// Load secure context (called on RTOS thread context switch)
-/// \param[in]  id  TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-__attribute__((cmse_nonsecure_entry))
-uint32_t TZ_LoadContext_S (TZ_MemoryId_t id) {
-  uint32_t slot;
-
-  if ((__get_IPSR() == 0U) || ((__get_CONTROL() & 2U) == 0U)) {
-    return 0U;  // Thread Mode or using Main Stack for threads
-  }
-
-  if ((id == 0U) || (id > TZ_PROCESS_STACK_SLOTS)) {
-    return 0U;  // Invalid ID
-  }
-
-  slot = id - 1U;
-
-  if (ProcessStackInfo[slot].sp == 0U) {
-    return 0U;  // Inactive slot
-  }
-
-  // Setup process stack pointer and stack limit
-  __set_PSPLIM(ProcessStackInfo[slot].sp_limit);
-  __set_PSP   (ProcessStackInfo[slot].sp);
-
-  return 1U;    // Success
-}
-
-
-/// Store secure context (called on RTOS thread context switch)
-/// \param[in]  id  TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-__attribute__((cmse_nonsecure_entry))
-uint32_t TZ_StoreContext_S (TZ_MemoryId_t id) {
-  uint32_t slot;
-  uint32_t sp;
-
-  if ((__get_IPSR() == 0U) || ((__get_CONTROL() & 2U) == 0U)) {
-    return 0U;  // Thread Mode or using Main Stack for threads
-  }
-
-  if ((id == 0U) || (id > TZ_PROCESS_STACK_SLOTS)) {
-    return 0U;  // Invalid ID
-  }
-
-  slot = id - 1U;
-
-  if (ProcessStackInfo[slot].sp == 0U) {
-    return 0U;  // Inactive slot
-  }
-
-  sp = __get_PSP();
-  if ((sp < ProcessStackInfo[slot].sp_limit) ||
-      (sp > ProcessStackInfo[slot].sp_top)) {
-    return 0U;  // SP out of range
-  }
-  ProcessStackInfo[slot].sp = sp;
-
-  // Default process stack pointer and stack limit
-  __set_PSPLIM((uint32_t)ProcessStackMemory);
-  __set_PSP   ((uint32_t)ProcessStackMemory);
-
-  return 1U;    // Success
-}

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/CMakeLists.txt

@@ -1,136 +0,0 @@
-cmake_minimum_required (VERSION 3.6)
-cmake_policy(SET CMP0077 NEW)
-# The tests are assuming that MATRIX_CHECK is enabled when building
-# CMSIS-DSP.
-set(MATRIXCHECK ON)
-set(FASTMATHCOMPUTATIONS OFF)
-option(DUMPPATTERN "Dump test patterns when test is failing" ON)
-
-option(CUSTOMIZE_TESTS "Enable customizations of tests" ON)
-option(BASICMATH_TESTS "Enable Basic Math testing" ON)
-option(COMPLEXMATH_TESTS "Enable Complex Math testing" ON)
-option(CONTROLLER_TESTS "Enable Controller testing" ON)
-option(FASTMATH_TESTS "Enable Fast Math testing" ON)
-option(INTRINSICS_TESTS "Enable Intrinsics testing" ON)
-option(FILTERING_TESTS "Enable Filtering testing" ON)
-option(MATRIX_TESTS "Enable Matrix testing" ON)
-option(STATISTICS_TESTS "Enable Statistics testing" ON)
-option(SUPPORT_TESTS "Enable Support testing" ON)
-option(TRANSFORM_TESTS "Enable Transform testing" ON)
-
-
-project(DSP_Lib_TestSuite)
-
-# Needed to find the config modules
-list(APPEND CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/..)
-
-
-set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../..)
-
-
-file(GLOB MAIN "Common/src/*.c")
-file(GLOB BASICMATH_TESTS_SRC "Common/src/basic_math_tests/*.c")
-file(GLOB COMPLEXMATH_TESTS_SRC "Common/src/complex_math_tests/*.c")
-file(GLOB CONTROLLER_TESTS_SRC "Common/src/controller_tests/*.c")
-file(GLOB FASTMATH_TESTS_SRC "Common/src/fast_math_tests/*.c")
-file(GLOB FILTERING_TESTS_SRC "Common/src/filtering_tests/*.c")
-file(GLOB INTRINSINCS_TESTS_SRC "Common/src/intrinsics_tests/*.c")
-file(GLOB MATRIX_TESTS_SRC "Common/src/matrix_tests/*.c")
-file(GLOB STATISTICS_TESTS_SRC "Common/src/statistics_tests/*.c")
-file(GLOB SUPPORT_TESTS_SRC "Common/src/support_tests/*.c")
-file(GLOB TRANSFORM_TESTS_SRC "Common/src/transform_tests/*.c")
-file(GLOB JTEST_MAIN "Common/JTest/src/*.c")
-
-set(TESTSRC ${MAIN}
-  ${BASICMATH_TESTS_SRC}
-  ${COMPLEXMATH_TESTS_SRC}
-  ${CONTROLLER_TESTS_SRC}
-  ${FASTMATH_TESTS_SRC}
-  ${FILTERING_TESTS_SRC}
-  ${INTRINSINCS_TESTS_SRC}
-  ${MATRIX_TESTS_SRC}
-  ${STATISTICS_TESTS_SRC}
-  ${SUPPORT_TESTS_SRC}
-  ${TRANSFORM_TESTS_SRC}
-  ${JTEST_MAIN}
-  )
-
-set(JINCS 
-  Common/JTest/inc
-  Common/JTest/inc/arr_desc
-  Common/inc/basic_math_tests
-  Common/inc/complex_math_tests
-  Common/inc/controller_tests
-  Common/inc/fast_math_tests
-  Common/inc/filtering_tests
-  Common/inc/intrinsics_tests
-  Common/inc/matrix_tests
-  Common/inc/statistics_tests 
-  Common/inc/support_tests 
-  Common/inc/transform_tests
-  )
-
-add_subdirectory(../Source bin_dsp)
-add_subdirectory(RefLibs bin_ref)
-
-
-add_executable(DSP_Lib_TestSuite)
-
-if (CUSTOMIZE_TESTS)
-      target_compile_definitions(DSP_Lib_TestSuite PRIVATE CUSTOMIZE_TESTS)
-endif()
-
-if (BASICMATH_TESTS)
-      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_BASICMATH_TESTS)
-endif()
-if (COMPLEXMATH_TESTS)
-      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_COMPLEXMATH_TESTS)
-endif()
-if (CONTROLLER_TESTS)
-      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_CONTROLLER_TESTS)
-endif()
-if (FASTMATH_TESTS)
-      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_FASTMATH_TESTS)
-endif()
-if (FILTERING_TESTS)
-      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_FILTERING_TESTS)
-endif()
-if (INTRINSICS_TESTS)
-      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_INTRINSICS_TESTS)
-endif()
-if (MATRIX_TESTS)
-      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_MATRIX_TESTS)
-endif()
-if (STATISTICS_TESTS)
-      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_STATISTICS_TESTS)
-endif()
-if (SUPPORT_TESTS)
-      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_SUPPORT_TESTS)
-endif()
-if (TRANSFORM_TESTS)
-      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_TRANSFORM_TESTS)
-endif()
-
-
-if (DUMPPATTERN)
-      target_compile_definitions(DSP_Lib_TestSuite PRIVATE DUMPPATTERN)
-endif()
-
-# Change behavior of configBoot for scatter file
-set(TESTFRAMEWORK ON)
-
-include(configBoot)
-
-file(COPY ${ROOT}/CMSIS/DSP/Examples/ARM/boot/RTE_Components.h DESTINATION tempLink)
-
-target_link_libraries(DSP_Lib_TestSuite PRIVATE CMSISDSP)
-target_link_libraries(DSP_Lib_TestSuite PRIVATE DspRefLibs)
-
-target_sources(DSP_Lib_TestSuite PRIVATE ${TESTSRC})
-
-### Includes
-target_include_directories(DSP_Lib_TestSuite PRIVATE "Common/inc")
-target_include_directories(DSP_Lib_TestSuite PRIVATE "Common/inc/templates")
-target_include_directories(DSP_Lib_TestSuite PRIVATE ${JINCS})
-
-

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/arr_desc/arr_desc.h

@@ -1,220 +0,0 @@
-#ifndef _ARR_DESC_H_
-#define _ARR_DESC_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-#include <stdint.h>
-#include <string.h>             /* memset() */
-#include "../util/util.h"       /* CONCAT() */
-
-/*--------------------------------------------------------------------------------*/
-/* Type Definitions */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Array-descriptor struct.
- */
-typedef struct ARR_DESC_struct
-{
-    void *  data_ptr;                /* Pointer to the array contents. */
-    int32_t element_count;           /* Number of current elements. */
-    int32_t element_size;            /* Size of current elements in bytes. */
-    int32_t underlying_size;         /* Size of underlying array in bytes. */
-} ARR_DESC_t;
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Prefix of the array variable's name when creating an array and an array
- *  descriptor at the same time.
- */
-#define ARR_DESC_ARR_PREFIX ARR_DESC_ARR_
-
-/**
- *  Evaluate to the array variable's name when creating an array and an array
- *  descriptor at the same time.
- */
-#define ARR_DESC_ARR_NAME(name)                 \
-    CONCAT(ARR_DESC_ARR_PREFIX, name)
-
-/**
- *  Define an #ARR_DESC_t by itself.
- *
- *  @note The user must supply an array to store the data used by the
- *  #ARR_DESC_t.
- */
-#define ARR_DESC_INTERNAL_DEFINE(name, data_ptr,                \
-                                 element_count, element_size)   \
-    ARR_DESC_t name = {                                         \
-        data_ptr,                                               \
-        element_count,                                          \
-        element_size,                                           \
-        element_count * element_size                            \
-    }                                                           \
-
-/**
- *  Define both an array and an #ARR_DESC_t that describes it.
- *
- *  @note Use the #CURLY() macro for the content field; it provides the curly
- *  braces necessary for an array initialization.
- */
-#define ARR_DESC_DEFINE(type, name, element_count, content)             \
-    type ARR_DESC_ARR_NAME(name)[element_count] = content;              \
-    ARR_DESC_INTERNAL_DEFINE(name,                                      \
-                             &ARR_DESC_ARR_NAME(name),                  \
-                             element_count,                             \
-                             sizeof(type)) /* Note the lacking semicolon */
-
-/**
- *  Create a #ARR_DESC_t which refers to a subset of the data in another.
- *
- *  The new #ARR_DESC_t shares the same underlying array as the aliased
- *  #ARR_DESC_t, but only describes a subset of the originals values.
- */
-#define ARR_DESC_DEFINE_SUBSET(name, original, element_cnt)         \
-    ARR_DESC_INTERNAL_DEFINE(name,                                  \
-                             &ARR_DESC_ARR_NAME(original),          \
-                             element_cnt,                           \
-                             sizeof(ARR_DESC_ARR_NAME(original)[0]) \
-        ) /* Note the lacking semicolon */
-
-/**
- *  Creat an #ARR_DESC_t which points to the data in an existing array.
- *
- *  @param start_idx Offset in array_ptr of first element.
- *  @param element_cnt Number of elements to include in the #ARR_DESC_t.
- *
- *  @example
- *
- *  float my_floats[4] = {0.0f, 1.0f, 2.0f, 3.0f};
- *
- *  ARR_DESC_DEFINE_USING_ARR(my_arr_desc, my_floats, 1, 3);
- *
- *  printf("Element 0: %f\n", ARR_DESC_ELT(float, 0, &my_arr_desc));
- *  printf("Element 1: %f\n", ARR_DESC_ELT(float, 1, &my_arr_desc));
- *
- *  Outputs:
- *
- *  Element 0: 1.000000
- *  Element 1: 2.000000
- *
- *  @warning There are no checks in place to catch invalid start indices; This
- *  is left to the user.
- */
-#define ARR_DESC_DEFINE_USING_ARR(type, name, array_ptr, start_idx, element_cnt) \
-    ARR_DESC_INTERNAL_DEFINE(                                           \
-        name,                                                           \
-        (type *) (array_ptr + start_idx),                               \
-        element_cnt,                                                    \
-        sizeof(type)                                                    \
-        ) /* Note the lacking semicolon*/
-
-/**
- *  Declare an #ARR_DESC_t object.
- */
-#define ARR_DESC_DECLARE(name)                              \
-    extern ARR_DESC_t name /* Note the lacking semicolon */
-
-/**
- *  Evaluate to the number of bytes stored in the #ARR_DESC_t.
- */
-#define ARR_DESC_BYTES(arr_desc_ptr)                                \
-    ((arr_desc_ptr)->element_count * (arr_desc_ptr)->element_size)
-
-/**
- *  Set the contents of #ARR_DESC_t to value.
- */
-#define ARR_DESC_MEMSET(arr_desc_ptr, value, bytes)     \
-    do                                                  \
-    {                                                   \
-        memset((arr_desc_ptr)->data_ptr,                \
-               value,                                   \
-               BOUND(0,                                 \
-                     (arr_desc_ptr)->underlying_size,   \
-                     bytes)                             \
-            );                                          \
-    } while (0)
-
-/**
- *  Perform a memcpy of 'bytes' bytes from the source #ARR_DESC_t to the
- *  destination #ARR_DESC_t.
- */
-#define ARR_DESC_MEMCPY(arr_desc_dest_ptr, arr_desc_src_ptr, bytes) \
-    do                                                              \
-    {                                                               \
-        memcpy((arr_desc_dest_ptr)->data_ptr,                       \
-               (arr_desc_src_ptr)->data_ptr,                        \
-               BOUND(0,                                             \
-                     (arr_desc_dest_ptr)->underlying_size,          \
-                     bytes));                                       \
-    } while (0)
-
-/**
- *  Evaluate to true if the source #ARR_DESC_t contents will fit into the
- *  destination #ARR_DESC_t and false otherwise.
- */
-#define ARR_DESC_COPYABLE(arr_desc_dest_ptr, arr_desc_src_ptr)  \
-      (ARR_DESC_BYTES(arr_desc_src_ptr) <=                      \
-       (arr_desc_dest_ptr)->underlying_size)
-
-/**
- *  Copy all the data from the source #ARR_DESC_t to the destination
- *  #ARR_DESC_t.
- *
- *  @note If the destination #ARR_DESC_t is too small to fit the source data the
- *  copy is aborted and nothing happens.
- */
-#define ARR_DESC_COPY(arr_desc_dest_ptr, arr_desc_src_ptr)      \
-    do                                                          \
-    {                                                           \
-        if (ARR_DESC_COPYABLE(arr_desc_dest_ptr,                 \
-                             arr_desc_src_ptr))                 \
-        {                                                       \
-            ARR_DESC_MEMCPY(arr_desc_dest_ptr,                  \
-                            arr_desc_src_ptr,                   \
-                            ARR_DESC_BYTES(arr_desc_src_ptr));  \
-            /* Update the properties*/                          \
-            (arr_desc_dest_ptr)->element_count =                \
-                (arr_desc_src_ptr)->element_count;              \
-            (arr_desc_dest_ptr)->element_size =                 \
-                (arr_desc_src_ptr)->element_size;               \
-        }                                                       \
-    } while (0)
-
-/**
- *  Compare the data in two #ARR_DESC_t structs for the specified number of
- *  bytes.
- */
-#define ARR_DESC_MEMCMP(arr_desc_ptr_a, arr_desc_ptr_b, bytes)  \
-        memcmp((arr_desc_ptr_a)->data_ptr,                      \
-            (arr_desc_ptr_b)->data_ptr,                         \
-               bytes) /* Note the lacking semicolon */          \
-
-/**
- *  Zero out the contents of the #ARR_DESC_t.
- */
-#define ARR_DESC_ZERO(arr_desc_ptr)             \
-        ARR_DESC_MEMSET(arr_desc_ptr,           \
-                        0,                      \
-                        (arr_desc_ptr)->underlying_size)
-
-/**
- *  Evaluate to the data address in #ARR_DESC_t at offset.
- */
-#define ARR_DESC_DATA_ADDR(type, arr_desc_ptr, offset)  \
-        ((void*)(((type *)                              \
-                  ((arr_desc_ptr)->data_ptr))           \
-                 + offset))
-
-/**
- *  Evaluate to the element in #ARR_DESC_t with type at idx.
- */
-#define ARR_DESC_ELT(type, idx, arr_desc_ptr)           \
-        (*((type *) ARR_DESC_DATA_ADDR(type,            \
-                                       arr_desc_ptr,    \
-                                       idx)))
-
-#endif /* _ARR_DESC_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest.h

@@ -1,17 +0,0 @@
-#ifndef _JTEST_H_
-#define _JTEST_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "jtest_fw.h"
-#include "jtest_test.h"
-#include "jtest_test_define.h"
-#include "jtest_test_call.h"
-#include "jtest_group.h"
-#include "jtest_group_define.h"
-#include "jtest_group_call.h"
-#include "jtest_cycle.h"
-
-#endif /* _JTEST_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_cycle.h

@@ -1,79 +0,0 @@
-#ifndef _JTEST_CYCLE_H_
-#define _JTEST_CYCLE_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "jtest_fw.h"           /* JTEST_DUMP_STRF() */
-#include "jtest_systick.h"
-#include "jtest_util.h"         /* STR() */
-
-/*--------------------------------------------------------------------------------*/
-/* Declare Module Variables */
-/*--------------------------------------------------------------------------------*/
-extern const char * JTEST_CYCLE_STRF;
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Wrap the function call, fn_call, to count execution cycles and display the
- *  results.
- */
-/* skipp function name + param
-#define JTEST_COUNT_CYCLES(fn_call)                     \
-    do                                                  \
-    {                                                   \
-        uint32_t __jtest_cycle_end_count;               \
-                                                        \
-        JTEST_SYSTICK_RESET(SysTick);                   \
-        JTEST_SYSTICK_START(SysTick);                   \
-                                                        \
-        fn_call;                                        \
-                                                        \
-        __jtest_cycle_end_count =                       \
-            JTEST_SYSTICK_VALUE(SysTick);               \
-                                                        \
-		JTEST_SYSTICK_RESET(SysTick);                   \
-        JTEST_DUMP_STRF(JTEST_CYCLE_STRF,               \
-                        STR(fn_call),                   \
-                        (JTEST_SYSTICK_INITIAL_VALUE -  \
-                         __jtest_cycle_end_count));     \
-    } while (0)
-*/
-#ifndef ARMv7A
-
-#define JTEST_COUNT_CYCLES(fn_call)                     \
-    do                                                  \
-    {                                                   \
-        uint32_t __jtest_cycle_end_count;               \
-                                                        \
-        JTEST_SYSTICK_RESET(SysTick);                   \
-        JTEST_SYSTICK_START(SysTick);                   \
-                                                        \
-        fn_call;                                        \
-                                                        \
-        __jtest_cycle_end_count =                       \
-            JTEST_SYSTICK_VALUE(SysTick);               \
-                                                        \
-		JTEST_SYSTICK_RESET(SysTick);           \
-        JTEST_DUMP_STRF(JTEST_CYCLE_STRF,               \
-                        (JTEST_SYSTICK_INITIAL_VALUE -  \
-                         __jtest_cycle_end_count));     \
-    } while (0)
-
-#else
-/* TODO */
-#define JTEST_COUNT_CYCLES(fn_call)                     \
-    do                                                  \
-    {                                                   \
-		fn_call;   										\
-    } while (0)
-
-#endif
-
-#endif /* _JTEST_CYCLE_H_ */
-
-

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_define.h

@@ -1,37 +0,0 @@
-#ifndef _JTEST_DEFINE_H_
-#define _JTEST_DEFINE_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Makes a symbol for use as a struct name. Names made this way have two parts;
- *  the first parts is a prefix common to all structs of that class. The second
- *  is a specifier which differs for each instance of that struct type.
- */
-#define JTEST_STRUCT_NAME(prefix, specifier)    \
-    CONCAT(prefix, specifier)
-
-/**
- *  Define a struct with type with a name generated by #JTEST_STRUCT_NAME().
- */
-#define JTEST_DEFINE_STRUCT(type, struct_name)    \
-    type struct_name
-
-/**
- *  Declare a struct with type with a name generated by #JTEST_STRUCT_NAME().
- */
-#define JTEST_DECLARE_STRUCT(struct_definition) \
-    extern struct_definition
-
-/**
- *  Define and initialize a struct (created with JTEST_DEFINE_STRUCT()) and
- *  initialize it with init_values.
- */
-#define JTEST_INIT_STRUCT(struct_definition, init_values)       \
-    struct_definition = {                                       \
-        init_values                                             \
-    }
-
-#endif /* _JTEST_DEFINE_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_fw.h

@@ -1,282 +0,0 @@
-#ifndef _JTEST_FW_H_
-#define _JTEST_FW_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include <stdint.h>             /* int32_t */
-#include <string.h>             /* strcpy() */
-#include <stdio.h>              /* sprintf() */
-#include "jtest_pf.h"           /* Extend JTEST_FW_t with Pass/Fail data */
-#include "jtest_group.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Type Definitions */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  A struct used to interface with the Keil Debugger.
- */
-typedef struct JTEST_FW_struct
-{
-    /* Action Triggers: The Keil debugger monitors these values for changes.  In
-     * response to a change, the debugger executes code on the host. */
-    volatile int32_t test_start;
-    volatile int32_t test_end;
-    volatile int32_t group_start;
-    volatile int32_t group_end;
-    volatile int32_t dump_str;
-    volatile int32_t dump_data;
-    volatile int32_t exit_fw;
-
-    JTEST_GROUP_t * current_group_ptr;
-
-    /* Buffers: The C-code cannot send strings and data directly to the
-     * debugging framework. Instead, the debugger can be told to read 128 byte
-     * (by default) chunks of memory.  Data received in this manner requires
-     * post-processing to be legible.*/
-    char * str_buffer;
-    char * data_buffer;
-
-    /* Pass/Fail Data */
-    JTEST_PF_MEMBERS;
-
-} JTEST_FW_t;
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Default name for the JTEST_FW struct.
- *
- *  Define your own if you want the variable containing the #JTEST_FW_t to have
- *  a different name.
- */
-#ifndef JTEST_FW
-#define JTEST_FW JTEST_FW
-#endif
-
-/**
- *  Default name for the JTEST_FW_STR_BUFFER.
- *
- *  Define your own if you want the variable containing the char buffer to have
- *  a different name.
- */
-#ifndef JTEST_FW_STR_BUFFER
-#define JTEST_FW_STR_BUFFER JTEST_FW_STR_BUFFER
-#endif
-
-/**
- *  Size of the #JTEST_FW_t, output string-buffer.
- *
- *  If you change this value, make sure the "dump_str_fn" and "dump_data_fn"
- *  functions in jtest_fns.ini uses the same size. If you aren't sure, read the
- *  documentation Keil Debugger Command 'DISPLAY'.
- */
-#define JTEST_BUF_SIZE 256
-
-
-/**
- *  The maximum number of bytes output at once using #JTEST_DUMP_STRF().
- */
-#define JTEST_STR_MAX_OUTPUT_SIZE 128
-
-/**
- *  The maximum number of block transimissions needed to send a string from a
- *  buffer with JTEST_BUF_SIZE.
- */
-#define JTEST_STR_MAX_OUTPUT_SEGMENTS           \
-    (JTEST_BUF_SIZE / JTEST_STR_MAX_OUTPUT_SIZE)
-
-/**
- *  Initialize the JTEST framework.
- */
-#define JTEST_INIT()                                                    \
-    do                                                                  \
-    {                                                                   \
-        JTEST_FW.str_buffer = JTEST_FW_STR_BUFFER;                      \
-    } while (0)
-
-/* Debugger Action-triggering Macros */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Dispatch macro to trigger various actions in the Keil Debugger.
- */
-#define JTEST_TRIGGER_ACTION(action_name)       \
-    do                                          \
-    {                                           \
-        action_name();                          \
-    } while (0)
-
-/**
- *  Trigger the "Test Start" action in the Keil Debugger.
- */
-#define JTEST_ACT_TEST_START()                  \
-    JTEST_TRIGGER_ACTION(test_start)
-
-/**
- *  Trigger the "Test End" action in the Keil Debugger.
- */
-#define JTEST_ACT_TEST_END()                    \
-    JTEST_TRIGGER_ACTION(test_end)
-
-
-/**
- *  Trigger the "Group Start" action in the Keil Debugger.
- */
-#define JTEST_ACT_GROUP_START()                 \
-    JTEST_TRIGGER_ACTION(group_start)
-
-/**
- *  Trigger the "Group End" action in the Keil Debugger.
- */
-#define JTEST_ACT_GROUP_END()                   \
-    JTEST_TRIGGER_ACTION(group_end)
-
-
-/**
- *  Fill the buffer named buf_name with value and dump it to the Keil debugger
- *  using action.
- */
-#if defined(ARMv7A) || defined(FILEIO)
-
-#define JTEST_ACT_DUMP(action, buf_name, value) \
-    do                                          \
-    {                                           \
-        JTEST_CLEAR_BUFFER(buf_name);           \
-	    printf("%s",value);                     \
-        strcpy(JTEST_FW.buf_name, (value));     \
-        JTEST_TRIGGER_ACTION(action);           \
-    } while (0)
-
-#else
-
-#define JTEST_ACT_DUMP(action, buf_name, value) \
-    do                                          \
-    {                                           \
-        JTEST_CLEAR_BUFFER(buf_name);           \
-        strcpy(JTEST_FW.buf_name, (value));     \
-        JTEST_TRIGGER_ACTION(action);           \
-    } while (0)
-
-#endif
-/**
- *  Trigger the "Exit Framework" action in the Keil Debugger.
- */
-#define JTEST_ACT_EXIT_FW()                     \
-    do                                          \
-    {                                           \
-        JTEST_TRIGGER_ACTION(exit_fw);          \
-    } while (0)
-
-
-/* Buffer Manipulation Macros */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Clear the JTEST_FW buffer with name buf_name.
- */
-#define JTEST_CLEAR_BUFFER(buf_name)                    \
-    do                                                  \
-    {                                                   \
-        memset(JTEST_FW.buf_name, 0, JTEST_BUF_SIZE);   \
-    } while (0)
-
-/**
- *  Clear the memory needed for the JTEST_FW's string buffer.
- */
-#define JTEST_CLEAR_STR_BUFFER()                \
-        JTEST_CLEAR_BUFFER(str_buffer)
-
-/**
- *  Clear the memory needed for the JTEST_FW's data buffer.
- */
-#define JTEST_CLEAR_DATA_BUFFER()               \
-        JTEST_CLEAR_BUFFER(data_buffer)
-
-/**
- *  Dump the given string to the Keil Debugger.
- */
-#define JTEST_DUMP_STR(string)                          \
-        JTEST_ACT_DUMP(dump_str, str_buffer, string)
-
-/**
- *  Dump a formatted string to the Keil Debugger.
- */
-#if defined(ARMv7A) || defined(FILEIO)
-
-#define JTEST_DUMP_STRF(format_str, ... )                               \
-    do                                                                  \
-    {                                                                   \
-        JTEST_CLEAR_STR_BUFFER();                                       \
-        sprintf(JTEST_FW.str_buffer,format_str, __VA_ARGS__);           \
-        printf("%s",JTEST_FW.str_buffer);                               \
-        jtest_dump_str_segments();                                      \
-    } while (0)
-
-#else
-
-#define JTEST_DUMP_STRF(format_str, ... )                               \
-    do                                                                  \
-    {                                                                   \
-        JTEST_CLEAR_STR_BUFFER();                                       \
-        sprintf(JTEST_FW.str_buffer,format_str, __VA_ARGS__);           \
-        jtest_dump_str_segments();                                      \
-    } while (0)
-
-#endif
-
-/* Pass/Fail Macros */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Increment the number of passed tests in #JTEST_FW.
- */
-#define JTEST_FW_INC_PASSED(amount)             \
-        JTEST_PF_INC_PASSED(&JTEST_FW, amount)
-
-/**
- *  Increment the number of passed tests in #JTEST_FW.
- */
-#define JTEST_FW_INC_FAILED(amount)             \
-        JTEST_PF_INC_FAILED(&JTEST_FW, amount)
-
-/* Manipulating the Current Group */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Evaluate to the current_group_ptr in #JTEST_FW.
- */
-#define JTEST_CURRENT_GROUP_PTR()               \
-    (JTEST_FW.current_group_ptr)
-
-#define JTEST_SET_CURRENT_GROUP(group_ptr)      \
-    do                                          \
-    {                                           \
-        JTEST_CURRENT_GROUP_PTR() = group_ptr;  \
-    } while (0)
-
-/*--------------------------------------------------------------------------------*/
-/* Declare Global Variables */
-/*--------------------------------------------------------------------------------*/
-extern char JTEST_FW_STR_BUFFER[JTEST_BUF_SIZE];
-extern volatile JTEST_FW_t JTEST_FW;
-
-/*--------------------------------------------------------------------------------*/
-/* Function Prototypes */
-/*--------------------------------------------------------------------------------*/
-void jtest_dump_str_segments(void);
-
-void test_start  (void);
-void test_end    (void);
-void group_start (void);
-void group_end   (void);
-void dump_str    (void);
-void dump_data   (void);
-void exit_fw     (void);
-
-
-#endif /* _JTEST_FW_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_group.h

@@ -1,66 +0,0 @@
-#ifndef _JTEST_GROUP_H_
-#define _JTEST_GROUP_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "jtest_pf.h"
-#include "jtest_util.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Type Definitions */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  A struct which represents a group of #JTEST_TEST_t structs. This struct is
- *  used to run the group of tests, and report on their outcomes.
- */
-typedef struct JTEST_GROUP_struct
-{
-    void (* group_fn_ptr) (void); /**< Pointer to the test group */
-    char * name_str;              /**< Name of the group */
-    
-    /* Extend the #JTEST_GROUP_t with Pass/Fail information.*/
-    JTEST_PF_MEMBERS;
-} JTEST_GROUP_t;
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Set the name of JTEST_GROUP_t.
- */
-#define JTEST_GROUP_SET_NAME(group_ptr, name)     \
-    JTEST_SET_STRUCT_ATTRIBUTE(group_ptr, name_str, name)
-
-#define JTEST_GROUP_SET_FN(group_ptr, fn_ptr)     \
-    JTEST_SET_STRUCT_ATTRIBUTE(group_ptr, group_fn_ptr, fn_ptr)
-
-/**
- *  Increment the number of tests passed in the JTEST_GROUP_t pointed to by
- *  group_ptr.
- */
-#define JTEST_GROUP_INC_PASSED(group_ptr, amount) \
-    JTEST_PF_INC_PASSED(group_ptr, amount)
-
-/**
- *  Increment the number of tests failed in the JTEST_GROUP_t pointed to by
- *  group_ptr.
- */
-#define JTEST_GROUP_INC_FAILED(group_ptr, amount) \
-    JTEST_PF_INC_FAILED(group_ptr, amount)
-
-/**
- *  Reset the pass/fail information of the #JTEST_GROUP_t pointed to by
- *  group_ptr.
- */
-#define JTEST_GROUP_RESET_PF(group_ptr)         \
-    do                                          \
-    {                                           \
-        JTEST_PF_RESET_PASSED(group_ptr);       \
-        JTEST_PF_RESET_FAILED(group_ptr);       \
-    } while (0)
-
-#endif /* _JTEST_GROUP_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_group_call.h

@@ -1,126 +0,0 @@
-#ifndef _JTEST_GROUP_CALL_H_
-#define _JTEST_GROUP_CALL_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "jtest_fw.h"
-#include <inttypes.h>
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Execute the test in the #JTEST_GROUP_t struct associated witht he identifier
- *  group_fn.
- */
-#define JTEST_GROUP_RUN(group_fn)                                   \
-    do                                                              \
-    {                                                               \
-        JTEST_DUMP_STR("Group Name:\n");                            \
-        JTEST_DUMP_STR(JTEST_GROUP_STRUCT_NAME(group_fn).name_str); \
-        JTEST_GROUP_STRUCT_NAME(group_fn).group_fn_ptr();           \
-    } while (0)
-
-
-/**
- *  Update the enclosing #JTEST_GROUP_t's pass/fail information using the
- *  current #JTEST_GROUP_t's.
- *
- *  @param group_ptr Pointer to the current #JTEST_GROUP_t.
- *  @param parent_ptr Pointer to the enclosing #JTEST_GROUP_t.
- *
- *  @warning Only run this if the current #JTEST_GROUP_t is being called within
- *  the context of another #JTEST_GROUP_t.
- */
-#define JTEST_GROUP_UPDATE_PARENT_GROUP_PF(group_ptr, parent_group_ptr) \
-    do                                                                  \
-    {                                                                   \
-        JTEST_GROUP_INC_PASSED(parent_group_ptr,                        \
-                               (group_ptr)->passed);                    \
-        JTEST_GROUP_INC_FAILED(parent_group_ptr,                        \
-                               (group_ptr)->failed);                    \
-    } while (0)
-
-/**
- *  Update the #JTEST_FW's pass/fail information using the current
- *  #JTEST_GROUP_t's.
- */
-#define JTEST_GROUP_UPDATE_FW_PF(group_ptr)                     \
-    do                                                          \
-    {                                                           \
-        JTEST_FW_INC_PASSED((group_ptr)->passed);               \
-        JTEST_FW_INC_FAILED((group_ptr)->failed);               \
-    } while (0)
-
-/**
- *  Update the enclosing context with the current #JTEST_GROUP_t's pass/fail
- *  information. If this group isn't in an enclosing group, it updates the
- *  #JTEST_FW's pass/fail info by default.
- */
-#define JTEST_GROUP_UPDATE_PARENT_GROUP_OR_FW_PF(group_ptr,         \
-                                                 parent_group_ptr)  \
-    do                                                              \
-    {                                                               \
-        /* Update the pass fail counts in the parent group */       \
-        if (parent_group_ptr /* Null implies Top*/)                 \
-        {                                                           \
-            JTEST_GROUP_UPDATE_PARENT_GROUP_PF(                     \
-                group_ptr,                                          \
-                parent_group_ptr);                                  \
-        } else {                                                    \
-            JTEST_GROUP_UPDATE_FW_PF(                               \
-                group_ptr);                                         \
-        }                                                           \
-    } while (0)
-
-/**
- *  Dump the results of running the #JTEST_GROUP_t to the Keil Debugger.
- */
-#define JTEST_GROUP_DUMP_RESULTS(group_ptr)                             \
-        do                                                              \
-        {                                                               \
-            JTEST_DUMP_STRF(                                            \
-                "Tests Run: %" PRIu32 "\n"                              \
-                "----------\n"                                          \
-                "   Passed: %" PRIu32 "\n"                              \
-                "   Failed: %" PRIu32 "\n",                             \
-                (group_ptr)->passed + (group_ptr)->failed,              \
-                (group_ptr)->passed,                                    \
-                (group_ptr)->failed);                                   \
-        } while (0)
-
-/**
- *  Call the #JTEST_GROUP_t associated with the identifier group_fn.
- */
-#define JTEST_GROUP_CALL(group_fn)                                      \
-        do                                                              \
-        {   /* Save the current group from JTEST_FW_t before swapping */ \
-            /* it to this group (in order to restore it later )*/       \
-            JTEST_GROUP_t * __jtest_temp_group_ptr =                    \
-                JTEST_CURRENT_GROUP_PTR();                              \
-            JTEST_SET_CURRENT_GROUP(&JTEST_GROUP_STRUCT_NAME(group_fn)); \
-                                                                        \
-            /* Reset this group's pass/fail count. Each group */        \
-            /* should only remember counts for its last execution. */   \
-            JTEST_GROUP_RESET_PF(JTEST_CURRENT_GROUP_PTR());            \
-                                                                        \
-            /* Run the current group */                                 \
-            JTEST_ACT_GROUP_START();                                    \
-            JTEST_GROUP_RUN(group_fn);                                  \
-            JTEST_ACT_GROUP_END();                                      \
-                                                                        \
-            /* Update the pass fail counts in the parent group (or FW) */ \
-            JTEST_GROUP_UPDATE_PARENT_GROUP_OR_FW_PF(                   \
-                JTEST_CURRENT_GROUP_PTR(),                              \
-                __jtest_temp_group_ptr);                                \
-                                                                        \
-            JTEST_GROUP_DUMP_RESULTS(JTEST_CURRENT_GROUP_PTR());        \
-                                                                        \
-            /* Restore the previously current group */                  \
-            JTEST_SET_CURRENT_GROUP(__jtest_temp_group_ptr);            \
-        } while (0)
-
-#endif /* _JTEST_GROUP_CALL_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_group_define.h

@@ -1,87 +0,0 @@
-#ifndef _JTEST_GROUP_DEFINE_H_
-#define _JTEST_GROUP_DEFINE_H_
-
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "jtest_util.h"
-#include "jtest_define.h"
-#include "jtest_group.h"
-
-/* For defining macros with optional arguments */
-#include "opt_arg/opt_arg.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Prefix for all #JTEST_GROUP_t structs.
- */
-#define JTEST_GROUP_STRUCT_NAME_PREFIX G_JTEST_GROUP_STRUCT_
-
-/**
- *  Define test template used by #JTEST_GROUP_t tests.
- */
-#define JTEST_GROUP_FN_TEMPLATE(group_fn)    \
-    void group_fn(void)
-
-#define JTEST_GROUP_FN_PROTOTYPE JTEST_GROUP_FN_TEMPLATE /**< Alias for
-                                                            #JTEST_GROUP_FN_TEMPLATE. */
-
-/**
- *  Evaluate to the name of the #JTEST_GROUP_t struct associated with group_fn.
- */
-#define JTEST_GROUP_STRUCT_NAME(group_fn)    \
-    JTEST_STRUCT_NAME(JTEST_GROUP_STRUCT_NAME_PREFIX, group_fn)
-
-/**
- *  Define a #JTEST_GROUP_t struct based on the given group_fn.
- */
-#define JTEST_GROUP_DEFINE_STRUCT(group_fn)  \
-    JTEST_DEFINE_STRUCT(JTEST_GROUP_t,       \
-                        JTEST_GROUP_STRUCT_NAME(group_fn))
-
-/**
- *  Declare a #JTEST_GROUP_t struct based on the given group_fn.
- */
-#define JTEST_GROUP_DECLARE_STRUCT(group_fn) \
-    JTEST_DECLARE_STRUCT(JTEST_GROUP_DEFINE_STRUCT(group_fn))
-
-/**
- *  Contents needed to initialize a JTEST_GROUP_t struct.
- */
-#define JTEST_GROUP_STRUCT_INIT(group_fn)    \
-    group_fn,                                \
-        STR_NL(group_fn),                       \
-        JTEST_PF_MEMBER_INIT
-
-/**
- *  Initialize the contents of a #JTEST_GROUP_t struct.
- */
-#define JTEST_GROUP_INIT(group_fn)           \
-    JTEST_GROUP_DEFINE_STRUCT(group_fn) = {  \
-        JTEST_GROUP_STRUCT_INIT(group_fn)    \
-    }
-
-/* Test Definition Macro */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Define a #JTEST_GROUP_t object and a test function.
- */
-#define JTEST_DEFINE_GROUP(group_fn)         \
-    JTEST_GROUP_FN_PROTOTYPE(group_fn);      \
-    JTEST_GROUP_INIT(group_fn);              \
-    JTEST_GROUP_FN_PROTOTYPE(group_fn) /* Notice the lacking semicolon */
-
-/**
- *  Declare a #JTEST_GROUP_t object and a test function prototype.
- */
-#define JTEST_DECLARE_GROUP(group_fn)        \
-    JTEST_GROUP_FN_PROTOTYPE(group_fn);      \
-    JTEST_GROUP_DECLARE_STRUCT(group_fn) /* Note the lacking semicolon */
-
-#endif /* _JTEST_GROUP_DEFINE_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_pf.h

@@ -1,85 +0,0 @@
-#ifndef _JTEST_PF_H_
-#define _JTEST_PF_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Purpose */
-/*--------------------------------------------------------------------------------*/
-/* jtest_pf.h Contains macros useful for capturing pass/fail data. */
-
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-/**
- * Members that can be added to other structs to extend them pass/fail data and
- * corresponding functionality.
- */
-#define JTEST_PF_MEMBERS                            \
-    uint32_t passed;                                \
-    uint32_t failed /* Note the lacking semicolon*/ \
-
-/**
- *  Used for initializing JTEST_PF_MEMBERS in a struct declaration.
- */
-#define JTEST_PF_MEMBER_INIT                    \
-    0,                                          \
-    0
-
-/* Member-Incrementing Macros */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Dispatch macro for incrementing #JTEST_PF_MEMBERS.
- *
- *  @param xxx Values: 'passed', 'failed'
- */
-#define JTEST_PF_INC_XXX(xxx, struct_pf_ptr, amount)    \
-    do                                                  \
-    {                                                   \
-        ((struct_pf_ptr)->xxx) += (amount);             \
-    } while (0)
-
-/**
- *  Specialization of the #JTEST_PF_INC_XXX macro to increment the passed
- *  member.
- */
-#define JTEST_PF_INC_PASSED(struct_pf_ptr, amount)  \
-    JTEST_PF_INC_XXX(passed, struct_pf_ptr, amount)
-
-
-/**
- *  Specialization of the #JTEST_PF_INC_XXX macro to increment the failed
- *  member.
- */
-#define JTEST_PF_INC_FAILED(struct_pf_ptr, amount)  \
-    JTEST_PF_INC_XXX(failed, struct_pf_ptr, amount)
-
-
-/* Member-Resetting Macros */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Dispatch macro for setting #JTEST_PF_MEMBERS to zero.
- *
- *  @param xxx Values: 'passed', 'failed'
- */
-#define JTEST_PF_RESET_XXX(xxx, struct_pf_ptr)  \
-    do                                          \
-    {                                           \
-        ((struct_pf_ptr)->xxx) = UINT32_C(0);   \
-    } while (0)
-
-/**
- *  Specialization of #JTEST_PF_RESET_XXX for the 'passed' member.
- */
-#define JTEST_PF_RESET_PASSED(struct_pf_ptr)    \
-    JTEST_PF_RESET_XXX(passed, struct_pf_ptr)
-
-/**
- *  Specialization of #JTEST_PF_RESET_XXX for the 'failed' member.
- */
-#define JTEST_PF_RESET_FAILED(struct_pf_ptr)    \
-    JTEST_PF_RESET_XXX(failed, struct_pf_ptr)
-
-#endif /* _JTEST_PF_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_systick.h

@@ -1,94 +0,0 @@
-#ifndef _JTEST_SYSTICK_H_
-#define _JTEST_SYSTICK_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes                                                                       */
-/*--------------------------------------------------------------------------------*/
-
-/* Get access to the SysTick structure. */
-#if   defined ARMCM0
-  #include "ARMCM0.h"
-#elif defined ARMCM0P
-  #include "ARMCM0plus.h"
-#elif defined ARMCM0P_MPU
-  #include "ARMCM0plus_MPU.h"
-#elif defined ARMCM3
-  #include "ARMCM3.h"
-#elif defined ARMCM4
-  #include "ARMCM4.h"
-#elif defined ARMCM4_FP
-  #include "ARMCM4_FP.h"
-#elif defined ARMCM7
-  #include "ARMCM7.h" 
-#elif defined ARMCM7_SP
-  #include "ARMCM7_SP.h"
-#elif defined ARMCM7_DP
-  #include "ARMCM7_DP.h"
-#elif defined ARMSC000
-  #include "ARMSC000.h"
-#elif defined ARMSC300
-  #include "ARMSC300.h"
-#elif defined ARMv8MBL
-  #include "ARMv8MBL.h"
-#elif defined ARMv8MML
-  #include "ARMv8MML.h"
-#elif defined ARMv8MML_DSP
-  #include "ARMv8MML_DSP.h"
-#elif defined ARMv8MML_SP
-  #include "ARMv8MML_SP.h"
-#elif defined ARMv8MML_DSP_SP
-  #include "ARMv8MML_DSP_SP.h"
-#elif defined ARMv8MML_DP
-  #include "ARMv8MML_DP.h"
-#elif defined ARMv8MML_DSP_DP
-  #include "ARMv8MML_DSP_DP.h"
-#elif defined ARMv7A
-  /* TODO */
-#else
-  #warning "no appropriate header file found!"
-#endif
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines                                                             */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Initial value for the SysTick module.
- *
- *  This is also the maximum value, important as SysTick is a decrementing counter.
- */
-#define JTEST_SYSTICK_INITIAL_VALUE       0xFFFFFF
-
-/**
- *  Reset the SysTick, decrementing timer to it's maximum value and disable it.
- *
- *  This macro should leave the SysTick timer in a state that's ready for cycle
- *  counting.
- */
-#define JTEST_SYSTICK_RESET(systick_ptr)                    \
-    do                                                      \
-    {                                                       \
-        (systick_ptr)->CTRL = SysTick_CTRL_CLKSOURCE_Msk;   \
-                                                            \
-        (systick_ptr)->LOAD = JTEST_SYSTICK_INITIAL_VALUE;  \
-        (systick_ptr)->VAL  = JTEST_SYSTICK_INITIAL_VALUE;  \
-    } while (0)
-
-/**
- *  Start the SysTick timer, sourced by the processor clock.
- */
-#define JTEST_SYSTICK_START(systick_ptr)                    \
-    do                                                      \
-    {                                                       \
-        (systick_ptr)->CTRL =                               \
-            SysTick_CTRL_ENABLE_Msk |                       \
-            SysTick_CTRL_CLKSOURCE_Msk;                     \
-    } while (0)
-
-/**
- *  Evaluate to the current value of the SysTick timer.
- */
-#define JTEST_SYSTICK_VALUE(systick_ptr)                    \
-    ((systick_ptr)->VAL)
-           
-#endif /* _JTEST_SYSTICK_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_test.h

@@ -1,100 +0,0 @@
-#ifndef _JTEST_TEST_H_
-#define _JTEST_TEST_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include <stdint.h>
-#include "jtest_util.h"
-#include "jtest_test_ret.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Type Definitions */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  A struct which represents a Test in the JTEST framework.  This struct is
- *  used to enable, run, and describe the test it represents.
- */
-typedef struct JTEST_TEST_struct
-{
-    JTEST_TEST_RET_t ( * test_fn_ptr)(void); /**< Pointer to the test function. */
-    char   * test_fn_str;                    /**< Name of the test function */
-    char   * fut_str;           /**< Name of the function under test. */
-
-    /**
-     *  Flags that govern how the #JTEST_TEST_t behaves.
-     */
-    union {
-        struct {
-            unsigned enabled : 1;
-            unsigned unused  : 7;
-        } bits;
-        uint8_t byte;           /* Access all flags at once. */
-    } flags;
-    
-} JTEST_TEST_t;
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Assign a test function to the #JTEST_TEST_t struct.
- */
-#define JTEST_TEST_SET_FN(jtest_test_ptr, fn_ptr)                   \
-    JTEST_SET_STRUCT_ATTRIBUTE(jtest_test_ptr, test_fn_ptr, fn_ptr)
-
-/**
- *  Specify a function under test (FUT) for the #JTEST_TEST_t struct.
- */
-#define JTEST_TEST_SET_FUT(jtest_test_ptr, str)                 \
-    JTEST_SET_STRUCT_ATTRIBUTE(jtest_test_ptr, fut_str, str)
-
-/* Macros concerning JTEST_TEST_t flags */
-/*--------------------------------------------------------------------------------*/
-
-#define JTEST_TEST_FLAG_SET 1 /**< Value of a set #JTEST_TEST_t flag. */
-#define JTEST_TEST_FLAG_CLR 0 /**< Value of a cleared #JTEST_TEST_t flag. */
-
-/**
- *  Evaluate to the flag in #JTEST_TEST_t having flag_name.
- */
-#define JTEST_TEST_FLAG(jtest_test_ptr, flag_name)  \
-    ((jtest_test_ptr)->flags.bits.flag_name)
-
-/**
- *  Dispatch macro for setting and clearing #JTEST_TEST_t flags.
- *
- *  @param jtest_test_ptr Pointer to a #JTEST_TEST_t struct.
- *  @param flag_name      Name of the flag to set in #JTEST_TEST_t.flags.bits
- *  @param xxx            Vaid values: "SET" or "CLR"
- *
- *  @note This function depends on JTEST_TEST_FLAG_SET and JTEST_TEST_FLAG_CLR.
- */
-#define JTEST_TEST_XXX_FLAG(jtest_test_ptr, flag_name, xxx)                  \
-    do                                                                       \
-    {                                                                        \
-        JTEST_TEST_FLAG(jtest_test_ptr, flag_name) = JTEST_TEST_FLAG_##xxx ; \
-    } while (0)
-
-/**
- *  Specification of #JTEST_TEST_XXX_FLAG to set #JTEST_TEST_t flags.
- */
-#define JTEST_TEST_SET_FLAG(jtest_test_ptr, flag_name)                       \
-    JTEST_TEST_XXX_FLAG(jtest_test_ptr, flag_name, SET)
-
-/**
- *  Specification of #JTEST_TEST_XXX_FLAG to clear #JTEST_TEST_t flags.
- */
-#define JTEST_TEST_CLR_FLAG(jtest_test_ptr, flag_name)                       \
-    JTEST_TEST_XXX_FLAG(jtest_test_ptr, flag_name, CLR)
-
-/**
- *  Evaluate to true if the #JTEST_TEST_t is enabled.
- */
-#define JTEST_TEST_IS_ENABLED(jtest_test_ptr)                           \
-    (JTEST_TEST_FLAG(jtest_test_ptr, enabled) == JTEST_TEST_FLAG_SET)
-
-#endif /* _JTEST_TEST_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_test_call.h

@@ -1,121 +0,0 @@
-#ifndef _JTEST_TEST_CALL_H_
-#define _JTEST_TEST_CALL_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-#include "jtest_test.h"
-#include "jtest_test_define.h"
-#include "jtest_fw.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Exectute the test in the #JTEST_TEST_t struct associated with the identifier
- *  test_fn and store the result in retval.
- */
-#define JTEST_TEST_RUN(retval, test_fn)                                 \
-    do                                                                  \
-    {                                                                   \
-        JTEST_DUMP_STR("Test Name:\n");                                 \
-        JTEST_DUMP_STR(JTEST_TEST_STRUCT_NAME(test_fn).test_fn_str);    \
-        JTEST_DUMP_STR("Function Under Test:\n");                       \
-        JTEST_DUMP_STR(JTEST_TEST_STRUCT_NAME(test_fn).fut_str);        \
-        retval = JTEST_TEST_STRUCT_NAME(test_fn).test_fn_ptr();         \
-    } while (0)
-
-/**
- *  Update the enclosing #JTEST_GROUP_t's pass/fail information based on
- *  test_retval.
- *
- *  @param test_retval A #JTEST_TEST_RET_enum for the current test.
- *
- *  @warning Only use if #JTEST_TEST_t is called in the context of a
- *  #JTEST_GROUP_t.
- */
-#define JTEST_TEST_UPDATE_PARENT_GROUP_PF(test_retval)              \
-    do                                                              \
-    {                                                               \
-        /* Update enclosing JTEST_GROUP_t with pass/fail info */    \
-        if (test_retval == JTEST_TEST_PASSED)                       \
-        {                                                           \
-            JTEST_GROUP_INC_PASSED(JTEST_CURRENT_GROUP_PTR(), 1);   \
-        } else {                                                    \
-            JTEST_GROUP_INC_FAILED(JTEST_CURRENT_GROUP_PTR(), 1);   \
-        }                                                           \
-    } while (0)
-
-/**
- *  Update the #JTEST_FW with pass/fail information based on test_retval.
- *
- *  @param test_retval A #JTEST_TEST_RET_enum for the current test.
- */
-#define JTEST_TEST_UPDATE_FW_PF(test_retval)                        \
-    do                                                              \
-    {                                                               \
-        /* Update the JTEST_FW with pass/fail info */                \
-        if (test_retval == JTEST_TEST_PASSED)                       \
-        {                                                           \
-            JTEST_FW_INC_PASSED( 1);                                \
-        } else {                                                    \
-            JTEST_FW_INC_FAILED(1);                                 \
-        }                                                           \
-    } while (0)
-
-/**
- *  Update the enclosing JTEST_GROUP_t's pass/fail information, or the
- *  #JTEST_FW's if this test has no enclosing #JTEST_GROUP_t.
- *
- *  @param test_retval A #JTEST_TEST_RET_enum for the current test.
- */
-#define JTEST_TEST_UPDATE_PARENT_GROUP_OR_FW_PF(test_retval)            \
-    do                                                                  \
-    {                                                                   \
-        /* Update pass-fail information */                              \
-        if (JTEST_CURRENT_GROUP_PTR() /* Non-null */)                    \
-        {                                                               \
-            JTEST_TEST_UPDATE_PARENT_GROUP_PF(test_retval);             \
-        } else {                                                        \
-            JTEST_TEST_UPDATE_FW_PF(test_retval);                       \
-        }                                                               \
-    } while (0)
-
-/**
- *  Dump the results of the test to the Keil Debugger.
- */
-#define JTEST_TEST_DUMP_RESULTS(test_retval)        \
-        do                                          \
-        {                                           \
-            if (test_retval == JTEST_TEST_PASSED)   \
-            {                                       \
-                JTEST_DUMP_STR("Test Passed\n");      \
-            } else {                                \
-                JTEST_DUMP_STR("Test Failed\n");      \
-            }                                       \
-        } while (0)
-
-/**
- *  Call the #JTEST_TEST_t assocaited with the identifier test_fn.
- */
-#define JTEST_TEST_CALL(test_fn)                                        \
-    do                                                                  \
-    {                                                                   \
-        if (JTEST_TEST_IS_ENABLED(&JTEST_TEST_STRUCT_NAME(test_fn)))    \
-        {                                                               \
-            /* Default to failure */                                    \
-            JTEST_TEST_RET_t __jtest_test_ret = JTEST_TEST_FAILED;      \
-                                                                        \
-            JTEST_ACT_TEST_START();                                     \
-            JTEST_TEST_RUN(__jtest_test_ret, test_fn);                  \
-                                                                        \
-            /* Update pass-fail information */                          \
-            JTEST_TEST_UPDATE_PARENT_GROUP_OR_FW_PF(__jtest_test_ret);  \
-                                                                        \
-            JTEST_TEST_DUMP_RESULTS(__jtest_test_ret);                  \
-            JTEST_ACT_TEST_END();                                       \
-        }                                                               \
-    } while (0)
-
-#endif /* _JTEST_TEST_CALL_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_test_define.h

@@ -1,133 +0,0 @@
-#ifndef _JTEST_TEST_DEFINE_H_
-#define _JTEST_TEST_DEFINE_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "jtest_util.h"
-#include "jtest_define.h"
-#include "jtest_test.h"
-
-/* For defining macros with optional arguments */
-#include "opt_arg/opt_arg.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Prefix for all #JTEST_TEST_t structs.
- */
-#define JTEST_TEST_STRUCT_NAME_PREFIX G_JTEST_TEST_STRUCT_
-
-/**
- *  Define test template used by #JTEST_TEST_t tests.
- */
-#define JTEST_TEST_FN_TEMPLATE(test_fn)                         \
-    JTEST_TEST_RET_t test_fn(void)
-
-#define JTEST_TEST_FN_PROTOTYPE JTEST_TEST_FN_TEMPLATE /**< Alias for
-                                                        * #JTEST_TEST_FN_TEMPLATE. */
-
-/**
- *  Evaluate to the name of the #JTEST_TEST_t struct associated with test_fn.
- */
-#define JTEST_TEST_STRUCT_NAME(test_fn)                         \
-    JTEST_STRUCT_NAME(JTEST_TEST_STRUCT_NAME_PREFIX, test_fn)
-
-/**
- *  Define a #JTEST_TEST_t struct based on the given test_fn.
- */
-#define JTEST_TEST_DEFINE_STRUCT(test_fn)                   \
-    JTEST_DEFINE_STRUCT(JTEST_TEST_t,                       \
-                        JTEST_TEST_STRUCT_NAME(test_fn))
-
-/**
- *  Declare a #JTEST_TEST_t struct based on the given test_fn.
- */
-#define JTEST_TEST_DECLARE_STRUCT(test_fn)      \
-    JTEST_DECLARE_STRUCT(JTEST_TEST_DEFINE_STRUCT(test_fn))
-
-/**
- *  Contents needed to initialize a JTEST_TEST_t struct.
- */
-#define JTEST_TEST_STRUCT_INIT(test_fn, fut, enable)    \
-    test_fn,                                            \
-        STR_NL(test_fn),                                   \
-        STR_NL(fut),                                       \
-    {                                                   \
-        {                                               \
-            enable,                                     \
-                0                                       \
-        }                                               \
-    }                                                   \
-        
-
-/**
- *  Initialize the contents of a #JTEST_TEST_t struct.
- */
-#define JTEST_TEST_INIT(test_fn, fut, enable)              \
-    JTEST_TEST_DEFINE_STRUCT(test_fn) = {                  \
-        JTEST_TEST_STRUCT_INIT(test_fn, fut, enable)       \
-    }
-
-/* Test Definition Macro */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Define a #JTEST_TEST_t object and a test function.
- */
-#define _JTEST_DEFINE_TEST(test_fn, fut, enable)           \
-    JTEST_TEST_FN_PROTOTYPE(test_fn);                      \
-    JTEST_TEST_INIT(test_fn, fut, enable);                 \
-    JTEST_TEST_FN_PROTOTYPE(test_fn) /* Notice the lacking semicolon */
-
-/**
- *  Declare a #JTEST_TEST_t object and a test function prototype.
- */
-#define JTEST_DECLARE_TEST(test_fn)                                     \
-    JTEST_TEST_FN_PROTOTYPE(test_fn);                                   \
-    JTEST_TEST_DECLARE_STRUCT(test_fn) /* Note the lacking semicolon */
-
-/*--------------------------------------------------------------------------------*/
-/* Macros with optional arguments */
-/*--------------------------------------------------------------------------------*/
-
-/* Top-level Interface */
-#define JTEST_DEFINE_TEST(...)                             \
-    JTEST_DEFINE_TEST_(PP_NARG(__VA_ARGS__), ##__VA_ARGS__)
-
-/* Dispatch Macro*/
-#define JTEST_DEFINE_TEST_(N, ...)                         \
-    SPLICE(JTEST_DEFINE_TEST_, N)(__VA_ARGS__)
-
-/* Default Arguments */
-#define JTEST_DEFINE_TEST_DEFAULT_FUT /* Blank */
-#define JTEST_DEFINE_TEST_DEFAULT_ENABLE                   \
-    JTEST_TRUE                                 /* Tests enabled by
-                                                * default. */ 
-
-/* Dispatch Cases*/
-#define JTEST_DEFINE_TEST_1(_1)                            \
-    _JTEST_DEFINE_TEST(                                    \
-        _1,                                                \
-        JTEST_DEFINE_TEST_DEFAULT_FUT,                     \
-        JTEST_DEFINE_TEST_DEFAULT_ENABLE                   \
-        )
-
-#define JTEST_DEFINE_TEST_2(_1, _2)                        \
-    _JTEST_DEFINE_TEST(                                    \
-        _1,                                                \
-        _2,                                                \
-        JTEST_DEFINE_TEST_DEFAULT_ENABLE                   \
-        )
-
-#define JTEST_DEFINE_TEST_3(_1, _2, _3)                    \
-    _JTEST_DEFINE_TEST(                                    \
-        _1,                                                \
-        _2,                                                \
-        _3                                                 \
-        )
-
-#endif /* _JTEST_TEST_DEFINE_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_test_ret.h

@@ -1,17 +0,0 @@
-#ifndef _JTEST_TEST_RET_H_
-#define _JTEST_TEST_RET_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Type Definitions */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Values a #JTEST_TEST_t can return.
- */
-typedef enum JTEST_TEST_RET_enum
-{
-    JTEST_TEST_PASSED,
-    JTEST_TEST_FAILED
-} JTEST_TEST_RET_t;
-
-#endif /* _JTEST_TEST_RET_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_util.h

@@ -1,27 +0,0 @@
-#ifndef _JTEST_UTIL_H_
-#define _JTEST_UTIL_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "util/util.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-/* Define boolean values for the framework. */
-#define JTEST_TRUE  1           /**< Value used for TRUE in JTEST. */
-#define JTEST_FALSE 0           /**< Value used for FALSE in JTEST. */
-
-/**
- *  Set the value of the attribute in the struct to by struct_ptr to value.
- */
-#define JTEST_SET_STRUCT_ATTRIBUTE(struct_ptr, attribute, value)    \
-    do                                                              \
-    {                                                               \
-        (struct_ptr)->attribute = (value);                          \
-    } while (0)
-
-#endif /* _JTEST_UTIL_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/opt_arg/opt_arg.h

@@ -1,15 +0,0 @@
-#ifndef _OPT_ARG_H_
-#define _OPT_ARG_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "pp_narg.h"
-#include "splice.h"
-
-/* If you are Joseph Jaoudi, you have a snippet which expands into an
-   example. If you are not Joseph, but possess his code, study the examples. If
-   you have no examples, turn back contact Joseph. */
-
-#endif /* _OPT_ARG_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/opt_arg/pp_narg.h

@@ -1,25 +0,0 @@
-#ifndef _PP_NARG_H_
-#define _PP_NARG_H_
-
-#define PP_NARG(...)                                      \
-    PP_NARG_(__VA_ARGS__,PP_RSEQ_N())
-#define PP_NARG_(...)                                     \
-    PP_ARG_N(__VA_ARGS__)
-#define PP_ARG_N(                                         \
-                 _1, _2, _3, _4, _5, _6, _7, _8, _9,_10,  \
-                 _11,_12,_13,_14,_15,_16,_17,_18,_19,_20, \
-                 _21,_22,_23,_24,_25,_26,_27,_28,_29,_30, \
-                 _31,_32,_33,_34,_35,_36,_37,_38,_39,_40, \
-                 _41,_42,_43,_44,_45,_46,_47,_48,_49,_50, \
-                 _51,_52,_53,_54,_55,_56,_57,_58,_59,_60, \
-                 _61,_62,_63,N,...) N
-#define PP_RSEQ_N()                                       \
-    63,62,61,60,                                          \
-        59,58,57,56,55,54,53,52,51,50,                    \
-        49,48,47,46,45,44,43,42,41,40,                    \
-        39,38,37,36,35,34,33,32,31,30,                    \
-        29,28,27,26,25,24,23,22,21,20,                    \
-        19,18,17,16,15,14,13,12,11,10,                    \
-        9,8,7,6,5,4,3,2,1,0
-
-#endif /* _PP_NARG_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/opt_arg/splice.h

@@ -1,8 +0,0 @@
-#ifndef _SPLICE_H_
-#define _SPLICE_H_
-
-#define SPLICE(a,b) SPLICE_1(a,b)
-#define SPLICE_1(a,b) SPLICE_2(a,b)
-#define SPLICE_2(a,b) a##b
-
-#endif /* _SPLICE_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/inc/util/util.h

@@ -1,52 +0,0 @@
-#ifndef _UTIL_H_
-#define _UTIL_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Convert a symbol to a string and add a 'NewLine'.
- */
-#define STR_NL(x)  STR1_NL(x)
-#define STR1_NL(x) (STR2_NL(x)"\n")
-#define STR2_NL(x) #x
-
-/**
- *  Convert a symbol to a string.
- */
-#define STR(x)  STR1(x)
-#define STR1(x) STR2(x)
-#define STR2(x) #x
-
-/**
- *  Concatenate two symbols.
- */
-#define CONCAT(a, b)  CONCAT1(a, b)
-#define CONCAT1(a, b) CONCAT2(a, b)
-#define CONCAT2(a, b) a##b
-
-
-/**
- *  Place curly braces around a varaible number of macro arguments.
- */
-#define CURLY(...) {__VA_ARGS__}
-
-/**
- *  Place parenthesis around a variable number of macro arguments.
- */
-#define PAREN(...) (__VA_ARGS__)
-
-/* Standard min/max macros. */
-#define MIN(x,y) (((x) < (y)) ? (x) : (y) )
-#define MAX(x,y) (((x) > (y)) ? (x) : (y) )
-
-/**
- *  Bound value using low and high limits.
- *
- *  Evaluate to a number in the range, endpoint inclusive.
- */
-#define BOUND(low, high, value)                 \
-    MAX(MIN(high, value), low)
-
-#endif /* _UTIL_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/src/jtest_cycle.c

@@ -1,9 +0,0 @@
-#include "../inc/jtest_cycle.h"
-#include <inttypes.h>
-
-/*--------------------------------------------------------------------------------*/
-/* Define Module Variables */
-/*--------------------------------------------------------------------------------*/
-
-/* const char * JTEST_CYCLE_STRF = "Running: %s\nCycles: %" PRIu32 "\n"; */
-const char * JTEST_CYCLE_STRF = "Cycles: %" PRIu32 "\n"; /* function name + parameter string skipped */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/src/jtest_dump_str_segments.c

@@ -1,36 +0,0 @@
-#include "jtest_fw.h"
-
-/**
- *  Dump the JTEST_FW.str_buffer the Keil framework in pieces.
- *
- *  The JTEST_FW.str_buffer contains more characters than the Keil framework can
- *  dump at once. This function dumps them in blocks.
- */
-void jtest_dump_str_segments(void)
-{
-    uint32_t seg_idx      = 0;
-    uint32_t memmove_idx = 0;
-    uint32_t seg_cnt  =
-        (strlen(JTEST_FW.str_buffer) / JTEST_STR_MAX_OUTPUT_SIZE) + 1;
-
-    for( seg_idx = 0; seg_idx < seg_cnt; ++seg_idx)
-    {
-        JTEST_TRIGGER_ACTION(dump_str);
-
-        if (seg_idx < JTEST_STR_MAX_OUTPUT_SEGMENTS)
-        {
-            memmove_idx = 0;
-            while (memmove_idx < (seg_cnt - seg_idx -1) )
-            {
-                memmove(
-                    JTEST_FW.str_buffer+
-                    (memmove_idx* JTEST_STR_MAX_OUTPUT_SIZE),
-                    JTEST_FW.str_buffer+
-                    ((memmove_idx+1)*JTEST_STR_MAX_OUTPUT_SIZE),
-                    JTEST_BUF_SIZE);
-                ++memmove_idx;
-            }
-        }
-    }
-    return;
-}

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/src/jtest_fw.c

@@ -1,9 +0,0 @@
-#include "../inc/jtest.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Define Global Variables */
-/*--------------------------------------------------------------------------------*/
-
-char JTEST_FW_STR_BUFFER[JTEST_BUF_SIZE] = {0};
-
-volatile JTEST_FW_t JTEST_FW = {0};

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/JTest/src/jtest_trigger_action.c

@@ -1,37 +0,0 @@
-
-#include "jtest_fw.h"
-
-void test_start    (void) {
-//  ;
-  JTEST_FW.test_start++;
-}
-
-void test_end      (void) {
-//  ;
-  JTEST_FW.test_end++;
-}
-
-void group_start   (void) {
-//  ;
-  JTEST_FW.group_start++;
-}
-
-void group_end     (void) {
-//  ;
-  JTEST_FW.group_end++;
-}
-
-void dump_str      (void) {
-//  ;
-  JTEST_FW.dump_str++;
-}
-
-void dump_data     (void) {
-//  ;
-  JTEST_FW.dump_data++;
-}
-
-void exit_fw       (void) {
-//  ;
-  JTEST_FW.exit_fw++;
-}

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/all_tests.h

@@ -1,9 +0,0 @@
-#ifndef _ALL_TESTS_H_
-#define _ALL_TESTS_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Declare Test Groups */
-/*--------------------------------------------------------------------------------*/
-JTEST_DECLARE_GROUP(all_tests);
-
-#endif /* _ALL_TESTS_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/basic_math_tests/basic_math_templates.h

@@ -1,267 +0,0 @@
-#ifndef _BASIC_MATH_TEMPLATES_H_
-#define _BASIC_MATH_TEMPLATES_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-#include "test_templates.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Group Specific Templates */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Compare the outputs used by basic math tests for the function under test and
- *  the reference function.
- */
-#define BASIC_MATH_COMPARE_INTERFACE(block_size, output_type)   \
-    TEST_ASSERT_BUFFERS_EQUAL(                                  \
-        basic_math_output_ref.data_ptr,                         \
-        basic_math_output_fut.data_ptr,                         \
-        block_size * sizeof(output_type))
-
-/*
- * Comparison SNR thresholds for the data types used in basic_math_tests.
- */
-#define BASIC_MATH_SNR_THRESHOLD_float32_t 120
-#define BASIC_MATH_SNR_THRESHOLD_q31_t 100
-#define BASIC_MATH_SNR_THRESHOLD_q15_t 75
-#define BASIC_MATH_SNR_THRESHOLD_q7_t 25
-
-/**
- *  Compare reference and fut outputs using SNR.
- *
- *  @note The outputs are converted to float32_t before comparison.
- */
-#define BASIC_MATH_SNR_COMPARE_INTERFACE(block_size, output_type)   \
-    do                                                              \
-    {                                                               \
-        TEST_CONVERT_AND_ASSERT_SNR(                                \
-            basic_math_output_f32_ref,                              \
-            basic_math_output_ref.data_ptr,                         \
-            basic_math_output_f32_fut,                              \
-            basic_math_output_fut.data_ptr,                         \
-            block_size,                                             \
-            output_type,                                            \
-            BASIC_MATH_SNR_THRESHOLD_##output_type                  \
-            );                                                      \
-    } while (0)
-
-
-/**
- *  Compare reference and fut outputs using SNR.
- *
- *  @note The outputs are converted to float32_t before comparison.
- */
-#define BASIC_MATH_SNR_ELT1_COMPARE_INTERFACE(block_size, output_type)  \
-    do                                                                  \
-    {                                                                   \
-        TEST_CONVERT_AND_ASSERT_SNR(                                    \
-            basic_math_output_f32_ref,                                  \
-            basic_math_output_ref.data_ptr,                             \
-            basic_math_output_f32_fut,                                  \
-            basic_math_output_fut.data_ptr,                             \
-            1,                                                          \
-            output_type,                                                \
-            BASIC_MATH_SNR_THRESHOLD_##output_type                      \
-            );                                                          \
-    } while (0)
-
-
-
-/*--------------------------------------------------------------------------------*/
-/* Input Interfaces */
-/*--------------------------------------------------------------------------------*/
-/*
- *  General:
- *  Input interfaces provide inputs to functions inside test templates.  They
- *  ONLY provide the inputs.  The output variables should be hard coded.
- *
- *  The input interfaces must have the following format:
- *
- *  ARM_xxx_INPUT_INTERFACE() or
- *  REF_xxx_INPUT_INTERFACE()
- *
- *  The xxx must be lowercase, and is intended to be the indentifying substring
- *  in the function's name.  Acceptable values are 'sub' or 'add' from the
- *  functions arm_add_q31.
- */
-
-#define ARM_abs_INPUT_INTERFACE(input, block_size)              \
-    PAREN(input, basic_math_output_fut.data_ptr, block_size)
-
-#define REF_abs_INPUT_INTERFACE(input, block_size)              \
-    PAREN(input, basic_math_output_ref.data_ptr, block_size)
-
-#define ARM_add_INPUT_INTERFACE(input_a, input_b, block_size)           \
-    PAREN(input_a, input_b, basic_math_output_fut.data_ptr, block_size) \
-
-#define REF_add_INPUT_INTERFACE(input_a, input_b, block_size)           \
-    PAREN(input_a, input_b, basic_math_output_ref.data_ptr, block_size) \
-
-#define ARM_dot_prod_INPUT_INTERFACE(input_a, input_b, block_size)      \
-    PAREN(input_a, input_b, block_size, basic_math_output_fut.data_ptr) \
-
-#define REF_dot_prod_INPUT_INTERFACE(input_a, input_b, block_size)      \
-    PAREN(input_a, input_b, block_size, basic_math_output_ref.data_ptr) \
-
-#define ARM_mult_INPUT_INTERFACE(input_a, input_b, block_size)          \
-    PAREN(input_a, input_b, basic_math_output_fut.data_ptr, block_size) \
-
-#define REF_mult_INPUT_INTERFACE(input_a, input_b, block_size)          \
-    PAREN(input_a, input_b, basic_math_output_ref.data_ptr, block_size) \
-
-#define ARM_negate_INPUT_INTERFACE(input, block_size)           \
-    PAREN(input, basic_math_output_fut.data_ptr, block_size)
-
-#define REF_negate_INPUT_INTERFACE(input, block_size)           \
-    PAREN(input, basic_math_output_ref.data_ptr, block_size)
-
-#define ARM_offset_INPUT_INTERFACE(input, elt, block_size)          \
-    PAREN(input, elt, basic_math_output_fut.data_ptr, block_size)   \
-
-#define REF_offset_INPUT_INTERFACE(input, elt, block_size)          \
-    PAREN(input, elt, basic_math_output_ref.data_ptr, block_size)   \
-
-#define ARM_shift_INPUT_INTERFACE(input, elt, block_size)           \
-    PAREN(input, elt, basic_math_output_fut.data_ptr, block_size)   \
-
-#define REF_shift_INPUT_INTERFACE(input, elt, block_size)           \
-    PAREN(input, elt, basic_math_output_ref.data_ptr, block_size)   \
-
-#define ARM_scale_float_INPUT_INTERFACE(input, elt, block_size)     \
-    PAREN(input, elt, basic_math_output_fut.data_ptr, block_size)   \
-
-#define REF_scale_float_INPUT_INTERFACE(input, elt, block_size)     \
-    PAREN(input, elt, basic_math_output_ref.data_ptr, block_size)   \
-
-/* These two are for the fixed point functions */
-#define ARM_scale_INPUT_INTERFACE(input, elt1, elt2, block_size)        \
-    PAREN(input, elt1, elt2, basic_math_output_fut.data_ptr, block_size) \
-
-#define REF_scale_INPUT_INTERFACE(input, elt1, elt2, block_size)        \
-    PAREN(input, elt1, elt2, basic_math_output_ref.data_ptr, block_size) \
-
-#define ARM_sub_INPUT_INTERFACE(input_a, input_b, block_size)           \
-    PAREN(input_a, input_b, basic_math_output_fut.data_ptr, block_size) \
-
-#define REF_sub_INPUT_INTERFACE(input_a, input_b, block_size)           \
-    PAREN(input_a, input_b, basic_math_output_ref.data_ptr, block_size) \
-
-
-/*--------------------------------------------------------------------------------*/
-/* Test Templates */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Specialization of #TEST_TEMPLATE_BUF1_BLK() for basic math tests.
- *
- *  @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
- *  REF_xxx_INPUT_INTERFACEs.
- */
-#define BASIC_MATH_DEFINE_TEST_TEMPLATE_BUF1_BLK(fn_name,       \
-                                                 suffix,        \
-                                                 input_type,    \
-                                                 output_type)   \
-    JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test,          \
-                      arm_##fn_name##_##suffix)                 \
-    {                                                           \
-        TEST_TEMPLATE_BUF1_BLK(                                 \
-            basic_math_f_all,                                   \
-            basic_math_block_sizes,                             \
-            input_type,                                         \
-            output_type,                                        \
-            arm_##fn_name##_##suffix,                           \
-            ARM_##fn_name##_INPUT_INTERFACE,                    \
-            ref_##fn_name##_##suffix,                           \
-            REF_##fn_name##_INPUT_INTERFACE,                    \
-            BASIC_MATH_COMPARE_INTERFACE);                      \
-    }
-
-/**
- *  Specialization of #TEST_TEMPLATE_BUF2_BLK() for basic math tests.
- *
- *  @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
- *  REF_xxx_INPUT_INTERFACEs.
- */
-#define BASIC_MATH_DEFINE_TEST_TEMPLATE_BUF2_BLK(fn_name,               \
-                                                 suffix,                \
-                                                 input_type,            \
-                                                 output_type,           \
-                                                 comparison_interface)  \
-    JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test,                  \
-                      arm_##fn_name##_##suffix)                         \
-    {                                                                   \
-        TEST_TEMPLATE_BUF2_BLK(                                         \
-            basic_math_f_all,                                           \
-            basic_math_f_all,                                           \
-            basic_math_block_sizes,                                     \
-            input_type,                                                 \
-            output_type,                                                \
-            arm_##fn_name##_##suffix,                                   \
-            ARM_##fn_name##_INPUT_INTERFACE,                            \
-            ref_##fn_name##_##suffix,                                   \
-            REF_##fn_name##_INPUT_INTERFACE,                            \
-            comparison_interface);                                      \
-    }
-
-/**
- *  Specialization of #TEST_TEMPLATE_BUF1_ELT1_BLK() for basic math tests.
- *
- *  @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
- *  REF_xxx_INPUT_INTERFACEs.
- */
-#define BASIC_MATH_DEFINE_TEST_TEMPLATE_BUF1_ELT1_BLK(fn_name,      \
-                                                      suffix,       \
-                                                      input_type,   \
-                                                      elt_type,     \
-                                                      output_type)  \
-    JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test,              \
-                      arm_##fn_name##_##suffix)                     \
-    {                                                               \
-        TEST_TEMPLATE_BUF1_ELT1_BLK(                                \
-            basic_math_f_all,                                       \
-            basic_math_elts,                                        \
-            basic_math_block_sizes,                                 \
-            input_type,                                             \
-            elt_type,                                               \
-            output_type,                                            \
-            arm_##fn_name##_##suffix,                               \
-            ARM_##fn_name##_INPUT_INTERFACE,                        \
-            ref_##fn_name##_##suffix,                               \
-            REF_##fn_name##_INPUT_INTERFACE,                        \
-            BASIC_MATH_COMPARE_INTERFACE);                          \
-    }
-
-/**
- *  Specialization of #TEST_TEMPLATE_BUF1_ELT2_BLK() for basic math tests.
- *
- *  @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
- *  REF_xxx_INPUT_INTERFACEs.
- */
-#define BASIC_MATH_DEFINE_TEST_TEMPLATE_BUF1_ELT2_BLK(fn_name,      \
-                                                      suffix,       \
-                                                      input_type,   \
-                                                      elt1_type,    \
-                                                      elt2_type,    \
-                                                      output_type)  \
-    JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test,              \
-                      arm_##fn_name##_##suffix)                     \
-    {                                                               \
-        TEST_TEMPLATE_BUF1_ELT2_BLK(                                \
-            basic_math_f_all,                                       \
-            basic_math_elts,                                        \
-            basic_math_elts2,                                       \
-            basic_math_block_sizes,                                 \
-            input_type,                                             \
-            elt1_type,                                              \
-            elt2_type,                                              \
-            output_type,                                            \
-            arm_##fn_name##_##suffix,                               \
-            ARM_##fn_name##_INPUT_INTERFACE,                        \
-            ref_##fn_name##_##suffix,                               \
-            REF_##fn_name##_INPUT_INTERFACE,                        \
-            BASIC_MATH_COMPARE_INTERFACE);                          \
-    }
-
-#endif /* _BASIC_MATH_TEMPLATES_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/basic_math_tests/basic_math_test_data.h

@@ -1,46 +0,0 @@
-#ifndef ARM_BASIC_MATH_TEST_DATA_H
-#define ARM_BASIC_MATH_TEST_DATA_H
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "arr_desc.h"
-#include "arm_math.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-#define BASIC_MATH_MAX_INPUT_ELEMENTS 32
-#define BASIC_MATH_BIGGEST_INPUT_TYPE float32_t
-
-/*--------------------------------------------------------------------------------*/
-/* Declare Variables */
-/*--------------------------------------------------------------------------------*/
-
-/* Input/Output Buffers */
-ARR_DESC_DECLARE(basic_math_output_fut);
-ARR_DESC_DECLARE(basic_math_output_ref);
-
-extern BASIC_MATH_BIGGEST_INPUT_TYPE
-basic_math_output_f32_ref[BASIC_MATH_MAX_INPUT_ELEMENTS];
-
-extern BASIC_MATH_BIGGEST_INPUT_TYPE
-basic_math_output_f32_fut[BASIC_MATH_MAX_INPUT_ELEMENTS];
-
-/* Block Sizes*/
-ARR_DESC_DECLARE(basic_math_block_sizes);
-
-/* Numbers */
-ARR_DESC_DECLARE(basic_math_elts);
-ARR_DESC_DECLARE(basic_math_elts2);
-ARR_DESC_DECLARE(basic_math_eltsf);
-
-/* Float Inputs */
-ARR_DESC_DECLARE(basic_math_zeros);
-ARR_DESC_DECLARE(basic_math_f_2);
-ARR_DESC_DECLARE(basic_math_f_15);
-ARR_DESC_DECLARE(basic_math_f_32);
-ARR_DESC_DECLARE(basic_math_f_all);
-
-#endif

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/basic_math_tests/basic_math_test_group.h

@@ -1,9 +0,0 @@
-#ifndef _BASIC_MATH_TEST_GROUP_H_
-#define _BASIC_MATH_TEST_GROUP_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Declare Test Groups */
-/*--------------------------------------------------------------------------------*/
-JTEST_DECLARE_GROUP(basic_math_tests);
-
-#endif /* _BASIC_MATH_TEST_GROUP_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/basic_math_tests/basic_math_tests.h

@@ -1,17 +0,0 @@
-#ifndef _BASIC_MATH_TESTS_H_
-#define _BASIC_MATH_TESTS_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Test/Group Declarations */
-/*--------------------------------------------------------------------------------*/
-JTEST_DECLARE_GROUP(abs_tests);
-JTEST_DECLARE_GROUP(add_tests);
-JTEST_DECLARE_GROUP(dot_prod_tests);
-JTEST_DECLARE_GROUP(mult_tests);
-JTEST_DECLARE_GROUP(negate_tests);
-JTEST_DECLARE_GROUP(offset_tests);
-JTEST_DECLARE_GROUP(scale_tests);
-JTEST_DECLARE_GROUP(shift_tests);
-JTEST_DECLARE_GROUP(sub_tests);
-
-#endif /* _BASIC_MATH_TESTS_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/complex_math_tests/complex_math_templates.h

@@ -1,222 +0,0 @@
-#ifndef _COMPLEX_MATH_TEMPLATES_H_
-#define _COMPLEX_MATH_TEMPLATES_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-#include "test_templates.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Group Specific Templates */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Compare the real outputs from the function under test and the reference
- *  function.
- */
-#define COMPLEX_MATH_COMPARE_RE_INTERFACE(block_size, output_type)  \
-    TEST_ASSERT_BUFFERS_EQUAL(                                      \
-        complex_math_output_ref_a.data_ptr,                         \
-        complex_math_output_fut_a.data_ptr,                         \
-        block_size * sizeof(output_type))
-
-/**
- *  Compare the real and imaginary outputs from the function under test and the
- *  reference function.
- */
-#define COMPLEX_MATH_COMPARE_CMPLX_INTERFACE(block_size, output_type)   \
-    do                                                                  \
-    {                                                                   \
-        COMPLEX_MATH_COMPARE_RE_INTERFACE(block_size * 2, output_type); \
-    } while (0)
-
-
-/*
- * Comparison SNR thresholds for the data types used in complex_math_tests.
- */
-#define COMPLEX_MATH_SNR_THRESHOLD_float32_t 120
-#define COMPLEX_MATH_SNR_THRESHOLD_q31_t 100
-#define COMPLEX_MATH_SNR_THRESHOLD_q15_t 75
-
-/**
- *  Compare reference and fut outputs using SNR.
- *
- *  The output_suffix specifies which output buffers to use for the
- *  comparison. An output_suffix of 'a' expands to the following buffers:
- *
- *  - complex_math_output_f32_ref_a
- *  - complex_math_output_f32_fut_a
- *  - complex_math_output_ref_a
- *  - complex_math_output_fut_a
- *
- *  @note The outputs are converted to float32_t before comparison.
- */
-#define COMPLEX_MATH_SNR_COMPARE_OUT_INTERFACE(block_size,      \
-                                               output_type,     \
-                                               output_suffix)   \
-    do                                                          \
-    {                                                           \
-        TEST_CONVERT_AND_ASSERT_SNR(                            \
-            complex_math_output_f32_ref_##output_suffix,        \
-            complex_math_output_ref_##output_suffix.data_ptr,   \
-            complex_math_output_f32_fut_##output_suffix,        \
-            complex_math_output_fut_##output_suffix.data_ptr,   \
-            block_size,                                         \
-            output_type,                                        \
-            COMPLEX_MATH_SNR_THRESHOLD_##output_type            \
-            );                                                  \
-    } while (0)
-
-/**
- *  Specification of #COMPLEX_MATH_SNR_COMPARE_INTERFACE() for real outputs.
- */
-#define COMPLEX_MATH_SNR_COMPARE_RE_INTERFACE(block_size,       \
-                                                   output_type) \
-    COMPLEX_MATH_SNR_COMPARE_OUT_INTERFACE(block_size,          \
-                                           output_type,         \
-                                           a)
-
-/**
- *  Specification of #COMPLEX_MATH_SNR_COMPARE_INTERFACE() for complex outputs.
- */
-#define COMPLEX_MATH_SNR_COMPARE_CMPLX_INTERFACE(block_size,    \
-                                                 output_type)   \
-        COMPLEX_MATH_SNR_COMPARE_OUT_INTERFACE(block_size * 2,  \
-                                               output_type,     \
-                                               a)
-
-/**
- *  Compare reference and fut split outputs using SNR.
- *
- *  'Split' refers to two separate output buffers; one for real and one for
- *  complex.
- */
-#define COMPLEX_MATH_SNR_COMPARE_SPLIT_INTERFACE(block_size,    \
-                                                 output_type)   \
-        do                                                      \
-        {                                                       \
-            COMPLEX_MATH_SNR_COMPARE_OUT_INTERFACE(block_size,  \
-                                                   output_type, \
-                                                   a);          \
-            COMPLEX_MATH_SNR_COMPARE_OUT_INTERFACE(block_size,  \
-                                                   output_type, \
-                                                   b);          \
-        } while (0)
-
-
-/*--------------------------------------------------------------------------------*/
-/* Input Interfaces */
-/*--------------------------------------------------------------------------------*/
-/*
- *  General:
- *  Input interfaces provide inputs to functions inside test templates.  They
- *  ONLY provide the inputs.  The output variables should be hard coded.
- *
- *  The input interfaces must have the following format:
- *
- *  ARM_xxx_INPUT_INTERFACE() or
- *  REF_xxx_INPUT_INTERFACE()
- *
- *  The xxx must be lowercase, and is intended to be the indentifying substring
- *  in the function's name.  Acceptable values are 'sub' or 'add' from the
- *  functions arm_add_q31.
- */
-
-#define ARM_cmplx_conj_INPUT_INTERFACE(input, block_size)           \
-    PAREN(input, complex_math_output_fut_a.data_ptr, block_size)
-
-#define REF_cmplx_conj_INPUT_INTERFACE(input, block_size)           \
-    PAREN(input, complex_math_output_ref_a.data_ptr, block_size)
-
-#define ARM_cmplx_dot_prod_INPUT_INTERFACE(input_a, input_b, block_size) \
-    PAREN(input_a, input_b, block_size,                                 \
-          complex_math_output_fut_a.data_ptr,                          \
-          complex_math_output_fut_b.data_ptr)
-
-#define REF_cmplx_dot_prod_INPUT_INTERFACE(input_a, input_b, block_size) \
-    PAREN(input_a, input_b, block_size,                                 \
-          complex_math_output_ref_a.data_ptr,                          \
-          complex_math_output_ref_b.data_ptr)
-
-#define ARM_cmplx_mag_INPUT_INTERFACE(input, block_size)            \
-    PAREN(input, complex_math_output_fut_a.data_ptr, block_size)
-
-#define REF_cmplx_mag_INPUT_INTERFACE(input, block_size)            \
-    PAREN(input, complex_math_output_ref_a.data_ptr, block_size)
-
-#define ARM_cmplx_mag_squared_INPUT_INTERFACE(input, block_size)    \
-    PAREN(input, complex_math_output_fut_a.data_ptr, block_size)
-
-#define REF_cmplx_mag_squared_INPUT_INTERFACE(input, block_size)    \
-    PAREN(input, complex_math_output_ref_a.data_ptr, block_size)
-
-#define ARM_cmplx_mult_cmplx_INPUT_INTERFACE(input_a, input_b, block_size) \
-    PAREN(input_a, input_b, complex_math_output_fut_a.data_ptr, block_size)
-
-#define REF_cmplx_mult_cmplx_INPUT_INTERFACE(input_a, input_b, block_size) \
-    PAREN(input_a, input_b, complex_math_output_ref_a.data_ptr, block_size)
-
-#define ARM_cmplx_mult_real_INPUT_INTERFACE(input_a, input_b, block_size) \
-    PAREN(input_a, input_b, complex_math_output_fut_a.data_ptr, block_size)
-
-#define REF_cmplx_mult_real_INPUT_INTERFACE(input_a, input_b, block_size) \
-    PAREN(input_a, input_b, complex_math_output_ref_a.data_ptr, block_size)
-
-/*--------------------------------------------------------------------------------*/
-/* Test Templates */
-/*--------------------------------------------------------------------------------*/
-
-/**
- *  Specialization of #TEST_TEMPLATE_BUF1_BLK() for complex math tests.
- *
- *  @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
- *  REF_xxx_INPUT_INTERFACEs.
- */
-#define COMPLEX_MATH_DEFINE_TEST_TEMPLATE_BUF1_BLK(fn_name,         \
-                                                   suffix,          \
-                                                   input_type,      \
-                                                   output_type,     \
-                                                   comparison_interface) \
-    JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test,              \
-                      arm_##fn_name##_##suffix)                     \
-    {                                                               \
-        TEST_TEMPLATE_BUF1_BLK(                                     \
-            complex_math_f_all,                                     \
-            complex_math_block_sizes,                               \
-            input_type,                                             \
-            output_type,                                            \
-            arm_##fn_name##_##suffix,                               \
-            ARM_##fn_name##_INPUT_INTERFACE,                        \
-            ref_##fn_name##_##suffix,                               \
-            REF_##fn_name##_INPUT_INTERFACE,                        \
-            comparison_interface);                                  \
-    }
-
-/**
- *  Specialization of #TEST_TEMPLATE_BUF2_BLK1() for complex math tests.
- *
- *  @note This macro relies on the existance of ARM_xxx_INPUT_INTERFACE and
- *  REF_xxx_INPUT_INTERFACEs.
- */
-#define COMPLEX_MATH_DEFINE_TEST_TEMPLATE_BUF2_BLK(fn_name,         \
-                                                   suffix,          \
-                                                   input_type,      \
-                                                   output_type,     \
-                                                   comparison_interface) \
-    JTEST_DEFINE_TEST(arm_##fn_name##_##suffix##_test,              \
-                      arm_##fn_name##_##suffix)                     \
-    {                                                               \
-        TEST_TEMPLATE_BUF2_BLK(                                     \
-            complex_math_f_all,                                     \
-            complex_math_f_all,                                     \
-            complex_math_block_sizes,                               \
-            input_type,                                             \
-            output_type,                                            \
-            arm_##fn_name##_##suffix,                               \
-            ARM_##fn_name##_INPUT_INTERFACE,                        \
-            ref_##fn_name##_##suffix,                               \
-            REF_##fn_name##_INPUT_INTERFACE,                        \
-            comparison_interface);                                  \
-    }
-
-#endif /* _COMPLEX_MATH_TEMPLATES_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/complex_math_tests/complex_math_test_data.h

@@ -1,50 +0,0 @@
-#ifndef _COMPLEX_MATH_TEST_DATA_H_
-#define _COMPLEX_MATH_TEST_DATA_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "arr_desc.h"
-#include "arm_math.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-#define COMPLEX_MATH_MAX_INPUT_ELEMENTS 32
-#define COMPLEX_MATH_BIGGEST_INPUT_TYPE float32_t
-
-/*--------------------------------------------------------------------------------*/
-/* Decalare Variables */
-/*--------------------------------------------------------------------------------*/
-
-/* Input/Output Buffers */
-ARR_DESC_DECLARE(complex_math_output_fut_a);
-ARR_DESC_DECLARE(complex_math_output_fut_b);
-ARR_DESC_DECLARE(complex_math_output_ref_a);
-ARR_DESC_DECLARE(complex_math_output_ref_b);
-
-extern COMPLEX_MATH_BIGGEST_INPUT_TYPE
-complex_math_output_f32_ref_a[COMPLEX_MATH_MAX_INPUT_ELEMENTS * 2];
-
-extern COMPLEX_MATH_BIGGEST_INPUT_TYPE
-complex_math_output_f32_ref_b[COMPLEX_MATH_MAX_INPUT_ELEMENTS * 2];
-
-extern COMPLEX_MATH_BIGGEST_INPUT_TYPE
-complex_math_output_f32_fut_a[COMPLEX_MATH_MAX_INPUT_ELEMENTS * 2];
-
-extern COMPLEX_MATH_BIGGEST_INPUT_TYPE
-complex_math_output_f32_fut_b[COMPLEX_MATH_MAX_INPUT_ELEMENTS * 2];
-
-/* Block Sizes*/
-ARR_DESC_DECLARE(complex_math_block_sizes);
-
-/* Float Inputs */
-ARR_DESC_DECLARE(complex_math_zeros);
-ARR_DESC_DECLARE(complex_math_f_2);
-ARR_DESC_DECLARE(complex_math_f_15);
-ARR_DESC_DECLARE(complex_math_f_32);
-ARR_DESC_DECLARE(complex_math_f_all);
-
-
-#endif /* _COMPLEX_MATH_TEST_DATA_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/complex_math_tests/complex_math_test_group.h

@@ -1,9 +0,0 @@
-#ifndef _COMPLEX_MATH_TEST_GROUP_H_
-#define _COMPLEX_MATH_TEST_GROUP_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Declare Test Groups */
-/*--------------------------------------------------------------------------------*/
-JTEST_DECLARE_GROUP(complex_math_tests);
-
-#endif /* _COMPLEX_MATH_TEST_GROUP_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/complex_math_tests/complex_math_tests.h

@@ -1,14 +0,0 @@
-#ifndef _COMPLEX_MATH_TESTS_H_
-#define _COMPLEX_MATH_TESTS_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Test/Group Declarations */
-/*--------------------------------------------------------------------------------*/
-JTEST_DECLARE_GROUP(cmplx_conj_tests);
-JTEST_DECLARE_GROUP(cmplx_dot_prod_tests);
-JTEST_DECLARE_GROUP(cmplx_mag_tests);
-JTEST_DECLARE_GROUP(cmplx_mag_squared_tests);
-JTEST_DECLARE_GROUP(cmplx_mult_cmplx_tests);
-JTEST_DECLARE_GROUP(cmplx_mult_real_tests);
-
-#endif /* _COMPLEX_MATH_TESTS_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/controller_tests/controller_templates.h

@@ -1,46 +0,0 @@
-#ifndef _CONTROLLER_TEMPLATES_H_
-#define _CONTROLLER_TEMPLATES_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "test_templates.h"
-#include <string.h>             /* memcpy() */
-
-/*--------------------------------------------------------------------------------*/
-/* Group Specific Templates */
-/*--------------------------------------------------------------------------------*/
-
-/**
- * Comparison SNR thresholds for the data types used in transform_tests.
- */
-#define CONTROLLER_SNR_THRESHOLD_float32_t 110
-#define CONTROLLER_SNR_THRESHOLD_q31_t     100
-#define CONTROLLER_SNR_THRESHOLD_q15_t     45
-
-/**
- *  Compare the outputs from the function under test and the reference
- *  function using SNR.
- */
-#define CONTROLLER_SNR_COMPARE_INTERFACE(block_size,    \
-                                         output_type)   \
-    do                                                  \
-    {                                                   \
-        TEST_CONVERT_AND_ASSERT_SNR(                    \
-            controller_output_f32_ref,                  \
-            (output_type *) controller_output_ref,      \
-            controller_output_f32_fut,                  \
-            (output_type *) controller_output_fut,      \
-            block_size,                                 \
-            output_type,                                \
-            CONTROLLER_SNR_THRESHOLD_##output_type      \
-            );                                          \
-    } while (0)
-
-
-/*--------------------------------------------------------------------------------*/
-/* TEST Templates */
-/*--------------------------------------------------------------------------------*/
-
-#endif /* _CONTROLLER_TEMPLATES_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/controller_tests/controller_test_data.h

@@ -1,33 +0,0 @@
-#ifndef _CONTROLLER_TEST_DATA_H_
-#define _CONTROLLER_TEST_DATA_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-#define CONTROLLER_MAX_LEN 1024
-#define CONTROLLER_MAX_COEFFS_LEN (12 * 3)
-#define TRANFORM_BIGGEST_INPUT_TYPE float32_t
-
-/*--------------------------------------------------------------------------------*/
-/* Variable Declarations */
-/*--------------------------------------------------------------------------------*/
-
-extern float32_t controller_output_fut[CONTROLLER_MAX_LEN];
-extern float32_t controller_output_ref[CONTROLLER_MAX_LEN];
-extern float32_t controller_output_f32_fut[CONTROLLER_MAX_LEN];
-extern float32_t controller_output_f32_ref[CONTROLLER_MAX_LEN];
-extern const float32_t controller_f32_inputs[CONTROLLER_MAX_LEN];
-extern const q31_t controller_q31_inputs[CONTROLLER_MAX_LEN];
-extern const q15_t * controller_q15_inputs;
-extern const float32_t controller_f32_coeffs[CONTROLLER_MAX_COEFFS_LEN];
-extern const q31_t controller_q31_coeffs[CONTROLLER_MAX_COEFFS_LEN];
-extern const q15_t controller_q15_coeffs[CONTROLLER_MAX_COEFFS_LEN];
-
-#endif /* _CONTROLLER_TEST_DATA_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/controller_tests/controller_test_group.h

@@ -1,9 +0,0 @@
-#ifndef _CONTROLLER_TEST_GROUP_H_
-#define _CONTROLLER_TEST_GROUP_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Declare Test Group */
-/*--------------------------------------------------------------------------------*/
-JTEST_DECLARE_GROUP(controller_tests);
-
-#endif /* _CONTROLLER_TEST_GROUP_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/controller_tests/controller_tests.h

@@ -1,11 +0,0 @@
-#ifndef _CONTROLLER_TESTS_H_
-#define _CONTROLLER_TESTS_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Test/Group Declarations */
-/*--------------------------------------------------------------------------------*/
-JTEST_DECLARE_GROUP(pid_reset_tests);
-JTEST_DECLARE_GROUP(sin_cos_tests);
-JTEST_DECLARE_GROUP(pid_tests);
-
-#endif /* _CONTROLLER_TESTS_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/fast_math_tests/fast_math_templates.h

@@ -1,102 +0,0 @@
-#ifndef _FAST_MATH_TEMPLATES_H_
-#define _FAST_MATH_TEMPLATES_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "test_templates.h"
-#include <string.h>             /* memcpy() */
-
-/*--------------------------------------------------------------------------------*/
-/* Group Specific Templates */
-/*--------------------------------------------------------------------------------*/
-
-/**
- * Comparison SNR thresholds for the data types used in transform_tests.
- */
-#define FAST_MATH_SNR_THRESHOLD_float32_t 95
-#define FAST_MATH_SNR_THRESHOLD_q31_t     95
-#define FAST_MATH_SNR_THRESHOLD_q15_t     45
-
-/**
- *  Compare the outputs from the function under test and the reference
- *  function using SNR.
- */
-#define FAST_MATH_SNR_COMPARE_INTERFACE(block_size,     \
-                                        output_type)    \
-    do                                                  \
-    {                                                   \
-        TEST_CONVERT_AND_ASSERT_SNR(                    \
-            fast_math_output_f32_ref,                   \
-            (output_type *) fast_math_output_ref,       \
-            fast_math_output_f32_fut,                   \
-            (output_type *) fast_math_output_fut,       \
-            block_size,                                 \
-            output_type,                                \
-            FAST_MATH_SNR_THRESHOLD_##output_type       \
-            );                                          \
-    } while (0)
-
-
-/*--------------------------------------------------------------------------------*/
-/* TEST Templates */
-/*--------------------------------------------------------------------------------*/
-
-#define SQRT_TEST_TEMPLATE_ELT1(suffix)                             \
-                                                                    \
-    JTEST_DEFINE_TEST(arm_sqrt_##suffix##_test, arm_sqrt_##suffix)  \
-    {                                                               \
-        uint32_t i;                                                 \
-                                                                    \
-        JTEST_COUNT_CYCLES(                                         \
-            for(i=0;i<FAST_MATH_MAX_LEN;i++)                        \
-            {                                                       \
-                arm_sqrt_##suffix(                                  \
-                    (suffix##_t)fast_math_##suffix##_inputs[i]      \
-                    ,(suffix##_t*)fast_math_output_fut + i);        \
-            });                                                     \
-                                                                    \
-        for(i=0;i<FAST_MATH_MAX_LEN;i++)                            \
-        {                                                           \
-            ref_sqrt_##suffix(                                      \
-                (suffix##_t)fast_math_##suffix##_inputs[i]          \
-                ,(suffix##_t*)fast_math_output_ref + i);            \
-        }                                                           \
-                                                                    \
-        FAST_MATH_SNR_COMPARE_INTERFACE(                            \
-            FAST_MATH_MAX_LEN,                                      \
-            suffix##_t);                                            \
-                                                                    \
-        return JTEST_TEST_PASSED;                                   \
-    }
-
-
-#define SIN_COS_TEST_TEMPLATE_ELT1(suffix, type, func)                  \
-                                                                        \
-        JTEST_DEFINE_TEST(arm_##func##_##suffix##_test, arm_##func##_##suffix) \
-        {                                                               \
-            uint32_t i;                                                 \
-                                                                        \
-            JTEST_COUNT_CYCLES(                                         \
-                for(i=0;i<FAST_MATH_MAX_LEN;i++)                        \
-                {                                                       \
-                    *((type*)fast_math_output_fut + i) = arm_##func##_##suffix( \
-                        fast_math_##suffix##_inputs[i]);                \
-                });                                                     \
-                                                                        \
-            JTEST_COUNT_CYCLES(                                         \
-                for(i=0;i<FAST_MATH_MAX_LEN;i++)                        \
-                {                                                       \
-                    *((type*)fast_math_output_ref + i) = ref_##func##_##suffix( \
-                        fast_math_##suffix##_inputs[i]);                \
-                });                                                     \
-                                                                        \
-            FAST_MATH_SNR_COMPARE_INTERFACE(                            \
-                FAST_MATH_MAX_LEN,                                      \
-                type);                                                  \
-                                                                        \
-            return JTEST_TEST_PASSED;                                   \
-        }
-
-#endif /* _FAST_MATH_TEMPLATES_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/fast_math_tests/fast_math_test_data.h

@@ -1,29 +0,0 @@
-#ifndef _FAST_MATH_TEST_DATA_H_
-#define _FAST_MATH_TEST_DATA_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-#define FAST_MATH_MAX_LEN 1024
-#define TRANFORM_BIGGEST_INPUT_TYPE float32_t
-
-/*--------------------------------------------------------------------------------*/
-/* Variable Declarations */
-/*--------------------------------------------------------------------------------*/
-
-extern float32_t fast_math_output_fut[FAST_MATH_MAX_LEN];
-extern float32_t fast_math_output_ref[FAST_MATH_MAX_LEN];
-extern float32_t fast_math_output_f32_fut[FAST_MATH_MAX_LEN];
-extern float32_t fast_math_output_f32_ref[FAST_MATH_MAX_LEN];
-extern const float32_t fast_math_f32_inputs[FAST_MATH_MAX_LEN];
-extern const q31_t fast_math_q31_inputs[FAST_MATH_MAX_LEN];
-extern const q15_t * fast_math_q15_inputs;
-
-#endif /* _FAST_MATH_TEST_DATA_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/fast_math_tests/fast_math_test_group.h

@@ -1,9 +0,0 @@
-#ifndef _FAST_MATH_TEST_GROUP_H_
-#define _FAST_MATH_TEST_GROUP_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Declare Test Groups */
-/*--------------------------------------------------------------------------------*/
-JTEST_DECLARE_GROUP(fast_math_tests);
-
-#endif /* _FAST_MATH_TEST_GROUP_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/filtering_tests/filtering_templates.h

@@ -1,91 +0,0 @@
-#ifndef _FILTERING_TEMPLATES_H_
-#define _FILTERING_TEMPLATES_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-#include "test_templates.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Group Specific Templates */
-/*--------------------------------------------------------------------------------*/
-
-/*
- * Comparison SNR thresholds for the data types used in statistics_tests.
- */
-#define FILTERING_SNR_THRESHOLD_float64_t 120
-#define FILTERING_SNR_THRESHOLD_float32_t 99
-#define FILTERING_SNR_THRESHOLD_q31_t 90
-#define FILTERING_SNR_THRESHOLD_q15_t 60
-#define FILTERING_SNR_THRESHOLD_q7_t 30
-
-/**
- *  Compare reference and fut outputs using SNR.
- *
- *  @note The outputs are converted to float32_t before comparison.
- */
-#define FILTERING_SNR_COMPARE_INTERFACE(block_size,                     \
-                                        output_type)                    \
-    FILTERING_SNR_COMPARE_INTERFACE_OFFSET(0, block_size, output_type)
-
-/**
- *  Compare reference and fut outputs starting at some offset using SNR.
- */
-#define FILTERING_SNR_COMPARE_INTERFACE_OFFSET(offset,      \
-                                               block_size,  \
-                                               output_type) \
-    do                                                      \
-    {                                                       \
-        TEST_CONVERT_AND_ASSERT_SNR(                        \
-            filtering_output_f32_ref,                       \
-            (output_type *) filtering_output_ref + offset,  \
-            filtering_output_f32_fut,                       \
-            (output_type *) filtering_output_fut + offset,  \
-            block_size,                                     \
-            output_type,                                    \
-            FILTERING_SNR_THRESHOLD_##output_type           \
-            );                                              \
-    } while (0)                                              
-
-/**
- *  Compare reference and fut outputs starting at some offset using SNR.
- *  Special case for float64_t
- */
-#define FILTERING_DBL_SNR_COMPARE_INTERFACE(block_size,  				\
-                                            output_type) 				\
-    do                                                      		\
-    {                                                       		\
-        TEST_ASSERT_DBL_SNR(                        						\
-            (float64_t*)filtering_output_ref,               \
-            (float64_t*)filtering_output_fut,               \
-            block_size,                                     		\
-            FILTERING_SNR_THRESHOLD_##output_type           		\
-            );                                              		\
-    } while (0)                                              
-		
-/*--------------------------------------------------------------------------------*/
-/* Input Interfaces */
-/*--------------------------------------------------------------------------------*/
-/*
- *  General:
- *  Input interfaces provide inputs to functions inside test templates.  They
- *  ONLY provide the inputs.  The output variables should be hard coded.
- *
- *  The input interfaces must have the following format:
- *
- *  ARM_xxx_INPUT_INTERFACE() or
- *  REF_xxx_INPUT_INTERFACE()
- *
- *  The xxx must be lowercase, and is intended to be the indentifying substring
- *  in the function's name.  Acceptable values are 'sub' or 'add' from the
- *  functions arm_add_q31.
- */
-
-
-/*--------------------------------------------------------------------------------*/
-/* Test Templates */
-/*--------------------------------------------------------------------------------*/
-
-
-
-#endif /* _FILTERING_TEMPLATES_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/filtering_tests/filtering_test_data.h

@@ -1,81 +0,0 @@
-#ifndef FILTERING_TEST_DATA_H
-#define FILTERING_TEST_DATA_H
-
-/*--------------------------------------------------------------------------------*/
-/* Includes */
-/*--------------------------------------------------------------------------------*/
-
-#include "arr_desc.h"
-#include "arm_math.h"
-
-/*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
-/*--------------------------------------------------------------------------------*/
-
-#define FILTERING_MAX_BLOCKSIZE  33
-#define LMS_MAX_BLOCKSIZE        512
-#define FILTERING_MAX_NUMTAPS		34
-#define FILTERING_MAX_NUMSTAGES  14
-#define FILTERING_MAX_POSTSHIFT  8
-#define FILTERING_MAX_TAP_DELAY	0xFF
-#define FILTERING_MAX_L				3
-#define FILTERING_MAX_M				33
-
-/*--------------------------------------------------------------------------------*/
-/* Declare Variables */
-/*--------------------------------------------------------------------------------*/
-
-/* Input/Output Buffers */
-extern float32_t filtering_output_fut[LMS_MAX_BLOCKSIZE*2];
-extern float32_t filtering_output_ref[LMS_MAX_BLOCKSIZE*2];
-extern float32_t filtering_output_f32_fut[LMS_MAX_BLOCKSIZE*2];
-extern float32_t filtering_output_f32_ref[LMS_MAX_BLOCKSIZE*2];
-extern float32_t filtering_input_lms[LMS_MAX_BLOCKSIZE*2];
-extern float32_t filtering_pState[LMS_MAX_BLOCKSIZE + FILTERING_MAX_NUMTAPS];
-extern float32_t filtering_scratch[FILTERING_MAX_BLOCKSIZE * 3];
-extern float32_t filtering_scratch2[FILTERING_MAX_BLOCKSIZE * 3];
-extern float32_t filtering_coeffs_lms[FILTERING_MAX_NUMTAPS];
-
-extern const float64_t filtering_f64_inputs[FILTERING_MAX_BLOCKSIZE * FILTERING_MAX_M + FILTERING_MAX_NUMTAPS];
-extern const float32_t filtering_f32_inputs[FILTERING_MAX_BLOCKSIZE * FILTERING_MAX_M + FILTERING_MAX_NUMTAPS];
-extern const q31_t filtering_q31_inputs[FILTERING_MAX_BLOCKSIZE * FILTERING_MAX_M + FILTERING_MAX_NUMTAPS];
-extern const q15_t * filtering_q15_inputs;
-extern const q7_t * filtering_q7_inputs;
-
-/* Block Sizes */
-ARR_DESC_DECLARE(filtering_blocksizes);
-ARR_DESC_DECLARE(lms_blocksizes);
-ARR_DESC_DECLARE(filtering_numtaps);
-ARR_DESC_DECLARE(filtering_numtaps2);
-ARR_DESC_DECLARE(filtering_postshifts);
-ARR_DESC_DECLARE(filtering_numstages);
-ARR_DESC_DECLARE(filtering_Ls);
-ARR_DESC_DECLARE(filtering_Ms);
-
-/* Coefficient Lists */
-extern const float64_t filtering_coeffs_f64[FILTERING_MAX_NUMSTAGES * 6 + 2];
-extern const float64_t filtering_coeffs_b_f64[FILTERING_MAX_NUMSTAGES * 6 + 2];
-extern const float32_t filtering_coeffs_f32[FILTERING_MAX_NUMSTAGES * 6 + 2];
-extern const float32_t filtering_coeffs_b_f32[FILTERING_MAX_NUMSTAGES * 6 + 2];
-extern const float32_t *filtering_coeffs_c_f32;
-extern float32_t filtering_coeffs_lms_f32[FILTERING_MAX_NUMTAPS];
-extern const q31_t filtering_coeffs_q31[FILTERING_MAX_NUMSTAGES * 6 + 2];
-extern const q31_t *filtering_coeffs_b_q31;
-extern const q31_t *filtering_coeffs_c_q31;
-extern q31_t filtering_coeffs_lms_q31[FILTERING_MAX_NUMTAPS];
-extern const q15_t filtering_coeffs_q15[FILTERING_MAX_NUMSTAGES * 6 + 4];
-extern const q15_t *filtering_coeffs_b_q15;
-extern const q15_t *filtering_coeffs_c_q15;
-extern q15_t filtering_coeffs_lms_q15[FILTERING_MAX_NUMTAPS];
-extern const q7_t filtering_coeffs_q7[FILTERING_MAX_NUMSTAGES * 6 + 8];
-extern const q7_t *filtering_coeffs_b_q7;
-extern const q7_t *filtering_coeffs_c_q7;
-
-/* Tap Delay Lists */
-extern const int32_t filtering_tap_delay[FILTERING_MAX_NUMTAPS];
-
-/* Numbers */
-
-/* Float Inputs */
-
-#endif

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/filtering_tests/filtering_test_group.h

@@ -1,9 +0,0 @@
-#ifndef _FILTERING_TEST_GROUP_H_
-#define _FILTERING_TEST_GROUP_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Declare Test Groups */
-/*--------------------------------------------------------------------------------*/
-JTEST_DECLARE_GROUP(filtering_tests);
-
-#endif /* _FILTERING_TEST_GROUP_H_ */

resources/FC_camera/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/Common/inc/filtering_tests/filtering_tests.h

@@ -1,15 +0,0 @@
-#ifndef _FILTERING_TESTS_H_
-#define _FILTERING_TESTS_H_
-
-/*--------------------------------------------------------------------------------*/
-/* Test/Group Declarations */
-/*--------------------------------------------------------------------------------*/
-
-JTEST_DECLARE_GROUP(biquad_tests);
-JTEST_DECLARE_GROUP(conv_tests);
-JTEST_DECLARE_GROUP(correlate_tests);
-JTEST_DECLARE_GROUP(fir_tests);
-JTEST_DECLARE_GROUP(iir_tests);
-JTEST_DECLARE_GROUP(lms_tests);
-
-#endif /* _FILTERING_TESTS_H_ */