Error in makefile

This commit is contained in:
Adam Procházka
2023-02-23 14:34:10 +01:00
parent 9d50a83a78
commit 276d443bb1
1281 changed files with 269818 additions and 54 deletions

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/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/** \ingroup group_board
* \defgroup group_ansi_esc ANSI Escape Code
* @{ */
#ifndef _TUSB_ANSI_ESC_CODE_H_
#define _TUSB_ANSI_ESC_CODE_H_
#ifdef __cplusplus
extern "C" {
#endif
#define CSI_CODE(seq) "\33[" seq
#define CSI_SGR(x) CSI_CODE(#x) "m"
//------------- Cursor movement -------------//
/** \defgroup group_ansi_cursor Cursor Movement
* @{ */
#define ANSI_CURSOR_UP(n) CSI_CODE(#n "A") ///< Move cursor up
#define ANSI_CURSOR_DOWN(n) CSI_CODE(#n "B") ///< Move cursor down
#define ANSI_CURSOR_FORWARD(n) CSI_CODE(#n "C") ///< Move cursor forward
#define ANSI_CURSOR_BACKWARD(n) CSI_CODE(#n "D") ///< Move cursor backward
#define ANSI_CURSOR_LINE_DOWN(n) CSI_CODE(#n "E") ///< Move cursor to the beginning of the line (n) down
#define ANSI_CURSOR_LINE_UP(n) CSI_CODE(#n "F") ///< Move cursor to the beginning of the line (n) up
#define ANSI_CURSOR_POSITION(n, m) CSI_CODE(#n ";" #m "H") ///< Move cursor to position (n, m)
/** @} */
//------------- Screen -------------//
/** \defgroup group_ansi_screen Screen Control
* @{ */
#define ANSI_ERASE_SCREEN(n) CSI_CODE(#n "J") ///< Erase the screen
#define ANSI_ERASE_LINE(n) CSI_CODE(#n "K") ///< Erase the line (n)
#define ANSI_SCROLL_UP(n) CSI_CODE(#n "S") ///< Scroll the whole page up (n) lines
#define ANSI_SCROLL_DOWN(n) CSI_CODE(#n "T") ///< Scroll the whole page down (n) lines
/** @} */
//------------- Text Color -------------//
/** \defgroup group_ansi_text Text Color
* @{ */
#define ANSI_TEXT_BLACK CSI_SGR(30)
#define ANSI_TEXT_RED CSI_SGR(31)
#define ANSI_TEXT_GREEN CSI_SGR(32)
#define ANSI_TEXT_YELLOW CSI_SGR(33)
#define ANSI_TEXT_BLUE CSI_SGR(34)
#define ANSI_TEXT_MAGENTA CSI_SGR(35)
#define ANSI_TEXT_CYAN CSI_SGR(36)
#define ANSI_TEXT_WHITE CSI_SGR(37)
#define ANSI_TEXT_DEFAULT CSI_SGR(39)
/** @} */
//------------- Background Color -------------//
/** \defgroup group_ansi_background Background Color
* @{ */
#define ANSI_BG_BLACK CSI_SGR(40)
#define ANSI_BG_RED CSI_SGR(41)
#define ANSI_BG_GREEN CSI_SGR(42)
#define ANSI_BG_YELLOW CSI_SGR(43)
#define ANSI_BG_BLUE CSI_SGR(44)
#define ANSI_BG_MAGENTA CSI_SGR(45)
#define ANSI_BG_CYAN CSI_SGR(46)
#define ANSI_BG_WHITE CSI_SGR(47)
#define ANSI_BG_DEFAULT CSI_SGR(49)
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* _TUSB_ANSI_ESC_CODE_H_ */
/** @} */

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/*
* The MIT License (MIT)
*
* Copyright (c) 2018, hathach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
*/
#include "board.h"
#if 0
#define LED_PHASE_MAX 8
static struct
{
uint32_t phase[LED_PHASE_MAX];
uint8_t phase_count;
bool led_state;
uint8_t current_phase;
uint32_t current_ms;
}led_pattern;
void board_led_pattern(uint32_t const phase_ms[], uint8_t count)
{
memcpy(led_pattern.phase, phase_ms, 4*count);
led_pattern.phase_count = count;
// reset with 1st phase is on
led_pattern.current_ms = board_millis();
led_pattern.current_phase = 0;
led_pattern.led_state = true;
board_led_on();
}
void board_led_task(void)
{
if ( led_pattern.phase_count == 0 ) return;
uint32_t const duration = led_pattern.phase[led_pattern.current_phase];
// return if not enough time
if (board_millis() - led_pattern.current_ms < duration) return;
led_pattern.led_state = !led_pattern.led_state;
board_led_write(led_pattern.led_state);
led_pattern.current_ms += duration;
led_pattern.current_phase++;
if (led_pattern.current_phase == led_pattern.phase_count)
{
led_pattern.current_phase = 0;
led_pattern.led_state = true;
board_led_on();
}
}
#endif
//--------------------------------------------------------------------+
// newlib read()/write() retarget
//--------------------------------------------------------------------+
#ifdef __ICCARM__
#define sys_write __write
#define sys_read __read
#elif defined(__MSP430__) || defined(__RX__)
#define sys_write write
#define sys_read read
#else
#define sys_write _write
#define sys_read _read
#endif
#if defined(LOGGER_RTT)
// Logging with RTT
// If using SES IDE, use the Syscalls/SEGGER_RTT_Syscalls_SES.c instead
#if !(defined __SES_ARM) && !(defined __SES_RISCV) && !(defined __CROSSWORKS_ARM)
#include "SEGGER_RTT.h"
TU_ATTR_USED int sys_write (int fhdl, const void *buf, size_t count)
{
(void) fhdl;
SEGGER_RTT_Write(0, (const char*) buf, (int) count);
return count;
}
TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count)
{
(void) fhdl;
int rd = (int) SEGGER_RTT_Read(0, buf, count);
return (rd > 0) ? rd : -1;
}
#endif
#elif defined(LOGGER_SWO)
// Logging with SWO for ARM Cortex
#include "board_mcu.h"
TU_ATTR_USED int sys_write (int fhdl, const void *buf, size_t count)
{
(void) fhdl;
uint8_t const* buf8 = (uint8_t const*) buf;
for(size_t i=0; i<count; i++)
{
ITM_SendChar(buf8[i]);
}
return count;
}
TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count)
{
(void) fhdl;
(void) buf;
(void) count;
return 0;
}
#else
// Default logging with on-board UART
TU_ATTR_USED int sys_write (int fhdl, const void *buf, size_t count)
{
(void) fhdl;
return board_uart_write(buf, (int) count);
}
TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count)
{
(void) fhdl;
int rd = board_uart_read((uint8_t*) buf, (int) count);
return (rd > 0) ? rd : -1;
}
#endif
int board_getchar(void)
{
char c;
return ( sys_read(0, &c, 1) > 0 ) ? (int) c : (-1);
}

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/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/** \ingroup group_demo
* \defgroup group_board Boards Abstraction Layer
* @{ */
#ifndef _BSP_BOARD_H_
#define _BSP_BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stdbool.h>
#include "ansi_escape.h"
#include "tusb.h"
// Define the default baudrate
#ifndef CFG_BOARD_UART_BAUDRATE
#define CFG_BOARD_UART_BAUDRATE 115200 ///< Default baud rate
#endif
//--------------------------------------------------------------------+
// Board Porting API
// For simplicity, only one LED and one Button are used
//--------------------------------------------------------------------+
// Initialize on-board peripherals : led, button, uart and USB
void board_init(void);
// Turn LED on or off
void board_led_write(bool state);
// Control led pattern using phase duration in ms.
// For each phase, LED is toggle then repeated, board_led_task() is required to be called
//void board_led_pattern(uint32_t const phase_ms[], uint8_t count);
// Get the current state of button
// a '1' means active (pressed), a '0' means inactive.
uint32_t board_button_read(void);
// Get characters from UART
// Return number of read bytes
int board_uart_read(uint8_t* buf, int len);
// Send characters to UART
// Return number of sent bytes
int board_uart_write(void const * buf, int len);
#if CFG_TUSB_OS == OPT_OS_NONE
// Get current milliseconds, must be implemented when no RTOS is used
uint32_t board_millis(void);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
static inline uint32_t board_millis(void)
{
return ( ( ((uint64_t) xTaskGetTickCount()) * 1000) / configTICK_RATE_HZ );
}
#elif CFG_TUSB_OS == OPT_OS_MYNEWT
static inline uint32_t board_millis(void)
{
return os_time_ticks_to_ms32( os_time_get() );
}
#elif CFG_TUSB_OS == OPT_OS_PICO
#include "pico/time.h"
static inline uint32_t board_millis(void)
{
return to_ms_since_boot(get_absolute_time());
}
#elif CFG_TUSB_OS == OPT_OS_RTTHREAD
static inline uint32_t board_millis(void)
{
return (((uint64_t)rt_tick_get()) * 1000 / RT_TICK_PER_SECOND);
}
#else
#error "board_millis() is not implemented for this OS"
#endif
//--------------------------------------------------------------------+
// Helper functions
//--------------------------------------------------------------------+
static inline void board_led_on(void)
{
board_led_write(true);
}
static inline void board_led_off(void)
{
board_led_write(false);
}
// TODO remove
static inline void board_delay(uint32_t ms)
{
uint32_t start_ms = board_millis();
while (board_millis() - start_ms < ms)
{
#if CFG_TUD_ENABLED
// take chance to run usb background
tud_task();
#endif
}
}
// stdio getchar() is blocking, this is non-blocking version
int board_getchar(void);
#ifdef __cplusplus
}
#endif
#endif /* _BSP_BOARD_H_ */
/** @} */

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_MCU_H_
#define BOARD_MCU_H_
#include "tusb_option.h"
//--------------------------------------------------------------------+
// Low Level MCU header include. Example should be
// platform independent and mostly doesn't need to include this file.
// However there are still certain situation where this file is needed:
// - FreeRTOSConfig.h to set up correct clock and NVIC interrupts for ARM Cortex
// - SWO logging for Cortex M with ITM_SendChar() / ITM_ReceiveChar()
//--------------------------------------------------------------------+
// Include order follows OPT_MCU_ number
#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX || \
CFG_TUSB_MCU == OPT_MCU_LPC15XX || CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || \
CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC18XX || \
CFG_TUSB_MCU == OPT_MCU_LPC40XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX
#include "chip.h"
#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \
CFG_TUSB_MCU == OPT_MCU_LPC55XX || CFG_TUSB_MCU == OPT_MCU_MKL25ZXX || \
CFG_TUSB_MCU == OPT_MCU_K32L2BXX
#include "fsl_device_registers.h"
#elif CFG_TUSB_MCU == OPT_MCU_NRF5X
#include "nrf.h"
#elif CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || \
CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X || \
CFG_TUSB_MCU == OPT_MCU_SAML22 || CFG_TUSB_MCU == OPT_MCU_SAML21
#include "sam.h"
#elif CFG_TUSB_MCU == OPT_MCU_SAMG
#undef LITTLE_ENDIAN // hack to suppress "LITTLE_ENDIAN" redefined
#include "sam.h"
#elif CFG_TUSB_MCU == OPT_MCU_STM32F0
#include "stm32f0xx.h"
#elif CFG_TUSB_MCU == OPT_MCU_STM32F1
#include "stm32f1xx.h"
#elif CFG_TUSB_MCU == OPT_MCU_STM32F2
#include "stm32f2xx.h"
#elif CFG_TUSB_MCU == OPT_MCU_STM32F3
#include "stm32f3xx.h"
#elif CFG_TUSB_MCU == OPT_MCU_STM32F4
#include "stm32f4xx.h"
#elif CFG_TUSB_MCU == OPT_MCU_STM32F7
#include "stm32f7xx.h"
#elif CFG_TUSB_MCU == OPT_MCU_STM32G4
#include "stm32g4xx.h"
#elif CFG_TUSB_MCU == OPT_MCU_STM32H7
#include "stm32h7xx.h"
#elif CFG_TUSB_MCU == OPT_MCU_STM32L0
#include "stm32l0xx.h"
#elif CFG_TUSB_MCU == OPT_MCU_STM32L1
#include "stm32l1xx.h"
#elif CFG_TUSB_MCU == OPT_MCU_STM32L4
#include "stm32l4xx.h"
#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
#include "stm32wbxx.h"
#elif CFG_TUSB_MCU == OPT_MCU_STM32U5
#include "stm32u5xx.h"
#elif CFG_TUSB_MCU == OPT_MCU_CXD56
// no header needed
#elif CFG_TUSB_MCU == OPT_MCU_MSP430x5xx
#include "msp430.h"
#elif CFG_TUSB_MCU == OPT_MCU_MSP432E4
#include "msp.h"
#elif CFG_TUSB_MCU == OPT_MCU_VALENTYUSB_EPTRI
// no header needed
#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT
#include "fsl_device_registers.h"
#elif CFG_TUSB_MCU == OPT_MCU_NUC120
#include "NUC100Series.h"
#elif CFG_TUSB_MCU == OPT_MCU_NUC121 || CFG_TUSB_MCU == OPT_MCU_NUC126
#include "NuMicro.h"
#elif CFG_TUSB_MCU == OPT_MCU_NUC505
#include "NUC505Series.h"
#elif CFG_TUSB_MCU == OPT_MCU_ESP32S2
// no header needed
#elif CFG_TUSB_MCU == OPT_MCU_ESP32S3
// no header needed
#elif CFG_TUSB_MCU == OPT_MCU_DA1469X
#include "DA1469xAB.h"
#elif CFG_TUSB_MCU == OPT_MCU_RP2040
#include "pico.h"
#elif CFG_TUSB_MCU == OPT_MCU_EFM32GG
#include "em_device.h"
#elif CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X
// no header needed
#elif CFG_TUSB_MCU == OPT_MCU_GD32VF103
#include "gd32vf103.h"
#elif CFG_TUSB_MCU == OPT_MCU_MM32F327X
#include "mm32_device.h"
#elif CFG_TUSB_MCU == OPT_MCU_XMC4000
#include "xmc_device.h"
#elif CFG_TUSB_MCU == OPT_MCU_TM4C123
#include "TM4C123.h"
#elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837)
// no header needed
#else
#error "Missing MCU header"
#endif
#endif /* BOARD_MCU_H_ */

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

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CFLAGS += -mcpu=arm1176jzf-s \
-DBCM_VERSION=2835 \
-DCFG_TUSB_MCU=OPT_MCU_BCM2835
SUFFIX =

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/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "bsp/board.h"
#include "board.h"
#include "broadcom/cpu.h"
#include "broadcom/gpio.h"
#include "broadcom/interrupts.h"
#include "broadcom/mmu.h"
#include "broadcom/caches.h"
#include "broadcom/vcmailbox.h"
// LED
#define LED_PIN 18
#define LED_STATE_ON 1
// UART TX
#define UART_TX_PIN 14
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_IRQHandler(void)
{
tud_int_handler(0);
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_init(void)
{
setup_mmu_flat_map();
init_caches();
// LED
gpio_set_function(LED_PIN, GPIO_FUNCTION_OUTPUT);
gpio_set_pull(LED_PIN, BP_PULL_NONE);
board_led_write(true);
// Uart
COMPLETE_MEMORY_READS;
AUX->ENABLES_b.UART_1 = true;
UART1->IER = 0;
UART1->CNTL = 0;
UART1->LCR_b.DATA_SIZE = UART1_LCR_DATA_SIZE_MODE_8BIT;
UART1->MCR = 0;
UART1->IER = 0;
uint32_t source_clock = vcmailbox_get_clock_rate_measured(VCMAILBOX_CLOCK_CORE);
UART1->BAUD = ((source_clock / (115200 * 8)) - 1);
UART1->CNTL |= UART1_CNTL_TX_ENABLE_Msk;
COMPLETE_MEMORY_READS;
gpio_set_function(UART_TX_PIN, GPIO_FUNCTION_ALT5);
// Turn on USB peripheral.
vcmailbox_set_power_state(VCMAILBOX_DEVICE_USB_HCD, true);
// Timer 1/1024 second tick
SYSTMR->CS_b.M1 = 1;
SYSTMR->C1 = SYSTMR->CLO + 977;
BP_EnableIRQ(TIMER_1_IRQn);
BP_SetPriority(USB_IRQn, 0x00);
BP_ClearPendingIRQ(USB_IRQn);
BP_EnableIRQ(USB_IRQn);
BP_EnableIRQs();
}
void board_led_write(bool state)
{
gpio_set_value(LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
}
uint32_t board_button_read(void)
{
return 0;
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
for (int i = 0; i < len; i++) {
const char* cbuf = buf;
while (!UART1->STAT_b.TX_READY) {}
if (cbuf[i] == '\n') {
UART1->IO = '\r';
while (!UART1->STAT_b.TX_READY) {}
}
UART1->IO = cbuf[i];
}
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void TIMER_1_IRQHandler(void)
{
system_ticks++;
SYSTMR->C1 += 977;
SYSTMR->CS_b.M1 = 1;
}
uint32_t board_millis(void)
{
return system_ticks;
}
#endif
void HardFault_Handler (void)
{
// asm("bkpt");
}
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
void _init(void)
{
}

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MCU_DIR = hw/mcu/broadcom
DEPS_SUBMODULES += $(MCU_DIR)
include $(TOP)/$(BOARD_PATH)/board.mk
CFLAGS += \
-Wall \
-O0 \
-ffreestanding \
-nostdlib \
-nostartfiles \
-mgeneral-regs-only \
-fno-exceptions \
-std=c17
CROSS_COMPILE = arm-none-eabi-
# mcu driver cause following warnings
CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls
SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c \
$(MCU_DIR)/broadcom/gen/interrupt_handlers.c \
$(MCU_DIR)/broadcom/gpio.c \
$(MCU_DIR)/broadcom/interrupts.c \
$(MCU_DIR)/broadcom/mmu.c \
$(MCU_DIR)/broadcom/caches.c \
$(MCU_DIR)/broadcom/vcmailbox.c
SKIP_NANOLIB = 1
LD_FILE = $(MCU_DIR)/broadcom/link$(SUFFIX).ld
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/$(MCU_DIR)
SRC_S += $(MCU_DIR)/broadcom/boot$(SUFFIX).S
$(BUILD)/kernel$(SUFFIX).img: $(BUILD)/$(PROJECT).elf
$(OBJCOPY) -O binary $^ $@
# Copy to kernel to netboot drive or SD card
# Change destinaation to fit your need
flash: $(BUILD)/kernel$(SUFFIX).img
@$(CP) $< /home/$(USER)/Documents/code/pi_tinyusb/boot_cpy

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

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CFLAGS += -mcpu=cortex-a72 \
-DBCM_VERSION=2711 \
-DCFG_TUSB_MCU=OPT_MCU_BCM2711

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

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CFLAGS += -mcpu=cortex-a53 \
-DBCM_VERSION=2837 \
-DCFG_TUSB_MCU=OPT_MCU_BCM2837

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/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "bsp/board.h"
#include "board.h"
#include "broadcom/cpu.h"
#include "broadcom/gpio.h"
#include "broadcom/interrupts.h"
#include "broadcom/mmu.h"
#include "broadcom/caches.h"
#include "broadcom/vcmailbox.h"
// LED
#define LED_PIN 18
#define LED_STATE_ON 1
// UART TX
#define UART_TX_PIN 14
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_IRQHandler(void)
{
tud_int_handler(0);
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_init(void)
{
setup_mmu_flat_map();
init_caches();
// LED
gpio_set_function(LED_PIN, GPIO_FUNCTION_OUTPUT);
gpio_set_pull(LED_PIN, BP_PULL_NONE);
board_led_write(true);
// Uart
COMPLETE_MEMORY_READS;
AUX->ENABLES_b.UART_1 = true;
UART1->IER = 0;
UART1->CNTL = 0;
UART1->LCR_b.DATA_SIZE = UART1_LCR_DATA_SIZE_MODE_8BIT;
UART1->MCR = 0;
UART1->IER = 0;
uint32_t source_clock = vcmailbox_get_clock_rate_measured(VCMAILBOX_CLOCK_CORE);
UART1->BAUD = ((source_clock / (115200 * 8)) - 1);
UART1->CNTL |= UART1_CNTL_TX_ENABLE_Msk;
COMPLETE_MEMORY_READS;
gpio_set_function(UART_TX_PIN, GPIO_FUNCTION_ALT5);
// Turn on USB peripheral.
vcmailbox_set_power_state(VCMAILBOX_DEVICE_USB_HCD, true);
// Timer 1/1024 second tick
SYSTMR->CS_b.M1 = 1;
SYSTMR->C1 = SYSTMR->CLO + 977;
BP_EnableIRQ(TIMER_1_IRQn);
BP_SetPriority(USB_IRQn, 0x00);
BP_ClearPendingIRQ(USB_IRQn);
BP_EnableIRQ(USB_IRQn);
BP_EnableIRQs();
}
void board_led_write(bool state)
{
gpio_set_value(LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
}
uint32_t board_button_read(void)
{
return 0;
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
for (int i = 0; i < len; i++) {
const char* cbuf = buf;
while (!UART1->STAT_b.TX_READY) {}
if (cbuf[i] == '\n') {
UART1->IO = '\r';
while (!UART1->STAT_b.TX_READY) {}
}
UART1->IO = cbuf[i];
}
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void TIMER_1_IRQHandler(void)
{
system_ticks++;
SYSTMR->C1 += 977;
SYSTMR->CS_b.M1 = 1;
}
uint32_t board_millis(void)
{
return system_ticks;
}
#endif
void HardFault_Handler (void)
{
// asm("bkpt");
}
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
void _init(void)
{
}

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MCU_DIR = hw/mcu/broadcom
DEPS_SUBMODULES += $(MCU_DIR)
include $(TOP)/$(BOARD_PATH)/board.mk
CFLAGS += \
-Wall \
-O0 \
-ffreestanding \
-nostdlib \
-nostartfiles \
-mgeneral-regs-only \
-std=c17
CROSS_COMPILE = aarch64-none-elf-
# mcu driver cause following warnings
CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls
SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c \
$(MCU_DIR)/broadcom/gen/interrupt_handlers.c \
$(MCU_DIR)/broadcom/gpio.c \
$(MCU_DIR)/broadcom/interrupts.c \
$(MCU_DIR)/broadcom/mmu.c \
$(MCU_DIR)/broadcom/caches.c \
$(MCU_DIR)/broadcom/vcmailbox.c
SKIP_NANOLIB = 1
LD_FILE = $(MCU_DIR)/broadcom/link8.ld
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/$(MCU_DIR) \
$(TOP)/lib/CMSIS_5/CMSIS/Core_A/Include
SRC_S += $(MCU_DIR)/broadcom/boot8.S
$(BUILD)/kernel8.img: $(BUILD)/$(PROJECT).elf
$(OBJCOPY) -O binary $^ $@
# Copy to kernel to netboot drive or SD card
# Change destinaation to fit your need
flash: $(BUILD)/kernel8.img
@$(CP) $< /home/$(USER)/Documents/code/pi_tinyusb/boot_cpy

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/*
* The MIT License (MIT)
*
* Copyright 2021 Bridgetek Pte Ltd
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_H_
#define BOARD_H_
// Note: This definition file covers all MM900EV1B, MM900EV2B, MM900EV3B,
// MM900EV-Lite boards.
// Each of these boards has an FT900 device.
#ifdef __cplusplus
extern "C" {
#endif
// UART to use on this board.
#ifndef BOARD_UART
#define BOARD_UART UART0
#endif
// UART is on connector CN1.
#ifndef BOARD_GPIO_UART0_TX
#define BOARD_GPIO_UART0_TX 48 // Pin 4 of CN1.
#endif
#ifndef BOARD_GPIO_UART0_RX
#define BOARD_GPIO_UART0_RX 49 // Pin 6 of CN1.
#endif
// LED is connected to pins 17 (signal) and 15 (GND) of CN1.
#ifndef BOARD_GPIO_LED
#define BOARD_GPIO_LED 35
#endif
#ifndef BOARD_GPIO_LED_STATE_ON
#define BOARD_GPIO_LED_STATE_ON 1
#endif
// Button is connected to pins 13 (signal) and 15 (GND) of CN1.
#ifndef BOARD_GPIO_BUTTON
#define BOARD_GPIO_BUTTON 56
#endif
// Button is pulled up and grounded for active.
#ifndef BOARD_GPIO_BUTTON_STATE_ACTIVE
#define BOARD_GPIO_BUTTON_STATE_ACTIVE 0
#endif
// Enable the Remote Wakeup signalling.
// Remote wakeup is wired to pin 40 of CN1.
#ifndef BOARD_GPIO_REMOTE_WAKEUP
#define BOARD_GPIO_REMOTE_WAKEUP 18
#endif
// USB VBus signal is connected directly to the FT900.
#ifndef BOARD_USBD_VBUS_DTC_PIN
#define BOARD_USBD_VBUS_DTC_PIN 3
#endif
#ifdef __cplusplus
}
#endif
#endif

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/*
* The MIT License (MIT)
*
* Copyright 2021 Bridgetek Pte Ltd
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "bsp/board.h"
#include "board.h"
#include <ft900.h>
#include <registers/ft900_registers.h>
#if CFG_TUD_ENABLED
int8_t board_ft9xx_vbus(void); // Board specific implementation of VBUS detection for USB device.
extern void ft9xx_usbd_pm_ISR(uint16_t pmcfg); // Interrupt handler for USB device power management
#endif
#ifdef BOARD_GPIO_REMOTE_WAKEUP
void gpio_ISR(void);
#endif
void timer_ISR(void);
volatile unsigned int timer_ms = 0;
void board_pm_ISR(void);
#define WELCOME_MSG "\x1B[2J\x1B[H" \
"MM900EVxB board\r\n"
// Initialize on-board peripherals : led, button, uart and USB
void board_init(void)
{
sys_reset_all();
// Enable the UART Device.
sys_enable(sys_device_uart0);
// Set BOARD_UART GPIO function pins for TXD and RXD.
#ifdef BOARD_GPIO_UART_TX
gpio_function(BOARD_GPIO_UART_TX, pad_uart0_txd); /* UART0 TXD */
#endif
#ifdef BOARD_GPIO_UART_RX
gpio_function(BOARD_GPIO_UART_RX, pad_uart0_rxd); /* UART0 RXD */
#endif
uart_open(BOARD_UART, /* Device */
1, /* Prescaler = 1 */
UART_DIVIDER_19200_BAUD, /* Divider = 1302 */
uart_data_bits_8, /* No. Data Bits */
uart_parity_none, /* Parity */
uart_stop_bits_1); /* No. Stop Bits */
// Print out a welcome message.
// Use sizeof to avoid pulling in strlen unnecessarily.
board_uart_write(WELCOME_MSG, sizeof(WELCOME_MSG));
#ifdef BOARD_GPIO_LED
gpio_function(BOARD_GPIO_LED, pad_func_0);
gpio_idrive(BOARD_GPIO_LED, pad_drive_12mA);
gpio_dir(BOARD_GPIO_LED, pad_dir_output);
#endif
#ifdef BOARD_GPIO_BUTTON
gpio_function(BOARD_GPIO_BUTTON, pad_func_0);
// Pull up if active low. Down if active high.
gpio_pull(BOARD_GPIO_BUTTON, (BOARD_GPIO_BUTTON_STATE_ACTIVE == 0)?pad_pull_pullup:pad_pull_pulldown);
gpio_dir(BOARD_GPIO_BUTTON, pad_dir_input);
#endif
sys_enable(sys_device_timer_wdt);
/* Timer A = 1ms */
timer_prescaler(timer_select_a, 1000);
timer_init(timer_select_a, 100, timer_direction_down, timer_prescaler_select_on, timer_mode_continuous);
timer_enable_interrupt(timer_select_a);
timer_start(timer_select_a);
interrupt_attach(interrupt_timers, (int8_t)interrupt_timers, timer_ISR);
// Setup VBUS detect GPIO. If the device is connected then this
// will set the MASK_SYS_PMCFG_DEV_DETECT_EN bit in PMCFG.
gpio_interrupt_disable(BOARD_USBD_VBUS_DTC_PIN);
gpio_function(BOARD_USBD_VBUS_DTC_PIN, pad_vbus_dtc);
gpio_pull(BOARD_USBD_VBUS_DTC_PIN, pad_pull_pulldown);
gpio_dir(BOARD_USBD_VBUS_DTC_PIN, pad_dir_input);
interrupt_attach(interrupt_0, (int8_t)interrupt_0, board_pm_ISR);
#ifdef BOARD_GPIO_REMOTE_WAKEUP
// Configuring GPIO pin to wakeup.
// Set up the wakeup pin.
gpio_dir(BOARD_GPIO_REMOTE_WAKEUP, pad_dir_input);
gpio_pull(BOARD_GPIO_REMOTE_WAKEUP, pad_pull_pullup);
// Attach an interrupt handler.
interrupt_attach(interrupt_gpio, (uint8_t)interrupt_gpio, gpio_ISR);
gpio_interrupt_enable(BOARD_GPIO_REMOTE_WAKEUP, gpio_int_edge_falling);
#endif
uart_disable_interrupt(BOARD_UART, uart_interrupt_tx);
uart_disable_interrupt(BOARD_UART, uart_interrupt_rx);
// Enable all peripheral interrupts.
interrupt_enable_globally();
TU_LOG1("MM900EV1B board setup complete\r\n");
};
void timer_ISR(void)
{
if (timer_is_interrupted(timer_select_a))
{
timer_ms++;
}
}
#ifdef BOARD_GPIO_REMOTE_WAKEUP
void gpio_ISR(void)
{
if (gpio_is_interrupted(BOARD_GPIO_REMOTE_WAKEUP))
{
}
}
#endif
/* Power management ISR */
void board_pm_ISR(void)
{
uint16_t pmcfg = SYS->PMCFG_H;
#if defined(__FT930__)
if (pmcfg & MASK_SYS_PMCFG_SLAVE_PERI_IRQ_PEND)
{
// Clear d2xx hw engine wakeup.
SYS->PMCFG_H = MASK_SYS_PMCFG_SLAVE_PERI_IRQ_PEND;
}
#endif
if (pmcfg & MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND)
{
// Clear GPIO wakeup pending.
SYS->PMCFG_H = MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND;
}
#if defined(__FT900__)
// USB device power management interrupts.
if (pmcfg & (MASK_SYS_PMCFG_DEV_CONN_DEV |
MASK_SYS_PMCFG_DEV_DIS_DEV |
MASK_SYS_PMCFG_HOST_RST_DEV |
MASK_SYS_PMCFG_HOST_RESUME_DEV)
)
{
#if CFG_TUD_ENABLED
ft9xx_usbd_pm_ISR(pmcfg);
#endif
}
#endif
}
#if CFG_TUD_ENABLED
int8_t board_ft9xx_vbus(void)
{
return gpio_read(BOARD_USBD_VBUS_DTC_PIN);
}
#endif
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
// Turn LED on or off
void board_led_write(bool state)
{
#ifdef BOARD_GPIO_LED
gpio_write(BOARD_GPIO_LED, (state == 0)?(BOARD_GPIO_LED_STATE_ON?0:1):BOARD_GPIO_LED_STATE_ON);
#endif
}
// Get the current state of button
// a '1' means active (pressed), a '0' means inactive.
uint32_t board_button_read(void)
{
uint32_t state = 0;
#ifdef BOARD_GPIO_BUTTON
state = (gpio_read(BOARD_GPIO_BUTTON) == BOARD_GPIO_BUTTON_STATE_ACTIVE)?1:0;
#endif
return state;
}
// Get characters from UART
int board_uart_read(uint8_t *buf, int len)
{
int r = 0;
#ifdef BOARD_UART
if (uart_rx_has_data(BOARD_UART))
{
r = uart_readn(BOARD_UART, (uint8_t *)buf, len);
}
#endif
return r;
}
// Send characters to UART
int board_uart_write(void const *buf, int len)
{
int r = 0;
#ifdef BOARD_UART
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wcast-qual" // uart_writen does not have const for buffer parameter.
r = uart_writen(BOARD_UART, (uint8_t *)((const void *)buf), len);
#pragma GCC diagnostic pop
#endif
return r;
}
// Get current milliseconds
uint32_t board_millis(void)
{
uint32_t safe_ms;
CRITICAL_SECTION_BEGIN
safe_ms = timer_ms;
CRITICAL_SECTION_END
return safe_ms;
}
// Restart the program
// Called in the event of a watchdog timeout
void chip_reboot(void)
{
// SOFT reset
__asm__("call 0");
#if 0
// HARD reset
// Initiates data transfer from Flash Memory to Data Memory (DBG_CMDF2D3)
// followed by a system reboot
dbg_memory_copy(0xfe, 0, 0, 255);
#endif
}

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# GCC prefix for FT90X compile tools.
CROSS_COMPILE = ft32-elf-
SKIP_NANOLIB = 1
# Set to use FT90X prebuilt libraries.
FT9XX_PREBUILT_LIBS = 0
ifeq ($(FT9XX_PREBUILT_LIBS),1)
# If the FT90X toolchain is installed on Windows systems then the SDK
# include files and prebuilt libraries are at: %FT90X_TOOLCHAIN%/hardware
FT9XX_SDK = $(FT90X_TOOLCHAIN)/hardware
INC += "$(FT9XX_SDK)/include"
else
# The submodule BRTSG-FOSS/ft90x-sdk contains header files and source
# code for the Bridgetek SDK. This can be used instead of the prebuilt
# library.
DEPS_SUBMODULES += hw/mcu/bridgetek/ft9xx/ft90x-sdk
# The SDK can be used to load specific files from the Bridgetek SDK.
FT9XX_SDK = hw/mcu/bridgetek/ft9xx/ft90x-sdk/Source
INC += "$(TOP)/$(FT9XX_SDK)/include"
endif
# Add include files which are within the TinyUSB directory structure.
INC += \
$(TOP)/$(BOARD_PATH)
# Add required C Compiler flags for FT90X.
CFLAGS += \
-D__FT900__ \
-fvar-tracking \
-fvar-tracking-assignments \
-fmessage-length=0 \
-ffunction-sections \
-DCFG_TUSB_MCU=OPT_MCU_FT90X
# Maximum USB device speed supported by the board
CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
# lwip/src/core/raw.c:334:43: error: declaration of 'recv' shadows a global declaration
CFLAGS += -Wno-error=shadow
# Set Linker flags.
LD_FILE = hw/mcu/bridgetek/ft9xx/scripts/ldscript.ld
LDFLAGS += $(addprefix -L,$(LDINC)) \
-Xlinker --entry=_start \
-Wl,-lc
# Additional Source files for FT90X.
SRC_C += src/portable/bridgetek/ft9xx/dcd_ft9xx.c
# Linker library.
ifneq ($(FT9XX_PREBUILT_LIBS),1)
# Optionally add in files from the Bridgetek SDK instead of the prebuilt
# library. These are the minimum required.
SRC_C += $(FT9XX_SDK)/src/sys.c
SRC_C += $(FT9XX_SDK)/src/interrupt.c
SRC_C += $(FT9XX_SDK)/src/delay.c
SRC_C += $(FT9XX_SDK)/src/timers.c
SRC_C += $(FT9XX_SDK)/src/uart_simple.c
SRC_C += $(FT9XX_SDK)/src/gpio.c
else
# Or if using the prebuilt libraries add them.
LDFLAGS += -L"$(FT9XX_SDK)/lib"
LIBS += -lft900
endif
# Not required crt0 file for FT90X. Use compiler built-in file.
#SRC_S += hw/mcu/bridgetek/ft9xx/scripts/crt0.S

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/*
* The MIT License (MIT)
*
* Copyright (c) 2023 Ha Thach (tinyusb.org) for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
// LED: need to wire pin LED1 to PC0 in the J3 header
#define LED_PORT GPIOC
#define LED_PIN GPIO_Pin_0
#define LED_STATE_ON 0
#define LED_CLOCK_EN() RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE)
// Button: need to wire pin KEY to PC1 in the J3 header
#define BUTTON_PORT GPIOC
#define BUTTON_PIN GPIO_Pin_1
#define BUTTON_STATE_ACTIVE 0
#define BUTTON_CLOCK_EN() do { } while(0) // same as LED clock, no need to do anything
// TODO UART port
#ifdef __cplusplus
}
#endif
#endif

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LD_FILE = $(FAMILY_PATH)/ch32v307.ld

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/*
* The MIT License (MIT)
*
* Copyright (c) 2022 Greg Davill
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "debug_uart.h"
#include <ch32v30x.h>
#define UART_RINGBUFFER_SIZE_TX 64
#define UART_RINGBUFFER_MASK_TX (UART_RINGBUFFER_SIZE_TX-1)
static char tx_buf[UART_RINGBUFFER_SIZE_TX];
static unsigned int tx_produce;
static volatile unsigned int tx_consume;
void USART1_IRQHandler(void) __attribute__((naked));
void USART1_IRQHandler(void) {
__asm volatile ("call USART1_IRQHandler_impl; mret");
}
__attribute__((used)) void USART1_IRQHandler_impl(void)
{
if(USART_GetITStatus(USART1, USART_IT_TC) != RESET)
{
USART_ClearITPendingBit(USART1, USART_IT_TC);
if(tx_consume != tx_produce) {
USART_SendData(USART1, tx_buf[tx_consume]);
tx_consume = (tx_consume + 1) & UART_RINGBUFFER_MASK_TX;
}
}
}
void uart_write(char c)
{
unsigned int tx_produce_next = (tx_produce + 1) & UART_RINGBUFFER_MASK_TX;
NVIC_DisableIRQ(USART1_IRQn);
if((tx_consume != tx_produce) || (USART_GetFlagStatus(USART1, USART_FLAG_TXE) == RESET)) {
tx_buf[tx_produce] = c;
tx_produce = tx_produce_next;
} else {
USART_SendData(USART1, c);
}
NVIC_EnableIRQ(USART1_IRQn);
}
void uart_sync(void)
{
while(tx_consume != tx_produce);
}
void usart_printf_init(uint32_t baudrate)
{
GPIO_InitTypeDef GPIO_InitStructure;
USART_InitTypeDef USART_InitStructure;
tx_produce = 0;
tx_consume = 0;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOA, &GPIO_InitStructure);
USART_InitStructure.USART_BaudRate = baudrate;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Tx;
USART_Init(USART1, &USART_InitStructure);
USART_ITConfig(USART1, USART_IT_TC, ENABLE);
USART_Cmd(USART1, ENABLE);
NVIC_InitTypeDef NVIC_InitStructure = { 0 };
NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}

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@ -0,0 +1,31 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2022 Greg Davill
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include <stdint.h>
void uart_write(char c);
void uart_sync(void);
void usart_printf_init(uint32_t baudrate);

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@ -0,0 +1,170 @@
ENTRY( _start )
__stack_size = 4096;
PROVIDE( _stack_size = __stack_size );
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 288K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
}
SECTIONS
{
.init :
{
_sinit = .;
. = ALIGN(4);
KEEP(*(SORT_NONE(.init)))
. = ALIGN(4);
_einit = .;
} >FLASH AT>FLASH
.vector :
{
*(.vector);
. = ALIGN(64);
} >FLASH AT>FLASH
.text :
{
. = ALIGN(4);
*(.text)
*(.text.*)
*(.rodata)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.gnu.linkonce.t.*)
. = ALIGN(4);
} >FLASH AT>FLASH
.fini :
{
KEEP(*(SORT_NONE(.fini)))
. = ALIGN(4);
} >FLASH AT>FLASH
PROVIDE( _etext = . );
PROVIDE( _eitcm = . );
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH AT>FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH AT>FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH AT>FLASH
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*crtbegin?.o(.ctors))
/* We don't want to include the .ctor section from
the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >FLASH AT>FLASH
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >FLASH AT>FLASH
.dalign :
{
. = ALIGN(4);
PROVIDE(_data_vma = .);
} >RAM AT>FLASH
.dlalign :
{
. = ALIGN(4);
PROVIDE(_data_lma = .);
} >FLASH AT>FLASH
.data :
{
*(.gnu.linkonce.r.*)
*(.data .data.*)
*(.gnu.linkonce.d.*)
. = ALIGN(8);
PROVIDE( __global_pointer$ = . + 0x800 );
*(.sdata .sdata.*)
*(.sdata2.*)
*(.gnu.linkonce.s.*)
. = ALIGN(8);
*(.srodata.cst16)
*(.srodata.cst8)
*(.srodata.cst4)
*(.srodata.cst2)
*(.srodata .srodata.*)
. = ALIGN(4);
PROVIDE( _edata = .);
} >RAM AT>FLASH
.bss :
{
. = ALIGN(4);
PROVIDE( _sbss = .);
*(.sbss*)
*(.gnu.linkonce.sb.*)
*(.bss*)
*(.gnu.linkonce.b.*)
*(COMMON*)
. = ALIGN(4);
PROVIDE( _ebss = .);
} >RAM AT>FLASH
PROVIDE( _end = _ebss);
PROVIDE( end = . );
.stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
{
PROVIDE( _heap_end = . );
. = ALIGN(4);
PROVIDE(_susrstack = . );
. = . + __stack_size;
PROVIDE( _eusrstack = .);
__freertos_irq_stack_top = .;
} >RAM
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v30x_conf.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : Library configuration file.
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* SPDX-License-Identifier: Apache-2.0
*******************************************************************************/
#ifndef __CH32V30x_CONF_H
#define __CH32V30x_CONF_H
#include "ch32v30x_adc.h"
#include "ch32v30x_bkp.h"
#include "ch32v30x_can.h"
#include "ch32v30x_crc.h"
#include "ch32v30x_dac.h"
#include "ch32v30x_dbgmcu.h"
#include "ch32v30x_dma.h"
#include "ch32v30x_exti.h"
#include "ch32v30x_flash.h"
#include "ch32v30x_fsmc.h"
#include "ch32v30x_gpio.h"
#include "ch32v30x_i2c.h"
#include "ch32v30x_iwdg.h"
#include "ch32v30x_pwr.h"
#include "ch32v30x_rcc.h"
#include "ch32v30x_rtc.h"
#include "ch32v30x_sdio.h"
#include "ch32v30x_spi.h"
#include "ch32v30x_tim.h"
#include "ch32v30x_usart.h"
#include "ch32v30x_wwdg.h"
#include "ch32v30x_it.h"
#include "ch32v30x_misc.h"
#endif /* __CH32V30x_CONF_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v30x_it.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : Main Interrupt Service Routines.
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* SPDX-License-Identifier: Apache-2.0
*******************************************************************************/
#include "ch32v30x_it.h"
void NMI_Handler(void) __attribute__((naked));
void HardFault_Handler(void) __attribute__((naked));
/*********************************************************************
* @fn NMI_Handler
*
* @brief This function handles NMI exception.
*
* @return none
*/
void NMI_Handle(void){
__asm volatile ("call NMI_Handler_impl; mret");
}
__attribute__((used)) void NMI_Handler_impl(void)
{
}
/*********************************************************************
* @fn HardFault_Handler
*
* @brief This function handles Hard Fault exception.
*
* @return none
*/
void HardFault_Handler(void){
__asm volatile ("call HardFault_Handler_impl; mret");
}
__attribute__((used)) void HardFault_Handler_impl(void)
{
while (1)
{
}
}

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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v30x_it.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : This file contains the headers of the interrupt handlers.
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* SPDX-License-Identifier: Apache-2.0
*******************************************************************************/
#ifndef __CH32V30x_IT_H
#define __CH32V30x_IT_H
// #include "debug.h"
#endif /* __CH32V30x_IT_H */

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/********************************** (C) COPYRIGHT *******************************
* File Name : core_riscv.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : RISC-V Core Peripheral Access Layer Header File for CH32V30x
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* SPDX-License-Identifier: Apache-2.0
*******************************************************************************/
#ifndef __CORE_RISCV_H__
#define __CORE_RISCV_H__
/* IO definitions */
#ifdef __cplusplus
#define __I volatile /* defines 'read only' permissions */
#else
#define __I volatile const /* defines 'read only' permissions */
#endif
#define __O volatile /* defines 'write only' permissions */
#define __IO volatile /* defines 'read / write' permissions */
/* Standard Peripheral Library old types (maintained for legacy purpose) */
typedef __I uint64_t vuc64; /* Read Only */
typedef __I uint32_t vuc32; /* Read Only */
typedef __I uint16_t vuc16; /* Read Only */
typedef __I uint8_t vuc8; /* Read Only */
typedef const uint64_t uc64; /* Read Only */
typedef const uint32_t uc32; /* Read Only */
typedef const uint16_t uc16; /* Read Only */
typedef const uint8_t uc8; /* Read Only */
typedef __I int64_t vsc64; /* Read Only */
typedef __I int32_t vsc32; /* Read Only */
typedef __I int16_t vsc16; /* Read Only */
typedef __I int8_t vsc8; /* Read Only */
typedef const int64_t sc64; /* Read Only */
typedef const int32_t sc32; /* Read Only */
typedef const int16_t sc16; /* Read Only */
typedef const int8_t sc8; /* Read Only */
typedef __IO uint64_t vu64;
typedef __IO uint32_t vu32;
typedef __IO uint16_t vu16;
typedef __IO uint8_t vu8;
typedef uint64_t u64;
typedef uint32_t u32;
typedef uint16_t u16;
typedef uint8_t u8;
typedef __IO int64_t vs64;
typedef __IO int32_t vs32;
typedef __IO int16_t vs16;
typedef __IO int8_t vs8;
typedef int64_t s64;
typedef int32_t s32;
typedef int16_t s16;
typedef int8_t s8;
typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;
typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus;
#define RV_STATIC_INLINE static inline
/* memory mapped structure for Program Fast Interrupt Controller (PFIC) */
typedef struct{
__I uint32_t ISR[8];
__I uint32_t IPR[8];
__IO uint32_t ITHRESDR;
__IO uint32_t RESERVED;
__IO uint32_t CFGR;
__I uint32_t GISR;
uint8_t VTFIDR[4];
uint8_t RESERVED0[12];
__IO uint32_t VTFADDR[4];
uint8_t RESERVED1[0x90];
__O uint32_t IENR[8];
uint8_t RESERVED2[0x60];
__O uint32_t IRER[8];
uint8_t RESERVED3[0x60];
__O uint32_t IPSR[8];
uint8_t RESERVED4[0x60];
__O uint32_t IPRR[8];
uint8_t RESERVED5[0x60];
__IO uint32_t IACTR[8];
uint8_t RESERVED6[0xE0];
__IO uint8_t IPRIOR[256];
uint8_t RESERVED7[0x810];
__IO uint32_t SCTLR;
}PFIC_Type;
/* memory mapped structure for SysTick */
typedef struct
{
__IO u32 CTLR;
__IO u32 SR;
__IO u64 CNT;
__IO u64 CMP;
}SysTick_Type;
#define PFIC ((PFIC_Type *) 0xE000E000 )
#define NVIC PFIC
#define NVIC_KEY1 ((uint32_t)0xFA050000)
#define NVIC_KEY2 ((uint32_t)0xBCAF0000)
#define NVIC_KEY3 ((uint32_t)0xBEEF0000)
#define SysTick ((SysTick_Type *) 0xE000F000)
/*********************************************************************
* @fn __enable_irq
*
* @brief Enable Global Interrupt
*
* @return none
*/
RV_STATIC_INLINE void __enable_irq(void)
{
__asm volatile ("csrw 0x800, %0" : : "r" (0x6088) );
}
/*********************************************************************
* @fn __disable_irq
*
* @brief Disable Global Interrupt
*
* @return none
*/
RV_STATIC_INLINE void __disable_irq(void)
{
__asm volatile ("csrw 0x800, %0" : : "r" (0x6000) );
}
/*********************************************************************
* @fn __NOP
*
* @brief nop
*
* @return none
*/
RV_STATIC_INLINE void __NOP(void)
{
__asm volatile ("nop");
}
/*********************************************************************
* @fn NVIC_EnableIRQ
*
* @brief Enable Interrupt
*
* @param IRQn: Interrupt Numbers
*
* @return none
*/
RV_STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
{
NVIC->IENR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
/*********************************************************************
* @fn NVIC_DisableIRQ
*
* @brief Disable Interrupt
*
* @param IRQn: Interrupt Numbers
*
* @return none
*/
RV_STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
{
NVIC->IRER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
/*********************************************************************
* @fn NVIC_GetStatusIRQ
*
* @brief Get Interrupt Enable State
*
* @param IRQn: Interrupt Numbers
*
* @return 1 - Interrupt Enable
* 0 - Interrupt Disable
*/
RV_STATIC_INLINE uint32_t NVIC_GetStatusIRQ(IRQn_Type IRQn)
{
return((uint32_t) ((NVIC->ISR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
}
/*********************************************************************
* @fn NVIC_GetPendingIRQ
*
* @brief Get Interrupt Pending State
*
* @param IRQn: Interrupt Numbers
*
* @return 1 - Interrupt Pending Enable
* 0 - Interrupt Pending Disable
*/
RV_STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
return((uint32_t) ((NVIC->IPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
}
/*********************************************************************
* @fn NVIC_SetPendingIRQ
*
* @brief Set Interrupt Pending
*
* @param IRQn: Interrupt Numbers
*
* @return None
*/
RV_STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
NVIC->IPSR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
/*********************************************************************
* @fn NVIC_ClearPendingIRQ
*
* @brief Clear Interrupt Pending
*
* @param IRQn: Interrupt Numbers
*
* @return None
*/
RV_STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
NVIC->IPRR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
/*********************************************************************
* @fn NVIC_GetActive
*
* @brief Get Interrupt Active State
*
* @param IRQn: Interrupt Numbers
*
* @return 1 - Interrupt Active
* 0 - Interrupt No Active
*/
RV_STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
{
return((uint32_t)((NVIC->IACTR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
}
/*********************************************************************
* @fn NVIC_SetPriority
*
* @brief Set Interrupt Priority
*
* @param IRQn - Interrupt Numbers
* priority -
* bit7 - pre-emption priority
* bit6~bit4 - subpriority
* @return None
*/
RV_STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint8_t priority)
{
NVIC->IPRIOR[(uint32_t)(IRQn)] = priority;
}
/*********************************************************************
* @fn __WFI
*
* @brief Wait for Interrupt
*
* @return None
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __WFI(void)
{
NVIC->SCTLR &= ~(1<<3); // wfi
asm volatile ("wfi");
}
/*********************************************************************
* @fn __WFE
*
* @brief Wait for Events
*
* @return None
*/
__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __WFE(void)
{
uint32_t t;
t = NVIC->SCTLR;
NVIC->SCTLR |= (1<<3)|(1<<5); // (wfi->wfe)+(__sev)
NVIC->SCTLR = (NVIC->SCTLR & ~(1<<5)) | ( t & (1<<5));
asm volatile ("wfi");
asm volatile ("wfi");
}
/*********************************************************************
* @fn SetVTFIRQ
*
* @brief Set VTF Interrupt
*
* @param add - VTF interrupt service function base address.
* IRQn -Interrupt Numbers
* num - VTF Interrupt Numbers
* NewState - DISABLE or ENABLE
* @return None
*/
RV_STATIC_INLINE void SetVTFIRQ(uint32_t addr, IRQn_Type IRQn, uint8_t num, FunctionalState NewState){
if(num > 3) return ;
if (NewState != DISABLE)
{
NVIC->VTFIDR[num] = IRQn;
NVIC->VTFADDR[num] = ((addr&0xFFFFFFFE)|0x1);
}
else{
NVIC->VTFIDR[num] = IRQn;
NVIC->VTFADDR[num] = ((addr&0xFFFFFFFE)&(~0x1));
}
}
/*********************************************************************
* @fn NVIC_SystemReset
*
* @brief Initiate a system reset request
*
* @return None
*/
RV_STATIC_INLINE void NVIC_SystemReset(void)
{
NVIC->CFGR = NVIC_KEY3|(1<<7);
}
/* Core_Exported_Functions */
extern uint32_t __get_FFLAGS(void);
extern void __set_FFLAGS(uint32_t value);
extern uint32_t __get_FRM(void);
extern void __set_FRM(uint32_t value);
extern uint32_t __get_FCSR(void);
extern void __set_FCSR(uint32_t value);
extern uint32_t __get_MSTATUS(void);
extern void __set_MSTATUS(uint32_t value);
extern uint32_t __get_MISA(void);
extern void __set_MISA(uint32_t value);
extern uint32_t __get_MIE(void);
extern void __set_MIE(uint32_t value);
extern uint32_t __get_MTVEC(void);
extern void __set_MTVEC(uint32_t value);
extern uint32_t __get_MSCRATCH(void);
extern void __set_MSCRATCH(uint32_t value);
extern uint32_t __get_MEPC(void);
extern void __set_MEPC(uint32_t value);
extern uint32_t __get_MCAUSE(void);
extern void __set_MCAUSE(uint32_t value);
extern uint32_t __get_MTVAL(void);
extern void __set_MTVAL(uint32_t value);
extern uint32_t __get_MIP(void);
extern void __set_MIP(uint32_t value);
extern uint32_t __get_MCYCLE(void);
extern void __set_MCYCLE(uint32_t value);
extern uint32_t __get_MCYCLEH(void);
extern void __set_MCYCLEH(uint32_t value);
extern uint32_t __get_MINSTRET(void);
extern void __set_MINSTRET(uint32_t value);
extern uint32_t __get_MINSTRETH(void);
extern void __set_MINSTRETH(uint32_t value);
extern uint32_t __get_MVENDORID(void);
extern uint32_t __get_MARCHID(void);
extern uint32_t __get_MIMPID(void);
extern uint32_t __get_MHARTID(void);
extern uint32_t __get_SP(void);
#endif

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/*
* The MIT License (MIT)
*
* Copyright (c) 2022 Greg Davill
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "stdio.h"
#include "debug_uart.h"
#include "ch32v30x.h"
#include "bsp/board.h"
#include "board.h"
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USBHS_IRQHandler (void) __attribute__((naked));
void USBHS_IRQHandler (void)
{
__asm volatile ("call USBHS_IRQHandler_impl; mret");
}
__attribute__ ((used)) void USBHS_IRQHandler_impl (void)
{
tud_int_handler(0);
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
uint32_t SysTick_Config(uint32_t ticks)
{
NVIC_EnableIRQ(SysTicK_IRQn);
SysTick->CTLR=0;
SysTick->SR=0;
SysTick->CNT=0;
SysTick->CMP=ticks-1;
SysTick->CTLR=0xF;
return 0;
}
void board_init(void) {
/* Disable interrupts during init */
__disable_irq();
#if CFG_TUSB_OS == OPT_OS_NONE
SysTick_Config(SystemCoreClock / 1000);
#endif
usart_printf_init(115200);
RCC_USBCLK48MConfig(RCC_USBCLK48MCLKSource_USBPHY);
RCC_USBHSPLLCLKConfig(RCC_HSBHSPLLCLKSource_HSE);
RCC_USBHSConfig(RCC_USBPLL_Div2);
RCC_USBHSPLLCKREFCLKConfig(RCC_USBHSPLLCKREFCLK_4M);
RCC_USBHSPHYPLLALIVEcmd(ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_USBHS, ENABLE);
GPIO_InitTypeDef GPIO_InitStructure = {0};
// LED
LED_CLOCK_EN();
GPIO_InitStructure.GPIO_Pin = LED_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(LED_PORT, &GPIO_InitStructure);
// Button
BUTTON_CLOCK_EN();
GPIO_InitStructure.GPIO_Pin = BUTTON_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(BUTTON_PORT, &GPIO_InitStructure);
/* Enable interrupts globally */
__enable_irq();
board_delay(2);
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
/* Small workaround to support HW stack save/restore */
void SysTick_Handler (void) __attribute__((naked));
void SysTick_Handler (void)
{
__asm volatile ("call SysTick_Handler_impl; mret");
}
__attribute__((used)) void SysTick_Handler_impl (void)
{
SysTick->SR = 0;
system_ticks++;
}
uint32_t board_millis (void)
{
return system_ticks;
}
#endif
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write (bool state)
{
GPIO_WriteBit(LED_PORT, LED_PIN, state);
}
uint32_t board_button_read (void)
{
return BUTTON_STATE_ACTIVE == GPIO_ReadInputDataBit(BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read (uint8_t *buf, int len)
{
(void) buf;
(void) len;
return 0;
}
int board_uart_write (void const *buf, int len)
{
int txsize = len;
while ( txsize-- )
{
uart_write(*(uint8_t const*) buf);
buf++;
}
return len;
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(char* file, uint32_t line) {
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line
number,
tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line)
*/
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */

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# https://www.embecosm.com/resources/tool-chain-downloads/#riscv-stable
#CROSS_COMPILE ?= riscv32-unknown-elf-
# Toolchain from https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack
CROSS_COMPILE ?= riscv-none-embed-
# Submodules
CH32V307_SDK = hw/mcu/wch/ch32v307
DEPS_SUBMODULES += $(CH32V307_SDK)
# WCH-SDK paths
CH32V307_SDK_SRC = $(CH32V307_SDK)/EVT/EXAM/SRC
include $(TOP)/$(BOARD_PATH)/board.mk
CFLAGS += \
-flto \
-march=rv32imac \
-mabi=ilp32 \
-msmall-data-limit=8 \
-mno-save-restore -Os \
-fmessage-length=0 \
-fsigned-char \
-ffunction-sections \
-fdata-sections \
-nostdlib -nostartfiles \
-DCFG_TUSB_MCU=OPT_MCU_CH32V307 \
-Xlinker --gc-sections \
-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
SRC_C += \
src/portable/wch/ch32v307/dcd_usbhs.c \
$(CH32V307_SDK_SRC)/Core/core_riscv.c \
$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_gpio.c \
$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_misc.c \
$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_rcc.c \
$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_usart.c
SRC_S += \
$(CH32V307_SDK_SRC)/Startup/startup_ch32v30x_D8C.S
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/$(CH32V307_SDK_SRC)/Peripheral/inc
# For freeRTOS port source
FREERTOS_PORT = RISC-V
# wch-link is not supported yet in official openOCD yet. We need to either use
# 1. download openocd as part of mounriver studio http://www.mounriver.com/download or
# 2. compiled from modified source https://github.com/kprasadvnsi/riscv-openocd-wch
#
# Note: For Linux, somehow openocd in mounriver studio does not seem to have wch-link enable,
# therefore we need to compile it from source as follows:
# git clone https://github.com/kprasadvnsi/riscv-openocd-wch
# cd riscv-openocd-wch
# ./bootstrap
# ./configure CFLAGS="-Wno-error" --enable-wlink
# make
# openocd binaries will be generated in riscv-openocd-wch/src
# flash target ROM bootloader
flash: $(BUILD)/$(PROJECT).elf
openocd -f $(TOP)/$(FAMILY_PATH)/wch-riscv.cfg -c init -c halt -c "program $<" -c wlink_reset_resume -c exit

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/********************************** (C) COPYRIGHT *******************************
* File Name : system_ch32v30x.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V30x Device Peripheral Access Layer System Source File.
* For HSE = 8Mhz
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* SPDX-License-Identifier: Apache-2.0
*********************************************************************************/
#include "ch32v30x.h"
/*
* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after
* reset the HSI is used as SYSCLK source).
* If none of the define below is enabled, the HSI is used as System clock source.
*/
// #define SYSCLK_FREQ_HSE HSE_VALUE
/* #define SYSCLK_FREQ_24MHz 24000000 */
//#define SYSCLK_FREQ_48MHz 48000000
/* #define SYSCLK_FREQ_56MHz 56000000 */
//#define SYSCLK_FREQ_72MHz 72000000
//#define SYSCLK_FREQ_96MHz 96000000
//#define SYSCLK_FREQ_120MHz 120000000
#define SYSCLK_FREQ_144MHz 144000000
/* Clock Definitions */
#ifdef SYSCLK_FREQ_HSE
uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_24MHz
uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_48MHz
uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_56MHz
uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_72MHz
uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_96MHz
uint32_t SystemCoreClock = SYSCLK_FREQ_96MHz; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_120MHz
uint32_t SystemCoreClock = SYSCLK_FREQ_120MHz; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_144MHz
uint32_t SystemCoreClock = SYSCLK_FREQ_144MHz; /* System Clock Frequency (Core Clock) */
#else /* HSI Selected as System Clock source */
uint32_t SystemCoreClock = HSI_VALUE; /* System Clock Frequency (Core Clock) */
#endif
__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
/* system_private_function_proto_types */
static void SetSysClock(void);
#ifdef SYSCLK_FREQ_HSE
static void SetSysClockToHSE(void);
#elif defined SYSCLK_FREQ_24MHz
static void SetSysClockTo24(void);
#elif defined SYSCLK_FREQ_48MHz
static void SetSysClockTo48(void);
#elif defined SYSCLK_FREQ_56MHz
static void SetSysClockTo56(void);
#elif defined SYSCLK_FREQ_72MHz
static void SetSysClockTo72(void);
#elif defined SYSCLK_FREQ_96MHz
static void SetSysClockTo96(void);
#elif defined SYSCLK_FREQ_120MHz
static void SetSysClockTo120(void);
#elif defined SYSCLK_FREQ_144MHz
static void SetSysClockTo144(void);
#endif
/*********************************************************************
* @fn SystemInit
*
* @brief Setup the microcontroller system Initialize the Embedded Flash Interface,
* the PLL and update the SystemCoreClock variable.
*
* @return none
*/
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
#ifdef CH32V30x_D8C
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
#else
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
#endif
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
#ifdef CH32V30x_D8C
RCC->CTLR &= (uint32_t)0xEBFFFFFF;
RCC->INTR = 0x00FF0000;
RCC->CFGR2 = 0x00000000;
#else
RCC->INTR = 0x009F0000;
#endif
SetSysClock();
}
/*********************************************************************
* @fn SystemCoreClockUpdate
*
* @brief Update SystemCoreClock variable according to Clock Register Values.
*
* @return none
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0, pllmull = 0, pllsource = 0, Pll_6_5 = 0;
tmp = RCC->CFGR0 & RCC_SWS;
switch (tmp)
{
case 0x00:
SystemCoreClock = HSI_VALUE;
break;
case 0x04:
SystemCoreClock = HSE_VALUE;
break;
case 0x08:
pllmull = RCC->CFGR0 & RCC_PLLMULL;
pllsource = RCC->CFGR0 & RCC_PLLSRC;
pllmull = ( pllmull >> 18) + 2;
#ifdef CH32V30x_D8
if(pllmull == 17) pllmull = 18;
#else
if(pllmull == 2) pllmull = 18;
if(pllmull == 15){
pllmull = 13; /* *6.5 */
Pll_6_5 = 1;
}
if(pllmull == 16) pllmull = 15;
if(pllmull == 17) pllmull = 16;
#endif
if (pllsource == 0x00)
{
SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
}
else
{
if ((RCC->CFGR0 & RCC_PLLXTPRE) != (uint32_t)RESET)
{
SystemCoreClock = (HSE_VALUE >> 1) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
}
if(Pll_6_5 == 1) SystemCoreClock = (SystemCoreClock / 2);
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
tmp = AHBPrescTable[((RCC->CFGR0 & RCC_HPRE) >> 4)];
SystemCoreClock >>= tmp;
}
/*********************************************************************
* @fn SetSysClock
*
* @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClock(void)
{
#ifdef SYSCLK_FREQ_HSE
SetSysClockToHSE();
#elif defined SYSCLK_FREQ_24MHz
SetSysClockTo24();
#elif defined SYSCLK_FREQ_48MHz
SetSysClockTo48();
#elif defined SYSCLK_FREQ_56MHz
SetSysClockTo56();
#elif defined SYSCLK_FREQ_72MHz
SetSysClockTo72();
#elif defined SYSCLK_FREQ_96MHz
SetSysClockTo96();
#elif defined SYSCLK_FREQ_120MHz
SetSysClockTo120();
#elif defined SYSCLK_FREQ_144MHz
SetSysClockTo144();
#endif
/* If none of the define above is enabled, the HSI is used as System clock
* source (default after reset)
*/
}
#ifdef SYSCLK_FREQ_HSE
/*********************************************************************
* @fn SetSysClockToHSE
*
* @brief Sets HSE as System clock source and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockToHSE(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV1;
/* Select HSE as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_HSE;
/* Wait till HSE is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x04)
{
}
}
else
{
/* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#elif defined SYSCLK_FREQ_24MHz
/*********************************************************************
* @fn SetSysClockTo24
*
* @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo24(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV1;
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL));
#ifdef CH32V30x_D8
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL3);
#else
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL3_EXTEN);
#endif
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
else
{
/* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#elif defined SYSCLK_FREQ_48MHz
/*********************************************************************
* @fn SetSysClockTo48
*
* @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo48(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* PLL configuration: PLLCLK = HSE * 6 = 48 MHz */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL));
#ifdef CH32V30x_D8
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL6);
#else
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL6_EXTEN);
#endif
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
else
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#elif defined SYSCLK_FREQ_56MHz
/*********************************************************************
* @fn SetSysClockTo56
*
* @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo56(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL));
#ifdef CH32V30x_D8
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL7);
#else
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL7_EXTEN);
#endif
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
else
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#elif defined SYSCLK_FREQ_72MHz
/*********************************************************************
* @fn SetSysClockTo72
*
* @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo72(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE |
RCC_PLLMULL));
#ifdef CH32V30x_D8
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL9);
#else
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL9_EXTEN);
#endif
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
else
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#elif defined SYSCLK_FREQ_96MHz
/*********************************************************************
* @fn SetSysClockTo96
*
* @brief Sets System clock frequency to 96MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo96(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* PLL configuration: PLLCLK = HSE * 12 = 96 MHz */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE |
RCC_PLLMULL));
#ifdef CH32V30x_D8
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL12);
#else
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL12_EXTEN);
#endif
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
else
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#elif defined SYSCLK_FREQ_120MHz
/*********************************************************************
* @fn SetSysClockTo120
*
* @brief Sets System clock frequency to 120MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo120(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* PLL configuration: PLLCLK = HSE * 15 = 120 MHz */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE |
RCC_PLLMULL));
#ifdef CH32V30x_D8
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL15);
#else
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL15_EXTEN);
#endif
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
else
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#elif defined SYSCLK_FREQ_144MHz
/*********************************************************************
* @fn SetSysClockTo144
*
* @brief Sets System clock frequency to 144MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo144(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* PLL configuration: PLLCLK = HSE * 18 = 144 MHz */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE |
RCC_PLLMULL));
#ifdef CH32V30x_D8
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL18);
#else
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL18_EXTEN);
#endif
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
else
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#endif

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/********************************** (C) COPYRIGHT *******************************
* File Name : system_ch32v30x.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V30x Device Peripheral Access Layer System Header File.
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* SPDX-License-Identifier: Apache-2.0
*******************************************************************************/
#ifndef __SYSTEM_CH32V30x_H
#define __SYSTEM_CH32V30x_H
#ifdef __cplusplus
extern "C" {
#endif
extern uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock) */
/* System_Exported_Functions */
extern void SystemInit(void);
extern void SystemCoreClockUpdate(void);
#ifdef __cplusplus
}
#endif
#endif /*__CH32V30x_SYSTEM_H */

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#interface wlink
adapter driver wlink
wlink_set
set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x00001
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0
echo "Ready for Remote Connections"

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DEPS_SUBMODULES += hw/mcu/microchip
HWREV ?= 1
CFLAGS += \
-mthumb \
-mabi=aapcs \
-mlong-calls \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-nostdlib -nostartfiles \
-D__SAME51J19A__ \
-DCONF_CPU_FREQUENCY=80000000 \
-DCONF_GCLK_USB_FREQUENCY=48000000 \
-DCFG_TUSB_MCU=OPT_MCU_SAME5X \
-DD5035_01=1 \
-DBOARD_NAME="\"D5035-01\"" \
-DSVC_Handler=SVCall_Handler \
-DHWREV=$(HWREV)
# suppress warning caused by vendor mcu driver
CFLAGS += -Wno-error=cast-qual
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/same51j19a_flash.ld
SRC_C += \
src/portable/microchip/samd/dcd_samd.c \
hw/mcu/microchip/same51/gcc/gcc/startup_same51.c \
hw/mcu/microchip/same51/gcc/system_same51.c
ifdef SYSCALLS
ifneq ($(SYSCALLS),0)
SRC_C += hw/mcu/microchip/same51/hal/utils/src/utils_syscalls.c
endif
endif
ifdef LOG
ifneq ($(LOG),0)
SRC_C += hw/mcu/microchip/same51/hal/utils/src/utils_syscalls.c
endif
endif
INC += \
$(TOP)/hw/mcu/microchip/same51/ \
$(TOP)/hw/mcu/microchip/same51/config \
$(TOP)/hw/mcu/microchip/same51/include \
$(TOP)/hw/mcu/microchip/same51/hal/include \
$(TOP)/hw/mcu/microchip/same51/hal/utils/include \
$(TOP)/hw/mcu/microchip/same51/hpl/port \
$(TOP)/hw/mcu/microchip/same51/hri \
$(TOP)/hw/mcu/microchip/same51/CMSIS/Include
# For freeRTOS port source
FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = ATSAME51J19
# flash using jlink
flash: flash-jlink

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020 Jean Gressmann <jean@0x42.de>
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
*/
#include <sam.h>
#include "bsp/board.h"
#include <hal/include/hal_gpio.h>
#if CONF_CPU_FREQUENCY != 80000000
# error "CONF_CPU_FREQUENCY" must 80000000
#endif
#if CONF_GCLK_USB_FREQUENCY != 48000000
# error "CONF_GCLK_USB_FREQUENCY" must 48000000
#endif
#if !defined(HWREV)
# error Define "HWREV"
#endif
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_0_Handler (void)
{
tud_int_handler(0);
}
void USB_1_Handler (void)
{
tud_int_handler(0);
}
void USB_2_Handler (void)
{
tud_int_handler(0);
}
void USB_3_Handler (void)
{
tud_int_handler(0);
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
//--------------------------------------------------------------------+
#define LED_PIN PIN_PA02
#if HWREV < 3
# define BOARD_SERCOM SERCOM5
#else
# define BOARD_SERCOM SERCOM0
#endif
static inline void init_clock(void)
{
/* AUTOWS is enabled by default in REG_NVMCTRL_CTRLA - no need to change the number of wait states when changing the core clock */
#if HWREV == 1
/* configure XOSC1 for a 16MHz crystal connected to XIN1/XOUT1 */
OSCCTRL->XOSCCTRL[1].reg =
OSCCTRL_XOSCCTRL_STARTUP(6) | // 1,953 ms
OSCCTRL_XOSCCTRL_RUNSTDBY |
OSCCTRL_XOSCCTRL_ENALC |
OSCCTRL_XOSCCTRL_IMULT(4) |
OSCCTRL_XOSCCTRL_IPTAT(3) |
OSCCTRL_XOSCCTRL_XTALEN |
OSCCTRL_XOSCCTRL_ENABLE;
while(0 == OSCCTRL->STATUS.bit.XOSCRDY1);
OSCCTRL->Dpll[0].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(3) | OSCCTRL_DPLLCTRLB_REFCLK(OSCCTRL_DPLLCTRLB_REFCLK_XOSC1_Val); /* pre-scaler = 8, input = XOSC1 */
OSCCTRL->Dpll[0].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(39); /* multiply by 40 -> 80 MHz */
OSCCTRL->Dpll[0].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
while(0 == OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL0 to be ready */
OSCCTRL->Dpll[1].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(7) | OSCCTRL_DPLLCTRLB_REFCLK(OSCCTRL_DPLLCTRLB_REFCLK_XOSC1_Val); /* pre-scaler = 16, input = XOSC1 */
OSCCTRL->Dpll[1].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(47); /* multiply by 48 -> 48 MHz */
OSCCTRL->Dpll[1].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
while(0 == OSCCTRL->Dpll[1].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL1 to be ready */
#else // HWREV >= 1
/* configure XOSC0 for a 16MHz crystal connected to XIN0/XOUT0 */
OSCCTRL->XOSCCTRL[0].reg =
OSCCTRL_XOSCCTRL_STARTUP(6) | // 1,953 ms
OSCCTRL_XOSCCTRL_RUNSTDBY |
OSCCTRL_XOSCCTRL_ENALC |
OSCCTRL_XOSCCTRL_IMULT(4) |
OSCCTRL_XOSCCTRL_IPTAT(3) |
OSCCTRL_XOSCCTRL_XTALEN |
OSCCTRL_XOSCCTRL_ENABLE;
while(0 == OSCCTRL->STATUS.bit.XOSCRDY0);
OSCCTRL->Dpll[0].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(3) | OSCCTRL_DPLLCTRLB_REFCLK(OSCCTRL_DPLLCTRLB_REFCLK_XOSC0_Val); /* pre-scaler = 8, input = XOSC1 */
OSCCTRL->Dpll[0].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(39); /* multiply by 40 -> 80 MHz */
OSCCTRL->Dpll[0].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
while(0 == OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL0 to be ready */
OSCCTRL->Dpll[1].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(7) | OSCCTRL_DPLLCTRLB_REFCLK(OSCCTRL_DPLLCTRLB_REFCLK_XOSC0_Val); /* pre-scaler = 16, input = XOSC1 */
OSCCTRL->Dpll[1].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(47); /* multiply by 48 -> 48 MHz */
OSCCTRL->Dpll[1].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
while(0 == OSCCTRL->Dpll[1].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL1 to be ready */
#endif // HWREV
/* configure clock-generator 0 to use DPLL0 as source -> GCLK0 is used for the core */
GCLK->GENCTRL[0].reg =
GCLK_GENCTRL_DIV(0) |
GCLK_GENCTRL_RUNSTDBY |
GCLK_GENCTRL_GENEN |
GCLK_GENCTRL_SRC_DPLL0 | /* DPLL0 */
GCLK_GENCTRL_IDC ;
while(1 == GCLK->SYNCBUSY.bit.GENCTRL0); /* wait for the synchronization between clock domains to be complete */
/* configure clock-generator 1 to use DPLL1 as source -> for use with some peripheral */
GCLK->GENCTRL[1].reg =
GCLK_GENCTRL_DIV(0) |
GCLK_GENCTRL_RUNSTDBY |
GCLK_GENCTRL_GENEN |
GCLK_GENCTRL_SRC_DPLL1 |
GCLK_GENCTRL_IDC ;
while(1 == GCLK->SYNCBUSY.bit.GENCTRL1); /* wait for the synchronization between clock domains to be complete */
/* configure clock-generator 2 to use DPLL0 as source -> for use with SERCOM */
GCLK->GENCTRL[2].reg =
GCLK_GENCTRL_DIV(1) | /* 80MHz */
GCLK_GENCTRL_RUNSTDBY |
GCLK_GENCTRL_GENEN |
GCLK_GENCTRL_SRC_DPLL0 |
GCLK_GENCTRL_IDC ;
while(1 == GCLK->SYNCBUSY.bit.GENCTRL2); /* wait for the synchronization between clock domains to be complete */
}
static inline void uart_init(void)
{
#if HWREV < 3
/* configure SERCOM5 on PB02 */
PORT->Group[1].WRCONFIG.reg =
PORT_WRCONFIG_WRPINCFG |
PORT_WRCONFIG_WRPMUX |
PORT_WRCONFIG_PMUX(3) | /* function D */
PORT_WRCONFIG_DRVSTR |
PORT_WRCONFIG_PINMASK(0x0004) | /* PB02 */
PORT_WRCONFIG_PMUXEN;
MCLK->APBDMASK.bit.SERCOM5_ = 1;
GCLK->PCHCTRL[SERCOM5_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK2 | GCLK_PCHCTRL_CHEN; /* setup SERCOM to use GLCK2 -> 80MHz */
SERCOM5->USART.CTRLA.reg = 0x00; /* disable SERCOM -> enable config */
while(SERCOM5->USART.SYNCBUSY.bit.ENABLE);
SERCOM5->USART.CTRLA.reg = /* CMODE = 0 -> async, SAMPA = 0, FORM = 0 -> USART frame, SMPR = 0 -> arithmetic baud rate */
SERCOM_USART_CTRLA_SAMPR(1) | /* 0 = 16x / arithmetic baud rate, 1 = 16x / fractional baud rate */
// SERCOM_USART_CTRLA_FORM(0) | /* 0 = USART Frame, 2 = LIN Master */
SERCOM_USART_CTRLA_DORD | /* LSB first */
SERCOM_USART_CTRLA_MODE(1) | /* 0 = Asynchronous, 1 = USART with internal clock */
SERCOM_USART_CTRLA_RXPO(1) | /* SERCOM PAD[1] is used for data reception */
SERCOM_USART_CTRLA_TXPO(0); /* SERCOM PAD[0] is used for data transmission */
SERCOM5->USART.CTRLB.reg = /* RXEM = 0 -> receiver disabled, LINCMD = 0 -> normal USART transmission, SFDE = 0 -> start-of-frame detection disabled, SBMODE = 0 -> one stop bit, CHSIZE = 0 -> 8 bits */
SERCOM_USART_CTRLB_TXEN; /* transmitter enabled */
SERCOM5->USART.CTRLC.reg = 0x00;
// 21.701388889 @ baud rate of 230400 bit/s, table 33-2, p 918 of DS60001507E
SERCOM5->USART.BAUD.reg = SERCOM_USART_BAUD_FRAC_FP(7) | SERCOM_USART_BAUD_FRAC_BAUD(21);
// SERCOM5->USART.INTENSET.reg = SERCOM_USART_INTENSET_TXC;
SERCOM5->SPI.CTRLA.bit.ENABLE = 1; /* activate SERCOM */
while(SERCOM5->USART.SYNCBUSY.bit.ENABLE); /* wait for SERCOM to be ready */
#else
/* configure SERCOM0 on PA08 */
PORT->Group[0].WRCONFIG.reg =
PORT_WRCONFIG_WRPINCFG |
PORT_WRCONFIG_WRPMUX |
PORT_WRCONFIG_PMUX(2) | /* function C */
PORT_WRCONFIG_DRVSTR |
PORT_WRCONFIG_PINMASK(0x0100) | /* PA08 */
PORT_WRCONFIG_PMUXEN;
MCLK->APBAMASK.bit.SERCOM0_ = 1;
GCLK->PCHCTRL[SERCOM0_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK2 | GCLK_PCHCTRL_CHEN; /* setup SERCOM to use GLCK2 -> 80MHz */
SERCOM0->USART.CTRLA.reg = 0x00; /* disable SERCOM -> enable config */
while(SERCOM0->USART.SYNCBUSY.bit.ENABLE);
SERCOM0->USART.CTRLA.reg = /* CMODE = 0 -> async, SAMPA = 0, FORM = 0 -> USART frame, SMPR = 0 -> arithmetic baud rate */
SERCOM_USART_CTRLA_SAMPR(1) | /* 0 = 16x / arithmetic baud rate, 1 = 16x / fractional baud rate */
// SERCOM_USART_CTRLA_FORM(0) | /* 0 = USART Frame, 2 = LIN Master */
SERCOM_USART_CTRLA_DORD | /* LSB first */
SERCOM_USART_CTRLA_MODE(1) | /* 0 = Asynchronous, 1 = USART with internal clock */
SERCOM_USART_CTRLA_RXPO(1) | /* SERCOM PAD[1] is used for data reception */
SERCOM_USART_CTRLA_TXPO(0); /* SERCOM PAD[0] is used for data transmission */
SERCOM0->USART.CTRLB.reg = /* RXEM = 0 -> receiver disabled, LINCMD = 0 -> normal USART transmission, SFDE = 0 -> start-of-frame detection disabled, SBMODE = 0 -> one stop bit, CHSIZE = 0 -> 8 bits */
SERCOM_USART_CTRLB_TXEN; /* transmitter enabled */
SERCOM0->USART.CTRLC.reg = 0x00;
// 21.701388889 @ baud rate of 230400 bit/s, table 33-2, p 918 of DS60001507E
SERCOM0->USART.BAUD.reg = SERCOM_USART_BAUD_FRAC_FP(7) | SERCOM_USART_BAUD_FRAC_BAUD(21);
// SERCOM0->USART.INTENSET.reg = SERCOM_USART_INTENSET_TXC;
SERCOM0->SPI.CTRLA.bit.ENABLE = 1; /* activate SERCOM */
while(SERCOM0->USART.SYNCBUSY.bit.ENABLE); /* wait for SERCOM to be ready */
#endif
}
static inline void uart_send_buffer(uint8_t const *text, size_t len)
{
for (size_t i = 0; i < len; ++i) {
BOARD_SERCOM->USART.DATA.reg = text[i];
while((BOARD_SERCOM->USART.INTFLAG.reg & SERCOM_SPI_INTFLAG_TXC) == 0);
}
}
static inline void uart_send_str(const char* text)
{
while (*text) {
BOARD_SERCOM->USART.DATA.reg = *text++;
while((BOARD_SERCOM->USART.INTFLAG.reg & SERCOM_SPI_INTFLAG_TXC) == 0);
}
}
void board_init(void)
{
init_clock();
SystemCoreClock = CONF_CPU_FREQUENCY;
#if CFG_TUSB_OS == OPT_OS_NONE
SysTick_Config(CONF_CPU_FREQUENCY / 1000);
#endif
uart_init();
#if CFG_TUSB_DEBUG >= 2
uart_send_str(BOARD_NAME " UART initialized\n");
tu_printf(BOARD_NAME " reset cause %#02x\n", RSTC->RCAUSE.reg);
#endif
// Led init
gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
gpio_set_pin_level(LED_PIN, 0);
#if CFG_TUSB_DEBUG >= 2
uart_send_str(BOARD_NAME " LED pin configured\n");
#endif
#if CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
NVIC_SetPriority(USB_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
NVIC_SetPriority(USB_2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
NVIC_SetPriority(USB_3_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif
#if CFG_TUD_ENABLED
#if CFG_TUSB_DEBUG >= 2
uart_send_str(BOARD_NAME " USB device enabled\n");
#endif
/* USB clock init
* The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock
* for low speed and full speed operation. */
hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
hri_mclk_set_AHBMASK_USB_bit(MCLK);
hri_mclk_set_APBBMASK_USB_bit(MCLK);
// USB pin init
gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT);
gpio_set_pin_level(PIN_PA24, false);
gpio_set_pin_pull_mode(PIN_PA24, GPIO_PULL_OFF);
gpio_set_pin_direction(PIN_PA25, GPIO_DIRECTION_OUT);
gpio_set_pin_level(PIN_PA25, false);
gpio_set_pin_pull_mode(PIN_PA25, GPIO_PULL_OFF);
gpio_set_pin_function(PIN_PA24, PINMUX_PA24H_USB_DM);
gpio_set_pin_function(PIN_PA25, PINMUX_PA25H_USB_DP);
#if CFG_TUSB_DEBUG >= 2
uart_send_str(BOARD_NAME " USB device configured\n");
#endif
#endif
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state)
{
gpio_set_pin_level(LED_PIN, state);
}
uint32_t board_button_read(void)
{
// this board has no button
return 0;
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
if (len < 0) {
uart_send_str(buf);
} else {
uart_send_buffer(buf, len);
}
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler(void)
{
system_ticks++;
}
uint32_t board_millis(void)
{
return system_ticks;
}
#endif
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
void _init(void)
{
}

View File

@ -0,0 +1,164 @@
/**
* \file
*
* \brief Linker script for running in internal FLASH on the SAME51J19A
*
* Copyright (c) 2019 Microchip Technology Inc.
*
* \asf_license_start
*
* \page License
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License"); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the Licence at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* \asf_license_stop
*
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
/* Memory Spaces Definitions */
MEMORY
{
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00030000
bkupram (rwx) : ORIGIN = 0x47000000, LENGTH = 0x00002000
qspi (rwx) : ORIGIN = 0x04000000, LENGTH = 0x01000000
}
/* The stack size used by the application. NOTE: you need to adjust according to your application. */
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x1000;
/* Section Definitions */
SECTIONS
{
.text :
{
. = ALIGN(4);
_sfixed = .;
KEEP(*(.vectors .vectors.*))
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
/* Support C constructors, and C destructors in both user code
and the C library. This also provides support for C++ code. */
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
. = ALIGN(4);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
. = ALIGN(4);
KEEP(*(.fini))
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
. = ALIGN(4);
_efixed = .; /* End of text section */
} > rom
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > rom
PROVIDE_HIDDEN (__exidx_end = .);
. = ALIGN(4);
_etext = .;
.relocate : AT (_etext)
{
. = ALIGN(4);
_srelocate = .;
*(.ramfunc .ramfunc.*);
*(.data .data.*);
. = ALIGN(4);
_erelocate = .;
} > ram
.bkupram (NOLOAD):
{
. = ALIGN(8);
_sbkupram = .;
*(.bkupram .bkupram.*);
. = ALIGN(8);
_ebkupram = .;
} > bkupram
.qspi (NOLOAD):
{
. = ALIGN(8);
_sqspi = .;
*(.qspi .qspi.*);
. = ALIGN(8);
_eqspi = .;
} > qspi
/* .bss section which is used for uninitialized data */
.bss (NOLOAD) :
{
. = ALIGN(4);
_sbss = . ;
_szero = .;
*(.bss .bss.*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
_ezero = .;
} > ram
/* stack section */
.stack (NOLOAD):
{
. = ALIGN(8);
_sstack = .;
. = . + STACK_SIZE;
. = ALIGN(8);
_estack = .;
} > ram
. = ALIGN(4);
_end = . ;
end = .;
}

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@ -0,0 +1,55 @@
CFLAGS += \
-flto \
-mthumb \
-mthumb-interwork \
-mabi=aapcs \
-mcpu=cortex-m33+nodsp \
-mfloat-abi=hard \
-mfpu=fpv5-sp-d16 \
-nostdlib \
-DCORE_M33 \
-DCFG_TUSB_MCU=OPT_MCU_DA1469X \
-DCFG_TUD_ENDPOINT0_SIZE=8\
MCU_FAMILY_DIR = hw/mcu/dialog/da1469x
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/da1469x.ld
# While this is for da1469x chip, there is chance that da1468x chip family will also work
SRC_C += \
src/portable/dialog/da146xx/dcd_da146xx.c \
$(MCU_FAMILY_DIR)/src/system_da1469x.c \
$(MCU_FAMILY_DIR)/src/da1469x_clock.c \
$(MCU_FAMILY_DIR)/src/hal_gpio.c \
SRC_S += hw/bsp/$(BOARD)/gcc_startup_da1469x.S
INC += \
$(TOP)/hw/bsp/$(BOARD) \
$(TOP)/$(MCU_FAMILY_DIR)/include \
$(TOP)/$(MCU_FAMILY_DIR)/SDK_10.0.8.105/sdk/bsp/include
# For freeRTOS port source
FREERTOS_PORT = ARM_CM33_NTZ/non_secure
# For flash-jlink target
JLINK_DEVICE = DA14695
# flash using jlink but with some twists
flash: flash-dialog
flash-dialog: $(BUILD)/$(PROJECT).bin
@echo '#define SW_VERSION "v_1.0.0.1"' >$(BUILD)/version.h
@echo '#define SW_VERSION_DATE "'`date +"%Y-%m-%d %H:%M"`'"' >>$(BUILD)/version.h
mkimage da1469x $(BUILD)/$(PROJECT).bin $(BUILD)/version.h $^.img
cp $(TOP)/hw/bsp/$(BOARD)/product_header.dump $(BUILD)/$(BOARD)-image.bin
cat $^.img >> $(BUILD)/$(BOARD)-image.bin
@echo r > $(BUILD)/$(BOARD).jlink
@echo halt >> $(BUILD)/$(BOARD).jlink
@echo loadfile $(BUILD)/$(BOARD)-image.bin 0x16000000 >> $(BUILD)/$(BOARD).jlink
@echo r >> $(BUILD)/$(BOARD).jlink
@echo go >> $(BUILD)/$(BOARD).jlink
@echo exit >> $(BUILD)/$(BOARD).jlink
$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $(BUILD)/$(BOARD).jlink

View File

@ -0,0 +1,134 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2020 Jerzy Kasenberg
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "bsp/board.h"
#include <hal/hal_gpio.h>
#include <mcu/mcu.h>
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_IRQHandler(void)
{
tud_int_handler(0);
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
#define LED_PIN 33 // P1.1
#define LED_STATE_ON 1
#define LED_STATE_OFF (1-LED_STATE_ON)
#define BUTTON_PIN 6
void UnhandledIRQ(void)
{
CRG_TOP->SYS_CTRL_REG = 0x80;
__BKPT(1);
while(1);
}
// DA146xx driver function that must be called whenever VBUS changes.
extern void tusb_vbus_changed(bool present);
void board_init(void)
{
// LED
hal_gpio_init_out(LED_PIN, LED_STATE_ON);
hal_gpio_init_out(1, 0);
hal_gpio_init_out(2, 0);
hal_gpio_init_out(3, 0);
hal_gpio_init_out(4, 0);
hal_gpio_init_out(5, 0);
// Button
hal_gpio_init_in(BUTTON_PIN, HAL_GPIO_PULL_DOWN);
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#if CFG_TUD_ENABLED
// This board is USB powered there is no need to monitor
// VBUS line. Notify driver that VBUS is present.
tusb_vbus_changed(true);
/* Setup USB IRQ */
NVIC_SetPriority(USB_IRQn, 2);
NVIC_EnableIRQ(USB_IRQn);
/* Use PLL96 / 2 clock not HCLK */
CRG_TOP->CLK_CTRL_REG &= ~CRG_TOP_CLK_CTRL_REG_USB_CLK_SRC_Msk;
mcu_gpio_set_pin_function(14, MCU_GPIO_MODE_INPUT, MCU_GPIO_FUNC_USB);
mcu_gpio_set_pin_function(15, MCU_GPIO_MODE_INPUT, MCU_GPIO_FUNC_USB);
#endif
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state)
{
hal_gpio_write(LED_PIN, state ? LED_STATE_ON : LED_STATE_OFF);
}
uint32_t board_button_read(void)
{
// button is active HIGH
return hal_gpio_read(BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void)buf;
(void)len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void)buf;
(void)len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler(void)
{
system_ticks++;
}
uint32_t board_millis(void)
{
return system_ticks;
}
#endif

View File

@ -0,0 +1,245 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
MEMORY
{
/*
* Flash is remapped at 0x0 by 1st stage bootloader, but this is done with
* an offset derived from image header thus it is safer to use remapped
* address space at 0x0 instead of QSPI_M address space at 0x16000000.
* Bootloader partition is 32K, but 9K is currently reserved for product
* header (8K) and image header (1K).
* First 512 bytes of SYSRAM are remapped at 0x0 and used as ISR vector
* (there's no need to reallocate ISR vector) and thus cannot be used by
* application.
*/
FLASH (r) : ORIGIN = (0x00000000), LENGTH = (1024 * 1024)
RAM (rw) : ORIGIN = (0x20000000), LENGTH = (512 * 1024)
}
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __HeapBase
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
* __bssnz_start__
* __bssnz_end__
*/
ENTRY(Reset_Handler)
SECTIONS
{
__text = .;
.text :
{
__isr_vector_start = .;
KEEP(*(.isr_vector))
/* ISR vector shall have exactly 512 bytes */
. = __isr_vector_start + 0x200;
__isr_vector_end = .;
*(.text)
*(.text.*)
*(.libcmac.rom)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
*(.eh_frame*)
. = ALIGN(4);
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} > FLASH
__exidx_start = .;
.ARM :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
. = ALIGN(4);
} > FLASH
__exidx_end = .;
.intvect :
{
. = ALIGN(4);
__intvect_start__ = .;
. = . + (__isr_vector_end - __isr_vector_start);
. = ALIGN(4);
} > RAM
.sleep_state (NOLOAD) :
{
. = ALIGN(4);
*(sleep_state)
} > RAM
/* This section will be zeroed by RTT package init */
.rtt (NOLOAD):
{
. = ALIGN(4);
*(.rtt)
. = ALIGN(4);
} > RAM
__text_ram_addr = LOADADDR(.text_ram);
.text_ram :
{
. = ALIGN(4);
__text_ram_start__ = .;
*(.text_ram*)
. = ALIGN(4);
__text_ram_end__ = .;
} > RAM AT > FLASH
__etext = LOADADDR(.data);
.data :
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
*(.preinit_array)
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
*(SORT(.init_array.*))
*(.init_array)
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
*(SORT(.fini_array.*))
*(.fini_array)
PROVIDE_HIDDEN (__fini_array_end = .);
*(.jcr)
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > RAM AT > FLASH
.bssnz :
{
. = ALIGN(4);
__bssnz_start__ = .;
*(.bss.core.nz*)
. = ALIGN(4);
__bssnz_end__ = .;
} > RAM
.bss :
{
. = ALIGN(4);
__bss_start__ = .;
*(.bss*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
} > RAM
.cmac (NOLOAD) :
{
. = ALIGN(0x400);
*(.libcmac.ram)
} > RAM
/* Heap starts after BSS */
. = ALIGN(8);
__HeapBase = .;
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (COPY):
{
*(.stack*)
} > RAM
_ram_start = ORIGIN(RAM);
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Top of head is the bottom of the stack */
__HeapLimit = __StackLimit;
end = __HeapLimit;
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__HeapBase <= __HeapLimit, "region RAM overflowed with stack")
/* Check that intvect is at the beginning of RAM */
ASSERT(__intvect_start__ == ORIGIN(RAM), "intvect is not at beginning of RAM")
}

View File

@ -0,0 +1,301 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#include "syscfg/syscfg.h"
.syntax unified
.arch armv7-m
.section .stack
.align 3
#ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE
#else
.equ Stack_Size, 0xC00
#endif
.equ SYS_CTRL_REG, 0x50000024
.equ CACHE_FLASH_REG, 0x100C0040
.equ RESET_STAT_REG, 0x500000BC
.globl __StackTop
.globl __StackLimit
__StackLimit:
.space Stack_Size
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .heap
.align 3
#ifdef __HEAP_SIZE
.equ Heap_Size, __HEAP_SIZE
#else
.equ Heap_Size, 0
#endif
.globl __HeapBase
.globl __HeapLimit
__HeapBase:
.if Heap_Size
.space Heap_Size
.endif
.size __HeapBase, . - __HeapBase
__HeapLimit:
.size __HeapLimit, . - __HeapLimit
.section .isr_vector
.align 2
.globl __isr_vector
__isr_vector:
.long __StackTop
.long Reset_Handler
/* Cortex-M33 interrupts */
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long SecureFault_Handler
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long SVC_Handler
.long DebugMonitor_Handler
.long 0 /* Reserved */
.long PendSV_Handler
.long SysTick_Handler
/* DA1469x interrupts */
.long SENSOR_NODE_IRQHandler
.long DMA_IRQHandler
.long CHARGER_STATE_IRQHandler
.long CHARGER_ERROR_IRQHandler
.long CMAC2SYS_IRQHandler
.long UART_IRQHandler
.long UART2_IRQHandler
.long UART3_IRQHandler
.long I2C_IRQHandler
.long I2C2_IRQHandler
.long SPI_IRQHandler
.long SPI2_IRQHandler
.long PCM_IRQHandler
.long SRC_IN_IRQHandler
.long SRC_OUT_IRQHandler
.long USB_IRQHandler
.long TIMER_IRQHandler
.long TIMER2_IRQHandler
.long RTC_IRQHandler
.long KEY_WKUP_GPIO_IRQHandler
.long PDC_IRQHandler
.long VBUS_IRQHandler
.long MRM_IRQHandler
.long MOTOR_CONTROLLER_IRQHandler
.long TRNG_IRQHandler
.long DCDC_IRQHandler
.long XTAL32M_RDY_IRQHandler
.long ADC_IRQHandler
.long ADC2_IRQHandler
.long CRYPTO_IRQHandler
.long CAPTIMER1_IRQHandler
.long RFDIAG_IRQHandler
.long LCD_CONTROLLER_IRQHandler
.long PLL_LOCK_IRQHandler
.long TIMER3_IRQHandler
.long TIMER4_IRQHandler
.long LRA_IRQHandler
.long RTC_EVENT_IRQHandler
.long GPIO_P0_IRQHandler
.long GPIO_P1_IRQHandler
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.size __isr_vector, . - __isr_vector
.text
.thumb
.thumb_func
.align 2
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Make sure interrupt vector is remapped at 0x0 */
ldr r1, =SYS_CTRL_REG
ldrh r2, [r1, #0]
orrs r2, r2, #8
strh r2, [r1, #0]
#if !MYNEWT_VAL(RAM_RESIDENT)
/*
* Flash is remapped at 0x0 with an offset, i.e. 0x0 does not correspond to
* 0x16000000 but to start of an image on flash. This is calculated from product
* header by 1st state bootloader and configured in CACHE_FLASH_REG. We need to
* retrieve proper offset value for calculations later.
*/
ldr r1, =CACHE_FLASH_REG
ldr r4, [r1, #0]
mov r2, r4
mov r3, #0xFFFF
bic r4, r4, r3 /* CACHE_FLASH_REG[FLASH_REGION_BASE] */
mov r3, #0xFFF0
and r2, r2, r3 /* CACHE_FLASH_REG[FLASH_REGION_OFFSET] */
lsr r2, r2, #2
orr r4, r4, r2
/* Copy ISR vector from flash to RAM */
ldr r1, =__isr_vector_start /* src ptr */
ldr r2, =__isr_vector_end /* src end */
ldr r3, =__intvect_start__ /* dst ptr */
/* Make sure we copy from QSPIC address range, not from remapped range */
cmp r1, r4
itt lt
addlt r1, r1, r4
addlt r2, r2, r4
.loop_isr_copy:
cmp r1, r2
ittt lt
ldrlt r0, [r1], #4
strlt r0, [r3], #4
blt .loop_isr_copy
/* Copy QSPI code from flash to RAM */
ldr r1, =__text_ram_addr /* src ptr */
ldr r2, =__text_ram_start__ /* ptr */
ldr r3, =__text_ram_end__ /* dst end */
.loop_code_text_ram_copy:
cmp r2, r3
ittt lt
ldrlt r0, [r1], #4
strlt r0, [r2], #4
blt .loop_code_text_ram_copy
/* Copy data from flash to RAM */
ldr r1, =__etext /* src ptr */
ldr r2, =__data_start__ /* dst ptr */
ldr r3, =__data_end__ /* dst end */
.loop_data_copy:
cmp r2, r3
ittt lt
ldrlt r0, [r1], #4
strlt r0, [r2], #4
blt .loop_data_copy
#endif
/* Clear BSS */
movs r0, 0
ldr r1, =__bss_start__
ldr r2, =__bss_end__
.loop_bss_clear:
cmp r1, r2
itt lt
strlt r0, [r1], #4
blt .loop_bss_clear
ldr r0, =__HeapBase
ldr r1, =__HeapLimit
/* Call static constructors */
bl __libc_init_array
bl SystemInit
bl main
.pool
.size Reset_Handler, . - Reset_Handler
/* Default interrupt handler */
.type Default_Handler, %function
Default_Handler:
ldr r1, =SYS_CTRL_REG
ldrh r2, [r1, #0]
orrs r2, r2, #0x80 /* DEBUGGER_ENABLE */
strh r2, [r1, #0]
b .
.size Default_Handler, . - Default_Handler
/* Default handlers for all interrupts */
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
/* Cortex-M33 interrupts */
IRQ NMI_Handler
IRQ HardFault_Handler
IRQ MemoryManagement_Handler
IRQ BusFault_Handler
IRQ UsageFault_Handler
IRQ SecureFault_Handler
IRQ SVC_Handler
IRQ DebugMonitor_Handler
IRQ PendSV_Handler
IRQ SysTick_Handler
/* DA1469x interrupts */
IRQ SENSOR_NODE_IRQHandler
IRQ DMA_IRQHandler
IRQ CHARGER_STATE_IRQHandler
IRQ CHARGER_ERROR_IRQHandler
IRQ CMAC2SYS_IRQHandler
IRQ UART_IRQHandler
IRQ UART2_IRQHandler
IRQ UART3_IRQHandler
IRQ I2C_IRQHandler
IRQ I2C2_IRQHandler
IRQ SPI_IRQHandler
IRQ SPI2_IRQHandler
IRQ PCM_IRQHandler
IRQ SRC_IN_IRQHandler
IRQ SRC_OUT_IRQHandler
IRQ USB_IRQHandler
IRQ TIMER_IRQHandler
IRQ TIMER2_IRQHandler
IRQ RTC_IRQHandler
IRQ KEY_WKUP_GPIO_IRQHandler
IRQ PDC_IRQHandler
IRQ VBUS_IRQHandler
IRQ MRM_IRQHandler
IRQ MOTOR_CONTROLLER_IRQHandler
IRQ TRNG_IRQHandler
IRQ DCDC_IRQHandler
IRQ XTAL32M_RDY_IRQHandler
IRQ ADC_IRQHandler
IRQ ADC2_IRQHandler
IRQ CRYPTO_IRQHandler
IRQ CAPTIMER1_IRQHandler
IRQ RFDIAG_IRQHandler
IRQ LCD_CONTROLLER_IRQHandler
IRQ PLL_LOCK_IRQHandler
IRQ TIMER3_IRQHandler
IRQ TIMER4_IRQHandler
IRQ LRA_IRQHandler
IRQ RTC_EVENT_IRQHandler
IRQ GPIO_P0_IRQHandler
IRQ GPIO_P1_IRQHandler
IRQ RESERVED40_IRQHandler
IRQ RESERVED41_IRQHandler
IRQ RESERVED42_IRQHandler
IRQ RESERVED43_IRQHandler
IRQ RESERVED44_IRQHandler
IRQ RESERVED45_IRQHandler
IRQ RESERVED46_IRQHandler
IRQ RESERVED47_IRQHandler
.end

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/**
* This file was generated by Apache newt version: 1.9.0-dev
*/
#ifndef H_MYNEWT_SYSCFG_
#define H_MYNEWT_SYSCFG_
/**
* This macro exists to ensure code includes this header when needed. If code
* checks the existence of a setting directly via ifdef without including this
* header, the setting macro will silently evaluate to 0. In contrast, an
* attempt to use these macros without including this header will result in a
* compiler error.
*/
#define MYNEWT_VAL(_name) MYNEWT_VAL_ ## _name
#define MYNEWT_VAL_CHOICE(_name, _val) MYNEWT_VAL_ ## _name ## __ ## _val
#ifndef MYNEWT_VAL_RAM_RESIDENT
#define MYNEWT_VAL_RAM_RESIDENT (0)
#endif
#ifndef MYNEWT_VAL_MCU_GPIO_MAX_IRQ
#define MYNEWT_VAL_MCU_GPIO_MAX_IRQ (4)
#endif
#ifndef MYNEWT_VAL_MCU_GPIO_RETAINABLE_NUM
#define MYNEWT_VAL_MCU_GPIO_RETAINABLE_NUM (-1)
#endif
#ifndef MYNEWT_VAL_MCU_CLOCK_XTAL32M_SETTLE_TIME_US
#define MYNEWT_VAL_MCU_CLOCK_XTAL32M_SETTLE_TIME_US (2000)
#endif
#endif

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CFLAGS += \
-flto \
-mthumb \
-mthumb-interwork \
-mabi=aapcs \
-mcpu=cortex-m33+nodsp \
-mfloat-abi=hard \
-mfpu=fpv5-sp-d16 \
-nostdlib \
-DCORE_M33 \
-DCFG_TUSB_MCU=OPT_MCU_DA1469X \
-DCFG_TUD_ENDPOINT0_SIZE=8\
MCU_FAMILY_DIR = hw/mcu/dialog/da1469x
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/da1469x.ld
# While this is for da1469x chip, there is chance that da1468x chip family will also work
SRC_C += \
src/portable/dialog/da146xx/dcd_da146xx.c \
$(MCU_FAMILY_DIR)/src/system_da1469x.c \
$(MCU_FAMILY_DIR)/src/da1469x_clock.c \
$(MCU_FAMILY_DIR)/src/hal_gpio.c \
SRC_S += hw/bsp/$(BOARD)/gcc_startup_da1469x.S
INC += \
$(TOP)/hw/bsp/$(BOARD) \
$(TOP)/$(MCU_FAMILY_DIR)/include \
$(TOP)/$(MCU_FAMILY_DIR)/SDK_10.0.8.105/sdk/bsp/include
# For freeRTOS port source
FREERTOS_PORT = ARM_CM33_NTZ/non_secure
# For flash-jlink target
JLINK_DEVICE = DA14699
# flash using jlink but with some twists
flash: flash-dialog
flash-dialog: $(BUILD)/$(PROJECT).bin
@echo '#define SW_VERSION "v_1.0.0.1"' >$(BUILD)/version.h
@echo '#define SW_VERSION_DATE "'`date +"%Y-%m-%d %H:%M"`'"' >>$(BUILD)/version.h
mkimage da1469x $(BUILD)/$(PROJECT).bin $(BUILD)/version.h $^.img
cp $(TOP)/hw/bsp/$(BOARD)/product_header.dump $(BUILD)/$(BOARD)-image.bin
cat $^.img >> $(BUILD)/$(BOARD)-image.bin
@echo r > $(BUILD)/$(BOARD).jlink
@echo halt >> $(BUILD)/$(BOARD).jlink
@echo loadfile $(BUILD)/$(BOARD)-image.bin 0x16000000 >> $(BUILD)/$(BOARD).jlink
@echo r >> $(BUILD)/$(BOARD).jlink
@echo go >> $(BUILD)/$(BOARD).jlink
@echo exit >> $(BUILD)/$(BOARD).jlink
$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $(BUILD)/$(BOARD).jlink

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020 Jerzy Kasenberg
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "bsp/board.h"
#include <hal/hal_gpio.h>
#include <mcu/mcu.h>
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_IRQHandler(void)
{
tud_int_handler(0);
}
#if CFG_TUD_ENABLED
// DA146xx driver function that must be called whenever VBUS changes
extern void tusb_vbus_changed(bool present);
// VBUS change interrupt handler
void VBUS_IRQHandler(void)
{
bool present = (CRG_TOP->ANA_STATUS_REG & CRG_TOP_ANA_STATUS_REG_VBUS_AVAILABLE_Msk) != 0;
// Clear VBUS interrupt
CRG_TOP->VBUS_IRQ_CLEAR_REG = 1;
tusb_vbus_changed(present);
}
#endif
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
#define LED_PIN 33
#define LED_STATE_ON 1
#define LED_STATE_OFF 0
#define BUTTON_PIN 6
void UnhandledIRQ(void)
{
CRG_TOP->SYS_CTRL_REG = 0x80;
__BKPT(1);
while(1);
}
void board_init(void)
{
// LED
hal_gpio_init_out(LED_PIN, LED_STATE_ON);
hal_gpio_init_out(1, 0);
hal_gpio_init_out(2, 0);
hal_gpio_init_out(3, 0);
hal_gpio_init_out(4, 0);
hal_gpio_init_out(5, 0);
// Button
hal_gpio_init_in(BUTTON_PIN, HAL_GPIO_PULL_UP);
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#if CFG_TUD_ENABLED
// Setup interrupt for both connect and disconnect
CRG_TOP->VBUS_IRQ_MASK_REG = CRG_TOP_VBUS_IRQ_MASK_REG_VBUS_IRQ_EN_FALL_Msk |
CRG_TOP_VBUS_IRQ_MASK_REG_VBUS_IRQ_EN_RISE_Msk;
NVIC_SetPriority(VBUS_IRQn, 2);
// Trigger interrupt at the start to inform driver about VBUS state at start
// otherwise it could go unnoticed.
NVIC_SetPendingIRQ(VBUS_IRQn);
NVIC_EnableIRQ(VBUS_IRQn);
/* Setup USB IRQ */
NVIC_SetPriority(USB_IRQn, 2);
NVIC_EnableIRQ(USB_IRQn);
/* Use PLL96 / 2 clock not HCLK */
CRG_TOP->CLK_CTRL_REG &= ~CRG_TOP_CLK_CTRL_REG_USB_CLK_SRC_Msk;
mcu_gpio_set_pin_function(14, MCU_GPIO_MODE_INPUT, MCU_GPIO_FUNC_USB);
mcu_gpio_set_pin_function(15, MCU_GPIO_MODE_INPUT, MCU_GPIO_FUNC_USB);
#endif
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state)
{
hal_gpio_write(LED_PIN, state ? LED_STATE_ON : LED_STATE_OFF);
}
uint32_t board_button_read(void)
{
// button is active LOW
return hal_gpio_read(BUTTON_PIN) ^ 1;
}
int board_uart_read(uint8_t* buf, int len)
{
(void)buf;
(void)len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void)buf;
(void)len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler(void)
{
system_ticks++;
}
uint32_t board_millis(void)
{
return system_ticks;
}
#endif

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/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
MEMORY
{
/*
* Flash is remapped at 0x0 by 1st stage bootloader, but this is done with
* an offset derived from image header thus it is safer to use remapped
* address space at 0x0 instead of QSPI_M address space at 0x16000000.
* Bootloader partition is 32K, but 9K is currently reserved for product
* header (8K) and image header (1K).
* First 512 bytes of SYSRAM are remapped at 0x0 and used as ISR vector
* (there's no need to reallocate ISR vector) and thus cannot be used by
* application.
*/
FLASH (r) : ORIGIN = (0x00000000), LENGTH = (1024 * 1024)
RAM (rw) : ORIGIN = (0x20000000), LENGTH = (512 * 1024)
}
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __HeapBase
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
* __bssnz_start__
* __bssnz_end__
*/
ENTRY(Reset_Handler)
SECTIONS
{
__text = .;
.text :
{
__isr_vector_start = .;
KEEP(*(.isr_vector))
/* ISR vector shall have exactly 512 bytes */
. = __isr_vector_start + 0x200;
__isr_vector_end = .;
*(.text)
*(.text.*)
*(.libcmac.rom)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
*(.eh_frame*)
. = ALIGN(4);
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} > FLASH
__exidx_start = .;
.ARM :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
. = ALIGN(4);
} > FLASH
__exidx_end = .;
.intvect :
{
. = ALIGN(4);
__intvect_start__ = .;
. = . + (__isr_vector_end - __isr_vector_start);
. = ALIGN(4);
} > RAM
.sleep_state (NOLOAD) :
{
. = ALIGN(4);
*(sleep_state)
} > RAM
/* This section will be zeroed by RTT package init */
.rtt (NOLOAD):
{
. = ALIGN(4);
*(.rtt)
. = ALIGN(4);
} > RAM
__text_ram_addr = LOADADDR(.text_ram);
.text_ram :
{
. = ALIGN(4);
__text_ram_start__ = .;
*(.text_ram*)
. = ALIGN(4);
__text_ram_end__ = .;
} > RAM AT > FLASH
__etext = LOADADDR(.data);
.data :
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
*(.preinit_array)
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
*(SORT(.init_array.*))
*(.init_array)
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
*(SORT(.fini_array.*))
*(.fini_array)
PROVIDE_HIDDEN (__fini_array_end = .);
*(.jcr)
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > RAM AT > FLASH
.bssnz :
{
. = ALIGN(4);
__bssnz_start__ = .;
*(.bss.core.nz*)
. = ALIGN(4);
__bssnz_end__ = .;
} > RAM
.bss :
{
. = ALIGN(4);
__bss_start__ = .;
*(.bss*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
} > RAM
.cmac (NOLOAD) :
{
. = ALIGN(0x400);
*(.libcmac.ram)
} > RAM
/* Heap starts after BSS */
. = ALIGN(8);
__HeapBase = .;
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (COPY):
{
*(.stack*)
} > RAM
_ram_start = ORIGIN(RAM);
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Top of head is the bottom of the stack */
__HeapLimit = __StackLimit;
end = __HeapLimit;
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__HeapBase <= __HeapLimit, "region RAM overflowed with stack")
/* Check that intvect is at the beginning of RAM */
ASSERT(__intvect_start__ == ORIGIN(RAM), "intvect is not at beginning of RAM")
}

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/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#include "syscfg/syscfg.h"
.syntax unified
.arch armv7-m
.section .stack
.align 3
#ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE
#else
.equ Stack_Size, 0xC00
#endif
.equ SYS_CTRL_REG, 0x50000024
.equ CACHE_FLASH_REG, 0x100C0040
.equ RESET_STAT_REG, 0x500000BC
.globl __StackTop
.globl __StackLimit
__StackLimit:
.space Stack_Size
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .heap
.align 3
#ifdef __HEAP_SIZE
.equ Heap_Size, __HEAP_SIZE
#else
.equ Heap_Size, 0
#endif
.globl __HeapBase
.globl __HeapLimit
__HeapBase:
.if Heap_Size
.space Heap_Size
.endif
.size __HeapBase, . - __HeapBase
__HeapLimit:
.size __HeapLimit, . - __HeapLimit
.section .isr_vector
.align 2
.globl __isr_vector
__isr_vector:
.long __StackTop
.long Reset_Handler
/* Cortex-M33 interrupts */
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long SecureFault_Handler
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long SVC_Handler
.long DebugMonitor_Handler
.long 0 /* Reserved */
.long PendSV_Handler
.long SysTick_Handler
/* DA1469x interrupts */
.long SENSOR_NODE_IRQHandler
.long DMA_IRQHandler
.long CHARGER_STATE_IRQHandler
.long CHARGER_ERROR_IRQHandler
.long CMAC2SYS_IRQHandler
.long UART_IRQHandler
.long UART2_IRQHandler
.long UART3_IRQHandler
.long I2C_IRQHandler
.long I2C2_IRQHandler
.long SPI_IRQHandler
.long SPI2_IRQHandler
.long PCM_IRQHandler
.long SRC_IN_IRQHandler
.long SRC_OUT_IRQHandler
.long USB_IRQHandler
.long TIMER_IRQHandler
.long TIMER2_IRQHandler
.long RTC_IRQHandler
.long KEY_WKUP_GPIO_IRQHandler
.long PDC_IRQHandler
.long VBUS_IRQHandler
.long MRM_IRQHandler
.long MOTOR_CONTROLLER_IRQHandler
.long TRNG_IRQHandler
.long DCDC_IRQHandler
.long XTAL32M_RDY_IRQHandler
.long ADC_IRQHandler
.long ADC2_IRQHandler
.long CRYPTO_IRQHandler
.long CAPTIMER1_IRQHandler
.long RFDIAG_IRQHandler
.long LCD_CONTROLLER_IRQHandler
.long PLL_LOCK_IRQHandler
.long TIMER3_IRQHandler
.long TIMER4_IRQHandler
.long LRA_IRQHandler
.long RTC_EVENT_IRQHandler
.long GPIO_P0_IRQHandler
.long GPIO_P1_IRQHandler
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.size __isr_vector, . - __isr_vector
.text
.thumb
.thumb_func
.align 2
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Make sure interrupt vector is remapped at 0x0 */
ldr r1, =SYS_CTRL_REG
ldrh r2, [r1, #0]
orrs r2, r2, #8
strh r2, [r1, #0]
#if !MYNEWT_VAL(RAM_RESIDENT)
/*
* Flash is remapped at 0x0 with an offset, i.e. 0x0 does not correspond to
* 0x16000000 but to start of an image on flash. This is calculated from product
* header by 1st state bootloader and configured in CACHE_FLASH_REG. We need to
* retrieve proper offset value for calculations later.
*/
ldr r1, =CACHE_FLASH_REG
ldr r4, [r1, #0]
mov r2, r4
mov r3, #0xFFFF
bic r4, r4, r3 /* CACHE_FLASH_REG[FLASH_REGION_BASE] */
mov r3, #0xFFF0
and r2, r2, r3 /* CACHE_FLASH_REG[FLASH_REGION_OFFSET] */
lsr r2, r2, #2
orr r4, r4, r2
/* Copy ISR vector from flash to RAM */
ldr r1, =__isr_vector_start /* src ptr */
ldr r2, =__isr_vector_end /* src end */
ldr r3, =__intvect_start__ /* dst ptr */
/* Make sure we copy from QSPIC address range, not from remapped range */
cmp r1, r4
itt lt
addlt r1, r1, r4
addlt r2, r2, r4
.loop_isr_copy:
cmp r1, r2
ittt lt
ldrlt r0, [r1], #4
strlt r0, [r3], #4
blt .loop_isr_copy
/* Copy QSPI code from flash to RAM */
ldr r1, =__text_ram_addr /* src ptr */
ldr r2, =__text_ram_start__ /* ptr */
ldr r3, =__text_ram_end__ /* dst end */
.loop_code_text_ram_copy:
cmp r2, r3
ittt lt
ldrlt r0, [r1], #4
strlt r0, [r2], #4
blt .loop_code_text_ram_copy
/* Copy data from flash to RAM */
ldr r1, =__etext /* src ptr */
ldr r2, =__data_start__ /* dst ptr */
ldr r3, =__data_end__ /* dst end */
.loop_data_copy:
cmp r2, r3
ittt lt
ldrlt r0, [r1], #4
strlt r0, [r2], #4
blt .loop_data_copy
#endif
/* Clear BSS */
movs r0, 0
ldr r1, =__bss_start__
ldr r2, =__bss_end__
.loop_bss_clear:
cmp r1, r2
itt lt
strlt r0, [r1], #4
blt .loop_bss_clear
ldr r0, =__HeapBase
ldr r1, =__HeapLimit
/* Call static constructors */
bl __libc_init_array
bl SystemInit
bl main
.pool
.size Reset_Handler, . - Reset_Handler
/* Default interrupt handler */
.type Default_Handler, %function
Default_Handler:
ldr r1, =SYS_CTRL_REG
ldrh r2, [r1, #0]
orrs r2, r2, #0x80 /* DEBUGGER_ENABLE */
strh r2, [r1, #0]
b .
.size Default_Handler, . - Default_Handler
/* Default handlers for all interrupts */
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
/* Cortex-M33 interrupts */
IRQ NMI_Handler
IRQ HardFault_Handler
IRQ MemoryManagement_Handler
IRQ BusFault_Handler
IRQ UsageFault_Handler
IRQ SecureFault_Handler
IRQ SVC_Handler
IRQ DebugMonitor_Handler
IRQ PendSV_Handler
IRQ SysTick_Handler
/* DA1469x interrupts */
IRQ SENSOR_NODE_IRQHandler
IRQ DMA_IRQHandler
IRQ CHARGER_STATE_IRQHandler
IRQ CHARGER_ERROR_IRQHandler
IRQ CMAC2SYS_IRQHandler
IRQ UART_IRQHandler
IRQ UART2_IRQHandler
IRQ UART3_IRQHandler
IRQ I2C_IRQHandler
IRQ I2C2_IRQHandler
IRQ SPI_IRQHandler
IRQ SPI2_IRQHandler
IRQ PCM_IRQHandler
IRQ SRC_IN_IRQHandler
IRQ SRC_OUT_IRQHandler
IRQ USB_IRQHandler
IRQ TIMER_IRQHandler
IRQ TIMER2_IRQHandler
IRQ RTC_IRQHandler
IRQ KEY_WKUP_GPIO_IRQHandler
IRQ PDC_IRQHandler
IRQ VBUS_IRQHandler
IRQ MRM_IRQHandler
IRQ MOTOR_CONTROLLER_IRQHandler
IRQ TRNG_IRQHandler
IRQ DCDC_IRQHandler
IRQ XTAL32M_RDY_IRQHandler
IRQ ADC_IRQHandler
IRQ ADC2_IRQHandler
IRQ CRYPTO_IRQHandler
IRQ CAPTIMER1_IRQHandler
IRQ RFDIAG_IRQHandler
IRQ LCD_CONTROLLER_IRQHandler
IRQ PLL_LOCK_IRQHandler
IRQ TIMER3_IRQHandler
IRQ TIMER4_IRQHandler
IRQ LRA_IRQHandler
IRQ RTC_EVENT_IRQHandler
IRQ GPIO_P0_IRQHandler
IRQ GPIO_P1_IRQHandler
IRQ RESERVED40_IRQHandler
IRQ RESERVED41_IRQHandler
IRQ RESERVED42_IRQHandler
IRQ RESERVED43_IRQHandler
IRQ RESERVED44_IRQHandler
IRQ RESERVED45_IRQHandler
IRQ RESERVED46_IRQHandler
IRQ RESERVED47_IRQHandler
.end

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/**
* This file was generated by Apache newt version: 1.9.0-dev
*/
#ifndef H_MYNEWT_SYSCFG_
#define H_MYNEWT_SYSCFG_
/**
* This macro exists to ensure code includes this header when needed. If code
* checks the existence of a setting directly via ifdef without including this
* header, the setting macro will silently evaluate to 0. In contrast, an
* attempt to use these macros without including this header will result in a
* compiler error.
*/
#define MYNEWT_VAL(_name) MYNEWT_VAL_ ## _name
#define MYNEWT_VAL_CHOICE(_name, _val) MYNEWT_VAL_ ## _name ## __ ## _val
#ifndef MYNEWT_VAL_RAM_RESIDENT
#define MYNEWT_VAL_RAM_RESIDENT (0)
#endif
#ifndef MYNEWT_VAL_MCU_GPIO_MAX_IRQ
#define MYNEWT_VAL_MCU_GPIO_MAX_IRQ (4)
#endif
#ifndef MYNEWT_VAL_MCU_GPIO_RETAINABLE_NUM
#define MYNEWT_VAL_MCU_GPIO_RETAINABLE_NUM (-1)
#endif
#ifndef MYNEWT_VAL_MCU_CLOCK_XTAL32M_SETTLE_TIME_US
#define MYNEWT_VAL_MCU_CLOCK_XTAL32M_SETTLE_TIME_US (2000)
#endif
#endif

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DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-nostdlib \
-DCORE_M4 \
-D__USE_LPCOPEN \
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
-DCFG_TUSB_MCU=OPT_MCU_LPC40XX
# mcu driver cause following warnings
CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=cast-qual
MCU_DIR = hw/mcu/nxp/lpcopen/lpc40xx/lpc_chip_40xx
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/lpc4088.ld
SRC_C += \
src/portable/nxp/lpc17_40/dcd_lpc17_40.c \
$(MCU_DIR)/../gcc/cr_startup_lpc40xx.c \
$(MCU_DIR)/src/chip_17xx_40xx.c \
$(MCU_DIR)/src/clock_17xx_40xx.c \
$(MCU_DIR)/src/gpio_17xx_40xx.c \
$(MCU_DIR)/src/iocon_17xx_40xx.c \
$(MCU_DIR)/src/sysctl_17xx_40xx.c \
$(MCU_DIR)/src/sysinit_17xx_40xx.c \
$(MCU_DIR)/src/uart_17xx_40xx.c \
$(MCU_DIR)/src/fpu_init.c
INC += \
$(TOP)/$(MCU_DIR)/inc
# For freeRTOS port source
FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = LPC4088
# flash using jlink
flash: flash-jlink

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/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "chip.h"
#include "../board.h"
//--------------------------------------------------------------------+
// USB Interrupt Handler
//--------------------------------------------------------------------+
void USB_IRQHandler(void)
{
#if CFG_TUD_ENABLED
tud_int_handler(0);
#endif
#if CFG_TUH_ENABLED
tuh_int_handler(0);
#endif
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
//--------------------------------------------------------------------+
#define LED_PORT 2
#define LED_PIN 19
#define BUTTON_PORT 2
#define BUTTON_PIN 10
/* System oscillator rate and RTC oscillator rate */
const uint32_t OscRateIn = 12000000;
const uint32_t RTCOscRateIn = 32768;
/* Pin muxing configuration */
static const PINMUX_GRP_T pinmuxing[] =
{
// LED
{2, 19, (IOCON_FUNC0 | IOCON_MODE_INACT)},
// Button
{2, 10, (IOCON_FUNC0 | IOCON_MODE_INACT | IOCON_MODE_PULLUP)},
};
static const PINMUX_GRP_T pin_usb_mux[] =
{
// USB1 as Host
{0, 29, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // D+1
{0, 30, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // D-1
{1, 18, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // UP LED1
{1, 19, (IOCON_FUNC2 | IOCON_MODE_INACT)}, // PPWR1
// {2, 14, (IOCON_FUNC2 | IOCON_MODE_INACT)}, // VBUS1
// {2, 15, (IOCON_FUNC2 | IOCON_MODE_INACT)}, // OVRCR1
// USB2 as Device
{0, 31, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // D+2
{0, 13, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // UP LED
{0, 14, (IOCON_FUNC3 | IOCON_MODE_INACT)}, // CONNECT2
/* VBUS is not connected on this board, so leave the pin at default setting. */
/*Chip_IOCON_PinMux(LPC_IOCON, 1, 30, IOCON_MODE_INACT, IOCON_FUNC2);*/ /* USB VBUS */
};
// Invoked by startup code
void SystemInit(void)
{
#ifdef __USE_LPCOPEN
extern void (* const g_pfnVectors[])(void);
unsigned int *pSCB_VTOR = (unsigned int *) 0xE000ED08;
*pSCB_VTOR = (unsigned int) g_pfnVectors;
#if __FPU_USED == 1
fpuInit();
#endif
#endif // __USE_LPCOPEN
Chip_IOCON_Init(LPC_IOCON);
Chip_IOCON_SetPinMuxing(LPC_IOCON, pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
/* CPU clock source starts with IRC */
/* Enable PBOOST for CPU clock over 100MHz */
Chip_SYSCTL_EnableBoost();
Chip_SetupXtalClocking();
}
void board_init(void)
{
SystemCoreClockUpdate();
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif
Chip_GPIO_Init(LPC_GPIO);
// LED
Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN);
// Button
Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN);
// UART
//------------- USB -------------//
Chip_IOCON_SetPinMuxing(LPC_IOCON, pin_usb_mux, sizeof(pin_usb_mux) / sizeof(PINMUX_GRP_T));
// Port1 as Host, Port2: Device
Chip_USB_Init();
enum {
USBCLK_DEVCIE = 0x12, // AHB + Device
USBCLK_HOST = 0x19 , // AHB + OTG + Host
USBCLK_ALL = 0x1B // Host + Device + OTG + AHB
};
LPC_USB->OTGClkCtrl = USBCLK_ALL;
while ( (LPC_USB->OTGClkSt & USBCLK_ALL) != USBCLK_ALL ) {}
// set portfunc: USB1 = host, USB2 = device
LPC_USB->StCtrl = 0x3;
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state)
{
Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state);
}
uint32_t board_button_read(void)
{
// active low
return Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
}
int board_uart_read(uint8_t* buf, int len)
{
//return UART_ReceiveByte(BOARD_UART_PORT);
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
//UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)
{
system_ticks++;
}
uint32_t board_millis(void)
{
return system_ticks;
}
#endif

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@ -0,0 +1,184 @@
/*
* GENERATED FILE - DO NOT EDIT
* (c) Code Red Technologies Ltd, 2008-2013
* (c) NXP Semiconductors 2013-2019
* Generated linker script file for LPC4088
* Created from linkscript.ldt by FMCreateLinkLibraries
* Using Freemarker v2.3.23
* MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 15, 2019 5:16:07 PM
*/
MEMORY
{
/* Define each memory region */
MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
RamLoc64 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x10000 /* 64K bytes (alias RAM) */
RamPeriph32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */
}
/* Define a symbol for the top of each memory region */
__base_MFlash512 = 0x0 ; /* MFlash512 */
__base_Flash = 0x0 ; /* Flash */
__top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */
__top_Flash = 0x0 + 0x80000 ; /* 512K bytes */
__base_RamLoc64 = 0x10000000 ; /* RamLoc64 */
__base_RAM = 0x10000000 ; /* RAM */
__top_RamLoc64 = 0x10000000 + 0x10000 ; /* 64K bytes */
__top_RAM = 0x10000000 + 0x10000 ; /* 64K bytes */
__base_RamPeriph32 = 0x20000000 ; /* RamPeriph32 */
__base_RAM2 = 0x20000000 ; /* RAM2 */
__top_RamPeriph32 = 0x20000000 + 0x8000 ; /* 32K bytes */
__top_RAM2 = 0x20000000 + 0x8000 ; /* 32K bytes */
ENTRY(ResetISR)
SECTIONS
{
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
__vectors_start__ = ABSOLUTE(.) ;
KEEP(*(.isr_vector))
/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data));
LONG( SIZEOF(.data));
LONG(LOADADDR(.data_RAM2));
LONG( ADDR(.data_RAM2));
LONG( SIZEOF(.data_RAM2));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
LONG( ADDR(.bss_RAM2));
LONG( SIZEOF(.bss_RAM2));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
} > MFlash512
.text : ALIGN(4)
{
*(.text*)
*(.rodata .rodata.* .constdata .constdata.*)
. = ALIGN(4);
} > MFlash512
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > MFlash512
__exidx_start = .;
.ARM.exidx : ALIGN(4)
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > MFlash512
__exidx_end = .;
_etext = .;
/* DATA section for RamPeriph32 */
.data_RAM2 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM2 = .) ;
*(.ramfunc.$RAM2)
*(.ramfunc.$RamPeriph32)
*(.data.$RAM2*)
*(.data.$RamPeriph32*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM2 = .) ;
} > RamPeriph32 AT>MFlash512
/* MAIN DATA SECTION */
.uninit_RESERVED : ALIGN(4)
{
KEEP(*(.bss.$RESERVED*))
. = ALIGN(4) ;
_end_uninit_RESERVED = .;
} > RamLoc64
/* Main DATA section (RamLoc64) */
.data : ALIGN(4)
{
FILL(0xff)
_data = . ;
*(vtable)
*(.ramfunc*)
*(.data*)
. = ALIGN(4) ;
_edata = . ;
} > RamLoc64 AT>MFlash512
/* BSS section for RamPeriph32 */
.bss_RAM2 : ALIGN(4)
{
PROVIDE(__start_bss_RAM2 = .) ;
*(.bss.$RAM2*)
*(.bss.$RamPeriph32*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM2 = .) ;
} > RamPeriph32
/* MAIN BSS SECTION */
.bss : ALIGN(4)
{
_bss = .;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(end = .);
} > RamLoc64
/* NOINIT section for RamPeriph32 */
.noinit_RAM2 (NOLOAD) : ALIGN(4)
{
*(.noinit.$RAM2*)
*(.noinit.$RamPeriph32*)
. = ALIGN(4) ;
} > RamPeriph32
/* DEFAULT NOINIT SECTION */
.noinit (NOLOAD): ALIGN(4)
{
_noinit = .;
*(.noinit*)
. = ALIGN(4) ;
_end_noinit = .;
} > RamLoc64
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc64 - 0);
/* ## Create checksum value (used in startup) ## */
PROVIDE(__valid_user_code_checksum = 0 -
(_vStackTop
+ (ResetISR + 1)
+ (NMI_Handler + 1)
+ (HardFault_Handler + 1)
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
) );
/* Provide basic symbols giving location and size of main text
* block, including initial values of RW data sections. Note that
* these will need extending to give a complete picture with
* complex images (e.g multiple Flash banks).
*/
_image_start = LOADADDR(.text);
_image_end = LOADADDR(.data) + SIZEOF(.data);
_image_size = _image_end - _image_start;
}

View File

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DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-nostdlib \
-DCORE_M4 \
-D__USE_LPCOPEN \
-DCFG_TUSB_MCU=OPT_MCU_LPC43XX
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter -Wno-error=strict-prototypes -Wno-error=cast-qual
MCU_DIR = hw/mcu/nxp/lpcopen/lpc43xx/lpc_chip_43xx
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/lpc4357.ld
SRC_C += \
src/portable/chipidea/ci_hs/dcd_ci_hs.c \
src/portable/chipidea/ci_hs/hcd_ci_hs.c \
src/portable/ehci/ehci.c \
$(MCU_DIR)/../gcc/cr_startup_lpc43xx.c \
$(MCU_DIR)/src/chip_18xx_43xx.c \
$(MCU_DIR)/src/clock_18xx_43xx.c \
$(MCU_DIR)/src/gpio_18xx_43xx.c \
$(MCU_DIR)/src/sysinit_18xx_43xx.c \
$(MCU_DIR)/src/i2c_18xx_43xx.c \
$(MCU_DIR)/src/i2cm_18xx_43xx.c \
$(MCU_DIR)/src/uart_18xx_43xx.c \
$(MCU_DIR)/src/fpu_init.c
INC += \
$(TOP)/$(MCU_DIR)/inc \
$(TOP)/$(MCU_DIR)/inc/config_43xx
# For freeRTOS port source
FREERTOS_PORT = ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = LPC4357_M4
# flash using jlink
flash: flash-jlink

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/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "chip.h"
#include "../board.h"
#include "pca9532.h"
#define UART_DEV LPC_USART0
#define UART_PORT 0x0f
#define UART_PIN_TX 10
#define UART_PIN_RX 11
// P9_1 joystick down
#define BUTTON_PORT 4
#define BUTTON_PIN 13
//static const struct {
// uint8_t mux_port;
// uint8_t mux_pin;
//
// uint8_t gpio_port;
// uint8_t gpio_pin;
//}buttons[] =
//{
// {0x0a, 3, 4, 10 }, // Joystick up
// {0x09, 1, 4, 13 }, // Joystick down
// {0x0a, 2, 4, 9 }, // Joystick left
// {0x09, 0, 4, 12 }, // Joystick right
// {0x0a, 1, 4, 8 }, // Joystick press
// {0x02, 7, 0, 7 }, // SW6
//};
#ifdef BOARD_TUD_RHPORT
#define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n)
#else
#define PORT_SUPPORT_DEVICE(_n) 0
#endif
#ifdef BOARD_TUH_RHPORT
#define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n)
#else
#define PORT_SUPPORT_HOST(_n) 0
#endif
/*------------------------------------------------------------------*/
/* BOARD API
*------------------------------------------------------------------*/
/* System configuration variables used by chip driver */
const uint32_t OscRateIn = 12000000;
const uint32_t ExtRateIn = 0;
static const PINMUX_GRP_T pinmuxing[] =
{
// Button ( Joystick down )
{0x9, 1, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC0 | SCU_MODE_PULLUP)},
// UART
{UART_PORT, UART_PIN_TX, SCU_MODE_PULLDOWN | SCU_MODE_FUNC1},
{UART_PORT, UART_PIN_RX, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC1},
// USB
};
/* Pin clock mux values, re-used structure, value in first index is meaningless */
static const PINMUX_GRP_T pinclockmuxing[] =
{
{0, 0, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
{0, 1, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
{0, 2, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
{0, 3, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
};
// Invoked by startup code
void SystemInit(void)
{
#ifdef __USE_LPCOPEN
extern void (* const g_pfnVectors[])(void);
unsigned int *pSCB_VTOR = (unsigned int *) 0xE000ED08;
*pSCB_VTOR = (unsigned int) g_pfnVectors;
#if __FPU_USED == 1
fpuInit();
#endif
#endif // __USE_LPCOPEN
/* Setup system level pin muxing */
Chip_SCU_SetPinMuxing(pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
/* Clock pins only, group field not used */
for (int i = 0; i <(int) (sizeof(pinclockmuxing) / sizeof(pinclockmuxing[0])); i++)
{
Chip_SCU_ClockPinMuxSet(pinclockmuxing[i].pinnum, pinclockmuxing[i].modefunc);
}
Chip_SetupXtalClocking();
}
void board_init(void)
{
SystemCoreClockUpdate();
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif
Chip_GPIO_Init(LPC_GPIO_PORT);
// LED via pca9532 I2C
Chip_SCU_I2C0PinConfig(I2C0_STANDARD_FAST_MODE);
Chip_I2C_Init(I2C0);
Chip_I2C_SetClockRate(I2C0, 100000);
Chip_I2C_SetMasterEventHandler(I2C0, Chip_I2C_EventHandlerPolling);
pca9532_init();
// Button
Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN);
//------------- UART -------------//
Chip_UART_Init(UART_DEV);
Chip_UART_SetBaud(UART_DEV, CFG_BOARD_UART_BAUDRATE);
Chip_UART_ConfigData(UART_DEV, UART_LCR_WLEN8 | UART_LCR_SBS_1BIT | UART_LCR_PARITY_DIS);
Chip_UART_TXEnable(UART_DEV);
//------------- USB -------------//
enum {
USBMODE_DEVICE = 2,
USBMODE_HOST = 3
};
enum {
USBMODE_VBUS_LOW = 0,
USBMODE_VBUS_HIGH = 1
};
/* From EA4357 user manual
*
* USB0 Device operation:
* - Insert jumpers in position 1-2 in JP17/JP18/JP19.
* - GPIO28 controls USB connect functionality
* - LED32 lights when the USB Device is connected. SJ4 has pads 1-2 shorted by default.
* - LED33 is controlled by GPIO27 and signals USB-up state. GPIO54 is used for VBUS
* sensing.
*
* USB0 Host operation:
* - insert jumpers in position 2-3 in JP17/JP18/JP19.
* - USB Host power is controlled via distribution switch U20 (found in schematic page 11).
* - Signal GPIO26 is active low and enables +5V on VBUS2.
* - LED35 light whenever +5V is present on VBUS2.
* - GPIO55 is connected to status feedback from the distribution switch.
* - GPIO54 is used for VBUS sensing. 15Kohm pull-down resistors are always active
*
* Note:
* - Insert jumpers in position 2-3 in JP17/JP18/JP19
* - Insert jumpers in JP31 (OTG)
*/
#if PORT_SUPPORT_DEVICE(0) || PORT_SUPPORT_HOST(0)
Chip_USB0_Init();
#endif
/* From EA4357 user manual
*
* For USB1 Device:
* - a 1.5Kohm pull-up resistor is needed on the USB DP data signal. There are two methods to create this.
* JP15 is inserted and the pull-up resistor is always enabled. Alternatively, the pull-up resistor is activated
* inside the USB OTG chip (U31), and this has to be done via the I2C interface of GPIO52/GPIO53. In the latter case,
* JP15 shall not be inserted.
* - J19 is the connector to use when USB Device is used. Normally it should be a USB-B connector for
* creating a USB Device interface, but the mini-AB connector can also be used in this case. The status
* of VBUS can be read via U31.
* - JP16 shall not be inserted.
*
* For USB1 Host:
* - 15Kohm pull-down resistors are needed on the USB data signals. These are activated inside the USB OTG chip (U31),
* and this has to be done via the I2C interface of GPIO52/GPIO53.
* - J20 is the connector to use when USB Host is used. In order to provide +5V to the external USB
* device connected to this connector (J20), channel A of U20 must be enabled. It is enabled by default
* since SJ5 is normally connected between pin 1-2.
* - LED34 lights green when +5V is available on J20.
* - JP15 shall not be inserted. JP16 has no effect
*/
#if PORT_SUPPORT_DEVICE(1) || PORT_SUPPORT_HOST(1)
Chip_USB1_Init();
#endif
// USB0 Vbus Power: P2_3 on EA4357 channel B U20 GPIO26 active low (base board)
Chip_SCU_PinMuxSet(2, 3, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC7);
#if PORT_SUPPORT_DEVICE(0)
// P9_5 (GPIO5[18]) (GPIO28 on oem base) as USB connect, active low.
Chip_SCU_PinMuxSet(9, 5, SCU_MODE_PULLDOWN | SCU_MODE_FUNC4);
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 5, 18);
#endif
// USB1 Power: EA4357 channel A U20 is enabled by SJ5 connected to pad 1-2, no more action required
// TODO Remove R170, R171, solder a pair of 15K to USB1 D+/D- to test with USB1 Host
}
//--------------------------------------------------------------------+
// USB Interrupt Handler
//--------------------------------------------------------------------+
void USB0_IRQHandler(void)
{
#if PORT_SUPPORT_DEVICE(0)
tud_int_handler(0);
#endif
#if PORT_SUPPORT_HOST(0)
tuh_int_handler(0);
#endif
}
void USB1_IRQHandler(void)
{
#if PORT_SUPPORT_DEVICE(1)
tud_int_handler(1);
#endif
#if PORT_SUPPORT_HOST(1)
tuh_int_handler(1);
#endif
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state)
{
if (state)
{
pca9532_setLeds( LED1, 0 );
}else
{
pca9532_setLeds( 0, LED1);
}
}
uint32_t board_button_read(void)
{
// active low
return Chip_GPIO_GetPinState(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
}
int board_uart_read(uint8_t* buf, int len)
{
return Chip_UART_Read(UART_DEV, buf, len);
}
int board_uart_write(void const * buf, int len)
{
uint8_t const* buf8 = (uint8_t const*) buf;
for(int i=0; i<len; i++)
{
while ((Chip_UART_ReadLineStatus(UART_DEV) & UART_LSR_THRE) == 0) {}
Chip_UART_SendByte(UART_DEV, buf8[i]);
}
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)
{
system_ticks++;
}
uint32_t board_millis(void)
{
return system_ticks;
}
#endif

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@ -0,0 +1,324 @@
/*
* GENERATED FILE - DO NOT EDIT
* (c) Code Red Technologies Ltd, 2008-2013
* (c) NXP Semiconductors 2013-2019
* Generated linker script file for LPC4357
* Created from linkscript.ldt by FMCreateLinkLibraries
* Using Freemarker v2.3.23
* MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 15, 2019 5:48:43 PM
*/
MEMORY
{
/* Define each memory region */
MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */
RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */
RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */
RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */
RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */
}
/* Define a symbol for the top of each memory region */
__base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */
__base_Flash = 0x1a000000 ; /* Flash */
__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */
__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */
__base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */
__base_Flash2 = 0x1b000000 ; /* Flash2 */
__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */
__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */
__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */
__base_RAM = 0x10000000 ; /* RAM */
__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
__base_RamLoc40 = 0x10080000 ; /* RamLoc40 */
__base_RAM2 = 0x10080000 ; /* RAM2 */
__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */
__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */
__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */
__base_RAM3 = 0x20000000 ; /* RAM3 */
__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */
__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */
__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */
__base_RAM4 = 0x20008000 ; /* RAM4 */
__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */
__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */
__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */
__base_RAM5 = 0x2000c000 ; /* RAM5 */
__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */
__top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */
ENTRY(ResetISR)
SECTIONS
{
.text_Flash2 : ALIGN(4)
{
FILL(0xff)
*(.text_Flash2*) /* for compatibility with previous releases */
*(.text_MFlashB512*) /* for compatibility with previous releases */
*(.text.$Flash2*)
*(.text.$MFlashB512*)
*(.rodata.$Flash2*)
*(.rodata.$MFlashB512*)
} > MFlashB512
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
__vectors_start__ = ABSOLUTE(.) ;
KEEP(*(.isr_vector))
/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data));
LONG( SIZEOF(.data));
LONG(LOADADDR(.data_RAM2));
LONG( ADDR(.data_RAM2));
LONG( SIZEOF(.data_RAM2));
LONG(LOADADDR(.data_RAM3));
LONG( ADDR(.data_RAM3));
LONG( SIZEOF(.data_RAM3));
LONG(LOADADDR(.data_RAM4));
LONG( ADDR(.data_RAM4));
LONG( SIZEOF(.data_RAM4));
LONG(LOADADDR(.data_RAM5));
LONG( ADDR(.data_RAM5));
LONG( SIZEOF(.data_RAM5));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
LONG( ADDR(.bss_RAM2));
LONG( SIZEOF(.bss_RAM2));
LONG( ADDR(.bss_RAM3));
LONG( SIZEOF(.bss_RAM3));
LONG( ADDR(.bss_RAM4));
LONG( SIZEOF(.bss_RAM4));
LONG( ADDR(.bss_RAM5));
LONG( SIZEOF(.bss_RAM5));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
} > MFlashA512
.text : ALIGN(4)
{
*(.text*)
*(.rodata .rodata.* .constdata .constdata.*)
. = ALIGN(4);
} > MFlashA512
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > MFlashA512
__exidx_start = .;
.ARM.exidx : ALIGN(4)
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > MFlashA512
__exidx_end = .;
_etext = .;
/* DATA section for RamLoc40 */
.data_RAM2 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM2 = .) ;
*(.ramfunc.$RAM2)
*(.ramfunc.$RamLoc40)
*(.data.$RAM2*)
*(.data.$RamLoc40*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM2 = .) ;
} > RamLoc40 AT>MFlashA512
/* DATA section for RamAHB32 */
.data_RAM3 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM3 = .) ;
*(.ramfunc.$RAM3)
*(.ramfunc.$RamAHB32)
*(.data.$RAM3*)
*(.data.$RamAHB32*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM3 = .) ;
} > RamAHB32 AT>MFlashA512
/* DATA section for RamAHB16 */
.data_RAM4 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM4 = .) ;
*(.ramfunc.$RAM4)
*(.ramfunc.$RamAHB16)
*(.data.$RAM4*)
*(.data.$RamAHB16*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM4 = .) ;
} > RamAHB16 AT>MFlashA512
/* DATA section for RamAHB_ETB16 */
.data_RAM5 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM5 = .) ;
*(.ramfunc.$RAM5)
*(.ramfunc.$RamAHB_ETB16)
*(.data.$RAM5*)
*(.data.$RamAHB_ETB16*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM5 = .) ;
} > RamAHB_ETB16 AT>MFlashA512
/* MAIN DATA SECTION */
.uninit_RESERVED : ALIGN(4)
{
KEEP(*(.bss.$RESERVED*))
. = ALIGN(4) ;
_end_uninit_RESERVED = .;
} > RamLoc32
/* Main DATA section (RamLoc32) */
.data : ALIGN(4)
{
FILL(0xff)
_data = . ;
*(vtable)
*(.ramfunc*)
*(.data*)
. = ALIGN(4) ;
_edata = . ;
} > RamLoc32 AT>MFlashA512
/* BSS section for RamLoc40 */
.bss_RAM2 : ALIGN(4)
{
PROVIDE(__start_bss_RAM2 = .) ;
*(.bss.$RAM2*)
*(.bss.$RamLoc40*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM2 = .) ;
} > RamLoc40
/* BSS section for RamAHB32 */
.bss_RAM3 : ALIGN(4)
{
PROVIDE(__start_bss_RAM3 = .) ;
*(.bss.$RAM3*)
*(.bss.$RamAHB32*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM3 = .) ;
} > RamAHB32
/* BSS section for RamAHB16 */
.bss_RAM4 : ALIGN(4)
{
PROVIDE(__start_bss_RAM4 = .) ;
*(.bss.$RAM4*)
*(.bss.$RamAHB16*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM4 = .) ;
} > RamAHB16
/* BSS section for RamAHB_ETB16 */
.bss_RAM5 : ALIGN(4)
{
PROVIDE(__start_bss_RAM5 = .) ;
*(.bss.$RAM5*)
*(.bss.$RamAHB_ETB16*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM5 = .) ;
} > RamAHB_ETB16
/* MAIN BSS SECTION */
.bss : ALIGN(4)
{
_bss = .;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(end = .);
} > RamLoc32
/* NOINIT section for RamLoc40 */
.noinit_RAM2 (NOLOAD) : ALIGN(4)
{
*(.noinit.$RAM2*)
*(.noinit.$RamLoc40*)
. = ALIGN(4) ;
} > RamLoc40
/* NOINIT section for RamAHB32 */
.noinit_RAM3 (NOLOAD) : ALIGN(4)
{
*(.noinit.$RAM3*)
*(.noinit.$RamAHB32*)
. = ALIGN(4) ;
} > RamAHB32
/* NOINIT section for RamAHB16 */
.noinit_RAM4 (NOLOAD) : ALIGN(4)
{
*(.noinit.$RAM4*)
*(.noinit.$RamAHB16*)
. = ALIGN(4) ;
} > RamAHB16
/* NOINIT section for RamAHB_ETB16 */
.noinit_RAM5 (NOLOAD) : ALIGN(4)
{
*(.noinit.$RAM5*)
*(.noinit.$RamAHB_ETB16*)
. = ALIGN(4) ;
} > RamAHB_ETB16
/* DEFAULT NOINIT SECTION */
.noinit (NOLOAD): ALIGN(4)
{
_noinit = .;
*(.noinit*)
. = ALIGN(4) ;
_end_noinit = .;
} > RamLoc32
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
/* ## Create checksum value (used in startup) ## */
PROVIDE(__valid_user_code_checksum = 0 -
(_vStackTop
+ (ResetISR + 1)
+ (NMI_Handler + 1)
+ (HardFault_Handler + 1)
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
) );
/* Provide basic symbols giving location and size of main text
* block, including initial values of RW data sections. Note that
* these will need extending to give a complete picture with
* complex images (e.g multiple Flash banks).
*/
_image_start = LOADADDR(.text);
_image_end = LOADADDR(.data) + SIZEOF(.data);
_image_size = _image_end - _image_start;
}

View File

@ -0,0 +1,352 @@
/*****************************************************************************
*
* Copyright(C) 2011, Embedded Artists AB
* All rights reserved.
*
******************************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* Embedded Artists AB assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. Embedded Artists AB
* reserves the right to make changes in the software without
* notification. Embedded Artists AB also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
*****************************************************************************/
/*
* NOTE: I2C must have been initialized before calling any functions in this
* file.
*/
/******************************************************************************
* Includes
*****************************************************************************/
//#include "board.h"
#include "chip.h"
#include "pca9532.h"
/******************************************************************************
* Defines and typedefs
*****************************************************************************/
#define I2C_PORT (LPC_I2C0)
#define LS_MODE_ON 0x01
#define LS_MODE_BLINK0 0x02
#define LS_MODE_BLINK1 0x03
/******************************************************************************
* External global variables
*****************************************************************************/
/******************************************************************************
* Local variables
*****************************************************************************/
static uint16_t blink0Shadow = 0;
static uint16_t blink1Shadow = 0;
static uint16_t ledStateShadow = 0;
/******************************************************************************
* Local Functions
*****************************************************************************/
static Status I2CWrite(uint32_t addr, uint8_t* buf, uint32_t len)
{
I2CM_XFER_T i2cData;
i2cData.slaveAddr = addr;
i2cData.options = 0;
i2cData.status = 0;
i2cData.txBuff = buf;
i2cData.txSz = len;
i2cData.rxBuff = NULL;
i2cData.rxSz = 0;
if (Chip_I2CM_XferBlocking(LPC_I2C0, &i2cData) == 0) {
return ERROR;
}
return SUCCESS;
}
static Status I2CRead(uint32_t addr, uint8_t* buf, uint32_t len)
{
I2CM_XFER_T i2cData;
i2cData.slaveAddr = addr;
i2cData.options = 0;
i2cData.status = 0;
i2cData.txBuff = NULL;
i2cData.txSz = 0;
i2cData.rxBuff = buf;
i2cData.rxSz = len;
if (Chip_I2CM_XferBlocking(LPC_I2C0, &i2cData) == 0) {
return ERROR;
}
return SUCCESS;
}
static void setLsStates(uint16_t states, uint8_t* ls, uint8_t mode)
{
#define IS_LED_SET(bit, x) ( ( ((x) & (bit)) != 0 ) ? 1 : 0 )
int i = 0;
for (i = 0; i < 4; i++) {
ls[i] |= ( (IS_LED_SET(0x0001, states)*mode << 0)
| (IS_LED_SET(0x0002, states)*mode << 2)
| (IS_LED_SET(0x0004, states)*mode << 4)
| (IS_LED_SET(0x0008, states)*mode << 6) );
states >>= 4;
}
}
static void setLeds(void)
{
uint8_t buf[5];
uint8_t ls[4] = {0,0,0,0};
uint16_t states = ledStateShadow;
/* LEDs in On/Off state */
setLsStates(states, ls, LS_MODE_ON);
/* set the LEDs that should blink */
setLsStates(blink0Shadow, ls, LS_MODE_BLINK0);
setLsStates(blink1Shadow, ls, LS_MODE_BLINK1);
buf[0] = PCA9532_LS0 | PCA9532_AUTO_INC;
buf[1] = ls[0];
buf[2] = ls[1];
buf[3] = ls[2];
buf[4] = ls[3];
I2CWrite(PCA9532_I2C_ADDR, buf, 5);
}
/******************************************************************************
* Public Functions
*****************************************************************************/
/******************************************************************************
*
* Description:
* Initialize the PCA9532 Device
*
*****************************************************************************/
void pca9532_init (void)
{
/* nothing to initialize */
}
/******************************************************************************
*
* Description:
* Get the LED states
*
* Params:
* [in] shadow - TRUE if the states should be retrieved from the shadow
* variables. The shadow variable are updated when any
* of setLeds, setBlink0Leds and/or setBlink1Leds are
* called.
*
* FALSE if the state should be retrieved from the PCA9532
* device. A blinkin LED may be reported as on or off
* depending on the state when calling the function.
*
* Returns:
* A mask where a 1 indicates that a LED is on (or blinking).
*
*****************************************************************************/
uint16_t pca9532_getLedState (uint32_t shadow)
{
uint8_t buf[2];
uint16_t ret = 0;
if (shadow) {
/* a blink LED is reported as on*/
ret = (ledStateShadow | blink0Shadow | blink1Shadow);
}
else {
/*
* A blinking LED may be reported as on or off depending on
* its state when reading the Input register.
*/
buf[0] = PCA9532_INPUT0;
I2CWrite(PCA9532_I2C_ADDR, buf, 1);
I2CRead(PCA9532_I2C_ADDR, buf, 1);
ret = buf[0];
buf[0] = PCA9532_INPUT1;
I2CWrite(PCA9532_I2C_ADDR, buf, 1);
I2CRead(PCA9532_I2C_ADDR, buf, 1);
ret |= (buf[0] << 8);
/* invert since LEDs are active low */
ret = ((~ret) & 0xFFFF);
}
return (ret & ~PCA9532_NOT_USED);
}
/******************************************************************************
*
* Description:
* Set LED states (on or off).
*
* Params:
* [in] ledOnMask - The LEDs that should be turned on. This mask has
* priority over ledOffMask
* [in] ledOffMask - The LEDs that should be turned off.
*
*****************************************************************************/
void pca9532_setLeds (uint16_t ledOnMask, uint16_t ledOffMask)
{
/* turn off leds */
ledStateShadow &= (~(ledOffMask) & 0xffff);
/* ledOnMask has priority over ledOffMask */
ledStateShadow |= ledOnMask;
/* turn off blinking */
blink0Shadow &= (~(ledOffMask) & 0xffff);
blink1Shadow &= (~(ledOffMask) & 0xffff);
setLeds();
}
/******************************************************************************
*
* Description:
* Set the blink period for PWM0. Valid values are 0 - 255 where 0
* means 152 Hz and 255 means 0.59 Hz. A value of 151 means 1 Hz.
*
* Params:
* [in] period - the period for pwm0
*
*****************************************************************************/
void pca9532_setBlink0Period(uint8_t period)
{
uint8_t buf[2];
buf[0] = PCA9532_PSC0;
buf[1] = period;
I2CWrite(PCA9532_I2C_ADDR, buf, 2);
}
/******************************************************************************
*
* Description:
* Set the duty cycle for PWM0. Valid values are 0 - 100. 25 means the LED
* is on 25% of the period.
*
* Params:
* [in] duty - duty cycle
*
*****************************************************************************/
void pca9532_setBlink0Duty(uint8_t duty)
{
uint8_t buf[2];
uint32_t tmp = duty;
if (tmp > 100) {
tmp = 100;
}
tmp = (256 * tmp)/100;
buf[0] = PCA9532_PWM0;
buf[1] = tmp;
I2CWrite(PCA9532_I2C_ADDR, buf, 2);
}
/******************************************************************************
*
* Description:
* Set the LEDs that should blink with rate and duty cycle from PWM0.
* Blinking is turned off with pca9532_setLeds.
*
* Params:
* [in] ledMask - LEDs that should blink.
*
*****************************************************************************/
void pca9532_setBlink0Leds(uint16_t ledMask)
{
blink0Shadow |= ledMask;
setLeds();
}
/******************************************************************************
*
* Description:
* Set the blink period for PWM1. Valid values are 0 - 255 where 0
* means 152 Hz and 255 means 0.59 Hz. A value of 151 means 1 Hz.
*
* Params:
* [in] period - The period for PWM1
*
*****************************************************************************/
void pca9532_setBlink1Period(uint8_t period)
{
uint8_t buf[2];
buf[0] = PCA9532_PSC1;
buf[1] = period;
I2CWrite(PCA9532_I2C_ADDR, buf, 2);
}
/******************************************************************************
*
* Description:
* Set the duty cycle for PWM1. Valid values are 0 - 100. 25 means the LED
* is on 25% of the period.
*
* Params:
* [in] duty - duty cycle.
*
*****************************************************************************/
void pca9532_setBlink1Duty(uint8_t duty)
{
uint8_t buf[2];
uint32_t tmp = duty;
if (tmp > 100) {
tmp = 100;
}
tmp = (256 * tmp)/100;
buf[0] = PCA9532_PWM1;
buf[1] = tmp;
I2CWrite(PCA9532_I2C_ADDR, buf, 2);
}
/******************************************************************************
*
* Description:
* Set the LEDs that should blink with rate and duty cycle from PWM1.
* Blinking is turned off with pca9532_setLeds.
*
* Params:
* [in] ledMask - LEDs that should blink.
*
*****************************************************************************/
void pca9532_setBlink1Leds(uint16_t ledMask)
{
blink1Shadow |= ledMask;
setLeds();
}

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/*****************************************************************************
*
* Copyright(C) 2011, Embedded Artists AB
* All rights reserved.
*
******************************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* Embedded Artists AB assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. Embedded Artists AB
* reserves the right to make changes in the software without
* notification. Embedded Artists AB also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
*****************************************************************************/
#ifndef __PCA9532C_H
#define __PCA9532C_H
#define PCA9532_I2C_ADDR (0xC0>>1)
#define PCA9532_INPUT0 0x00
#define PCA9532_INPUT1 0x01
#define PCA9532_PSC0 0x02
#define PCA9532_PWM0 0x03
#define PCA9532_PSC1 0x04
#define PCA9532_PWM1 0x05
#define PCA9532_LS0 0x06
#define PCA9532_LS1 0x07
#define PCA9532_LS2 0x08
#define PCA9532_LS3 0x09
#define PCA9532_AUTO_INC 0x10
/*
* The Keys on the base board are mapped to LED0 -> LED3 on
* the PCA9532.
*/
#define KEY1 0x0001
#define KEY2 0x0002
#define KEY3 0x0004
#define KEY4 0x0008
#define KEY_MASK 0x000F
/*
* MMC Card Detect and MMC Write Protect are mapped to LED4
* and LED5 on the PCA9532. Please note that WP is active low.
*/
#define MMC_CD 0x0010
#define MMC_WP 0x0020
#define MMC_MASK 0x30
/* NOTE: LED6 and LED7 on PCA9532 are not connected to anything */
#define PCA9532_NOT_USED 0xC0
/*
* Below are the LED constants to use when enabling/disabling a LED.
* The LED names are the names printed on the base board and not
* the names from the PCA9532 device. base_LED1 -> LED8 on PCA9532,
* base_LED2 -> LED9, and so on.
*/
#define LED1 0x0100
#define LED2 0x0200
#define LED3 0x0400
#define LED4 0x0800
#define LED5 0x1000
#define LED6 0x2000
#define LED7 0x4000
#define LED8 0x8000
#define LED_MASK 0xFF00
void pca9532_init (void);
uint16_t pca9532_getLedState (uint32_t shadow);
void pca9532_setLeds (uint16_t ledOnMask, uint16_t ledOffMask);
void pca9532_setBlink0Period(uint8_t period);
void pca9532_setBlink0Duty(uint8_t duty);
void pca9532_setBlink0Leds(uint16_t ledMask);
void pca9532_setBlink1Period(uint8_t period);
void pca9532_setBlink1Duty(uint8_t duty);
void pca9532_setBlink1Leds(uint16_t ledMask);
#endif /* end __PCA9532C_H */
/****************************************************************************
** End Of File
*****************************************************************************/

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idf_component_register(SRCS esp32s2.c
INCLUDE_DIRS "." "${BOARD}"
PRIV_REQUIRES "driver"
REQUIRES freertos src led_strip)
# Apply board specific content
include("${BOARD}/board.cmake")
target_include_directories(${COMPONENT_TARGET} PUBLIC
"${TOP}/hw"
"${TOP}/src"
)

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# Apply board specific content here
target_include_directories(${COMPONENT_LIB} PRIVATE .)
idf_build_get_property(idf_target IDF_TARGET)
message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}")
if(NOT ${idf_target} STREQUAL "esp32s2")
message(FATAL_ERROR "Incorrect target for board ${BOARD}: $ENV{IDF_TARGET}(${idf_target}), try to clean the build first." )
endif()
set(IDF_TARGET "esp32s2" FORCE)
target_compile_options(${COMPONENT_TARGET} PUBLIC
"-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
"-DCFG_TUSB_OS=OPT_OS_FREERTOS"
)

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#define NEOPIXEL_PIN 33
#define NEOPIXEL_POWER_PIN 21
#define NEOPIXEL_POWER_STATE 1
#define BUTTON_PIN 0
#define BUTTON_STATE_ACTIVE 0
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

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# Apply board specific content here
target_include_directories(${COMPONENT_LIB} PRIVATE .)
idf_build_get_property(idf_target IDF_TARGET)
message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}")
if(NOT ${idf_target} STREQUAL "esp32s2")
message(FATAL_ERROR "Incorrect target for board ${BOARD}: $ENV{IDF_TARGET}(${idf_target}), try to clean the build first." )
endif()
set(IDF_TARGET "esp32s2" FORCE)
target_compile_options(${COMPONENT_TARGET} PUBLIC
"-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
"-DCFG_TUSB_OS=OPT_OS_FREERTOS"
)

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#define NEOPIXEL_PIN 1
#define NEOPIXEL_POWER_PIN 21
#define NEOPIXEL_POWER_STATE 0
#define BUTTON_PIN 0
#define BUTTON_STATE_ACTIVE 0
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

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# Apply board specific content here
target_include_directories(${COMPONENT_LIB} PRIVATE .)
idf_build_get_property(idf_target IDF_TARGET)
message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}")
if(NOT ${idf_target} STREQUAL "esp32s2")
message(FATAL_ERROR "Incorrect target for board ${BOARD}: (${idf_target}), try to clean the build first." )
endif()
set(IDF_TARGET "esp32s2" FORCE)
target_compile_options(${COMPONENT_TARGET} PUBLIC
"-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
"-DCFG_TUSB_OS=OPT_OS_FREERTOS"
)

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#define NEOPIXEL_PIN 45
#define BUTTON_PIN 0
#define BUTTON_STATE_ACTIVE 0
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "../../board.h"
#include "board.h"
#include "esp_rom_gpio.h"
#include "hal/gpio_ll.h"
#include "hal/usb_hal.h"
#include "soc/usb_periph.h"
#include "driver/rmt.h"
#if ESP_IDF_VERSION_MAJOR > 4
#include "esp_private/periph_ctrl.h"
#else
#include "driver/periph_ctrl.h"
#endif
#ifdef NEOPIXEL_PIN
#include "led_strip.h"
static led_strip_t *strip;
#endif
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
//--------------------------------------------------------------------+
static void configure_pins(usb_hal_context_t *usb);
// Initialize on-board peripherals : led, button, uart and USB
void board_init(void)
{
#ifdef NEOPIXEL_PIN
#ifdef NEOPIXEL_POWER_PIN
gpio_reset_pin(NEOPIXEL_POWER_PIN);
gpio_set_direction(NEOPIXEL_POWER_PIN, GPIO_MODE_OUTPUT);
gpio_set_level(NEOPIXEL_POWER_PIN, NEOPIXEL_POWER_STATE);
#endif
// WS2812 Neopixel driver with RMT peripheral
rmt_config_t config = RMT_DEFAULT_CONFIG_TX(NEOPIXEL_PIN, RMT_CHANNEL_0);
config.clk_div = 2; // set counter clock to 40MHz
rmt_config(&config);
rmt_driver_install(config.channel, 0, 0);
led_strip_config_t strip_config = LED_STRIP_DEFAULT_CONFIG(1, (led_strip_dev_t) config.channel);
strip = led_strip_new_rmt_ws2812(&strip_config);
strip->clear(strip, 100); // off led
#endif
// Button
esp_rom_gpio_pad_select_gpio(BUTTON_PIN);
gpio_set_direction(BUTTON_PIN, GPIO_MODE_INPUT);
gpio_set_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN_ONLY : GPIO_PULLUP_ONLY);
// USB Controller Hal init
periph_module_reset(PERIPH_USB_MODULE);
periph_module_enable(PERIPH_USB_MODULE);
usb_hal_context_t hal = {
.use_external_phy = false // use built-in PHY
};
usb_hal_init(&hal);
configure_pins(&hal);
}
static void configure_pins(usb_hal_context_t *usb)
{
/* usb_periph_iopins currently configures USB_OTG as USB Device.
* Introduce additional parameters in usb_hal_context_t when adding support
* for USB Host.
*/
for (const usb_iopin_dsc_t *iopin = usb_periph_iopins; iopin->pin != -1; ++iopin) {
if ((usb->use_external_phy) || (iopin->ext_phy_only == 0)) {
esp_rom_gpio_pad_select_gpio(iopin->pin);
if (iopin->is_output) {
esp_rom_gpio_connect_out_signal(iopin->pin, iopin->func, false, false);
} else {
esp_rom_gpio_connect_in_signal(iopin->pin, iopin->func, false);
#if ESP_IDF_VERSION_MAJOR > 4
if ((iopin->pin != GPIO_MATRIX_CONST_ZERO_INPUT) && (iopin->pin != GPIO_MATRIX_CONST_ONE_INPUT))
#else
if ((iopin->pin != GPIO_FUNC_IN_LOW) && (iopin->pin != GPIO_FUNC_IN_HIGH))
#endif
{
gpio_ll_input_enable(&GPIO, iopin->pin);
}
}
esp_rom_gpio_pad_unhold(iopin->pin);
}
}
if (!usb->use_external_phy) {
gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3);
gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3);
}
}
// Turn LED on or off
void board_led_write(bool state)
{
#ifdef NEOPIXEL_PIN
strip->set_pixel(strip, 0, (state ? 0x88 : 0x00), 0x00, 0x00);
strip->refresh(strip, 100);
#endif
}
// Get the current state of button
// a '1' means active (pressed), a '0' means inactive.
uint32_t board_button_read(void)
{
return gpio_get_level(BUTTON_PIN) == BUTTON_STATE_ACTIVE;
}
// Get characters from UART
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
// Send characters to UART
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}

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# Apply board specific content here
target_include_directories(${COMPONENT_LIB} PRIVATE .)
idf_build_get_property(idf_target IDF_TARGET)
message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}")
if(NOT ${idf_target} STREQUAL "esp32s2")
message(FATAL_ERROR "Incorrect target for board ${BOARD}: (${idf_target}), try to clean the build first." )
endif()
set(IDF_TARGET "esp32s2" FORCE)
target_compile_options(${COMPONENT_TARGET} PUBLIC
"-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
"-DCFG_TUSB_OS=OPT_OS_FREERTOS"
)

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
// Note: need to insert jumper next to WS2812 pixel
#define NEOPIXEL_PIN 45
#define BUTTON_PIN 0
#define BUTTON_STATE_ACTIVE 0
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

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# Apply board specific content here
target_include_directories(${COMPONENT_LIB} PRIVATE .)
idf_build_get_property(idf_target IDF_TARGET)
message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}")
if(NOT ${idf_target} STREQUAL "esp32s2")
message(FATAL_ERROR "Incorrect target for board ${BOARD}: (${idf_target}), try to clean the build first." )
endif()
set(IDF_TARGET "esp32s2" FORCE)
target_compile_options(${COMPONENT_TARGET} PUBLIC
"-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
"-DCFG_TUSB_OS=OPT_OS_FREERTOS"
)

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
// Note: On the production version (v1.2) WS2812 is connected to GPIO 18,
// however earlier revision v1.1 WS2812 is connected to GPIO 17
#define NEOPIXEL_PIN 18
#define BUTTON_PIN 0
#define BUTTON_STATE_ACTIVE 0
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

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set(component_srcs "src/led_strip_rmt_ws2812.c")
idf_component_register(SRCS "${component_srcs}"
INCLUDE_DIRS "include"
PRIV_INCLUDE_DIRS ""
PRIV_REQUIRES "driver"
REQUIRES "")

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// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include "esp_err.h"
/**
* @brief LED Strip Type
*
*/
typedef struct led_strip_s led_strip_t;
/**
* @brief LED Strip Device Type
*
*/
typedef void *led_strip_dev_t;
/**
* @brief Declare of LED Strip Type
*
*/
struct led_strip_s {
/**
* @brief Set RGB for a specific pixel
*
* @param strip: LED strip
* @param index: index of pixel to set
* @param red: red part of color
* @param green: green part of color
* @param blue: blue part of color
*
* @return
* - ESP_OK: Set RGB for a specific pixel successfully
* - ESP_ERR_INVALID_ARG: Set RGB for a specific pixel failed because of invalid parameters
* - ESP_FAIL: Set RGB for a specific pixel failed because other error occurred
*/
esp_err_t (*set_pixel)(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue);
/**
* @brief Refresh memory colors to LEDs
*
* @param strip: LED strip
* @param timeout_ms: timeout value for refreshing task
*
* @return
* - ESP_OK: Refresh successfully
* - ESP_ERR_TIMEOUT: Refresh failed because of timeout
* - ESP_FAIL: Refresh failed because some other error occurred
*
* @note:
* After updating the LED colors in the memory, a following invocation of this API is needed to flush colors to strip.
*/
esp_err_t (*refresh)(led_strip_t *strip, uint32_t timeout_ms);
/**
* @brief Clear LED strip (turn off all LEDs)
*
* @param strip: LED strip
* @param timeout_ms: timeout value for clearing task
*
* @return
* - ESP_OK: Clear LEDs successfully
* - ESP_ERR_TIMEOUT: Clear LEDs failed because of timeout
* - ESP_FAIL: Clear LEDs failed because some other error occurred
*/
esp_err_t (*clear)(led_strip_t *strip, uint32_t timeout_ms);
/**
* @brief Free LED strip resources
*
* @param strip: LED strip
*
* @return
* - ESP_OK: Free resources successfully
* - ESP_FAIL: Free resources failed because error occurred
*/
esp_err_t (*del)(led_strip_t *strip);
};
/**
* @brief LED Strip Configuration Type
*
*/
typedef struct {
uint32_t max_leds; /*!< Maximum LEDs in a single strip */
led_strip_dev_t dev; /*!< LED strip device (e.g. RMT channel, PWM channel, etc) */
} led_strip_config_t;
/**
* @brief Default configuration for LED strip
*
*/
#define LED_STRIP_DEFAULT_CONFIG(number, dev_hdl) \
{ \
.max_leds = number, \
.dev = dev_hdl, \
}
/**
* @brief Install a new ws2812 driver (based on RMT peripheral)
*
* @param config: LED strip configuration
* @return
* LED strip instance or NULL
*/
led_strip_t *led_strip_new_rmt_ws2812(const led_strip_config_t *config);
#ifdef __cplusplus
}
#endif

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// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <stdlib.h>
#include <string.h>
#include <sys/cdefs.h>
#include "esp_log.h"
#include "esp_attr.h"
#include "led_strip.h"
#include "driver/rmt.h"
static const char *TAG = "ws2812";
#define STRIP_CHECK(a, str, goto_tag, ret_value, ...) \
do \
{ \
if (!(a)) \
{ \
ESP_LOGE(TAG, "%s(%d): " str, __FUNCTION__, __LINE__, ##__VA_ARGS__); \
ret = ret_value; \
goto goto_tag; \
} \
} while (0)
#define WS2812_T0H_NS (350)
#define WS2812_T0L_NS (1000)
#define WS2812_T1H_NS (1000)
#define WS2812_T1L_NS (350)
#define WS2812_RESET_US (280)
static uint32_t ws2812_t0h_ticks = 0;
static uint32_t ws2812_t1h_ticks = 0;
static uint32_t ws2812_t0l_ticks = 0;
static uint32_t ws2812_t1l_ticks = 0;
typedef struct {
led_strip_t parent;
rmt_channel_t rmt_channel;
uint32_t strip_len;
uint8_t buffer[0];
} ws2812_t;
/**
* @brief Convert RGB data to RMT format.
*
* @note For WS2812, R,G,B each contains 256 different choices (i.e. uint8_t)
*
* @param[in] src: source data, to converted to RMT format
* @param[in] dest: place where to store the convert result
* @param[in] src_size: size of source data
* @param[in] wanted_num: number of RMT items that want to get
* @param[out] translated_size: number of source data that got converted
* @param[out] item_num: number of RMT items which are converted from source data
*/
static void IRAM_ATTR ws2812_rmt_adapter(const void *src, rmt_item32_t *dest, size_t src_size,
size_t wanted_num, size_t *translated_size, size_t *item_num)
{
if (src == NULL || dest == NULL) {
*translated_size = 0;
*item_num = 0;
return;
}
const rmt_item32_t bit0 = {{{ ws2812_t0h_ticks, 1, ws2812_t0l_ticks, 0 }}}; //Logical 0
const rmt_item32_t bit1 = {{{ ws2812_t1h_ticks, 1, ws2812_t1l_ticks, 0 }}}; //Logical 1
size_t size = 0;
size_t num = 0;
uint8_t *psrc = (uint8_t *)src;
rmt_item32_t *pdest = dest;
while (size < src_size && num < wanted_num) {
for (int i = 0; i < 8; i++) {
// MSB first
if (*psrc & (1 << (7 - i))) {
pdest->val = bit1.val;
} else {
pdest->val = bit0.val;
}
num++;
pdest++;
}
size++;
psrc++;
}
*translated_size = size;
*item_num = num;
}
static esp_err_t ws2812_set_pixel(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue)
{
esp_err_t ret = ESP_OK;
ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent);
STRIP_CHECK(index < ws2812->strip_len, "index out of the maximum number of leds", err, ESP_ERR_INVALID_ARG);
uint32_t start = index * 3;
// In thr order of GRB
ws2812->buffer[start + 0] = green & 0xFF;
ws2812->buffer[start + 1] = red & 0xFF;
ws2812->buffer[start + 2] = blue & 0xFF;
return ESP_OK;
err:
return ret;
}
static esp_err_t ws2812_refresh(led_strip_t *strip, uint32_t timeout_ms)
{
esp_err_t ret = ESP_OK;
ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent);
STRIP_CHECK(rmt_write_sample(ws2812->rmt_channel, ws2812->buffer, ws2812->strip_len * 3, true) == ESP_OK,
"transmit RMT samples failed", err, ESP_FAIL);
return rmt_wait_tx_done(ws2812->rmt_channel, pdMS_TO_TICKS(timeout_ms));
err:
return ret;
}
static esp_err_t ws2812_clear(led_strip_t *strip, uint32_t timeout_ms)
{
ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent);
// Write zero to turn off all leds
memset(ws2812->buffer, 0, ws2812->strip_len * 3);
return ws2812_refresh(strip, timeout_ms);
}
static esp_err_t ws2812_del(led_strip_t *strip)
{
ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent);
free(ws2812);
return ESP_OK;
}
led_strip_t *led_strip_new_rmt_ws2812(const led_strip_config_t *config)
{
led_strip_t *ret = NULL;
STRIP_CHECK(config, "configuration can't be null", err, NULL);
// 24 bits per led
uint32_t ws2812_size = sizeof(ws2812_t) + config->max_leds * 3;
ws2812_t *ws2812 = calloc(1, ws2812_size);
STRIP_CHECK(ws2812, "request memory for ws2812 failed", err, NULL);
uint32_t counter_clk_hz = 0;
STRIP_CHECK(rmt_get_counter_clock((rmt_channel_t)config->dev, &counter_clk_hz) == ESP_OK,
"get rmt counter clock failed", err, NULL);
// ns -> ticks
float ratio = (float)counter_clk_hz / 1e9;
ws2812_t0h_ticks = (uint32_t)(ratio * WS2812_T0H_NS);
ws2812_t0l_ticks = (uint32_t)(ratio * WS2812_T0L_NS);
ws2812_t1h_ticks = (uint32_t)(ratio * WS2812_T1H_NS);
ws2812_t1l_ticks = (uint32_t)(ratio * WS2812_T1L_NS);
// set ws2812 to rmt adapter
rmt_translator_init((rmt_channel_t)config->dev, ws2812_rmt_adapter);
ws2812->rmt_channel = (rmt_channel_t)config->dev;
ws2812->strip_len = config->max_leds;
ws2812->parent.set_pixel = ws2812_set_pixel;
ws2812->parent.refresh = ws2812_refresh;
ws2812->parent.clear = ws2812_clear;
ws2812->parent.del = ws2812_del;
return &ws2812->parent;
err:
return ret;
}

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cmake_minimum_required(VERSION 3.5)
# Add example src and bsp directories
set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s2/boards" "${TOP}/hw/bsp/esp32s2/components")
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
set(SUPPORTED_TARGETS esp32s2)
set(FAMILY_MCUS ESP32S2)

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#DEPS_SUBMODULES +=
.PHONY: all clean flash bootloader-flash app-flash erase monitor dfu-flash dfu
all:
idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) -DIDF_TARGET=esp32s2 build
build: all
fullclean:
if test -f sdkconfig; then $(RM) -f sdkconfig ; fi
if test -d $(BUILD); then $(RM) -rf $(BUILD) ; fi
idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) $@
clean flash bootloader-flash app-flash erase monitor dfu-flash dfu size size-components size-files:
idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) $@
uf2: $(BUILD)/$(PROJECT).uf2
UF2_FAMILY_ID = 0xbfdd4eee
$(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).bin
@echo CREATE $@
$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -b 0x0 -c -o $@ $^

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idf_component_register(SRCS esp32s3.c
INCLUDE_DIRS "." "${BOARD}"
PRIV_REQUIRES "driver"
REQUIRES freertos src led_strip)
# Apply board specific content
include("${BOARD}/board.cmake")
idf_component_get_property( FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PATH)
target_include_directories(${COMPONENT_TARGET} PUBLIC
"${FREERTOS_ORIG_INCLUDE_PATH}"
"${TOP}/hw"
"${TOP}/src"
)

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "../../board.h"
#include "board.h"
#include "esp_rom_gpio.h"
#include "hal/gpio_ll.h"
#include "hal/usb_hal.h"
#include "soc/usb_periph.h"
#include "driver/rmt.h"
#if ESP_IDF_VERSION_MAJOR > 4
#include "esp_private/periph_ctrl.h"
#else
#include "driver/periph_ctrl.h"
#endif
#ifdef NEOPIXEL_PIN
#include "led_strip.h"
static led_strip_t *strip;
#endif
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
//--------------------------------------------------------------------+
static void configure_pins(usb_hal_context_t *usb);
// Initialize on-board peripherals : led, button, uart and USB
void board_init(void)
{
#ifdef NEOPIXEL_PIN
#ifdef NEOPIXEL_POWER_PIN
gpio_reset_pin(NEOPIXEL_POWER_PIN);
gpio_set_direction(NEOPIXEL_POWER_PIN, GPIO_MODE_OUTPUT);
gpio_set_level(NEOPIXEL_POWER_PIN, NEOPIXEL_POWER_STATE);
#endif
// WS2812 Neopixel driver with RMT peripheral
rmt_config_t config = RMT_DEFAULT_CONFIG_TX(NEOPIXEL_PIN, RMT_CHANNEL_0);
config.clk_div = 2; // set counter clock to 40MHz
rmt_config(&config);
rmt_driver_install(config.channel, 0, 0);
led_strip_config_t strip_config = LED_STRIP_DEFAULT_CONFIG(1, (led_strip_dev_t) config.channel);
strip = led_strip_new_rmt_ws2812(&strip_config);
strip->clear(strip, 100); // off led
#endif
// Button
esp_rom_gpio_pad_select_gpio(BUTTON_PIN);
gpio_set_direction(BUTTON_PIN, GPIO_MODE_INPUT);
gpio_set_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN_ONLY : GPIO_PULLUP_ONLY);
// USB Controller Hal init
periph_module_reset(PERIPH_USB_MODULE);
periph_module_enable(PERIPH_USB_MODULE);
usb_hal_context_t hal = {
.use_external_phy = false // use built-in PHY
};
usb_hal_init(&hal);
configure_pins(&hal);
}
static void configure_pins(usb_hal_context_t *usb)
{
/* usb_periph_iopins currently configures USB_OTG as USB Device.
* Introduce additional parameters in usb_hal_context_t when adding support
* for USB Host.
*/
for (const usb_iopin_dsc_t *iopin = usb_periph_iopins; iopin->pin != -1; ++iopin) {
if ((usb->use_external_phy) || (iopin->ext_phy_only == 0)) {
esp_rom_gpio_pad_select_gpio(iopin->pin);
if (iopin->is_output) {
esp_rom_gpio_connect_out_signal(iopin->pin, iopin->func, false, false);
} else {
esp_rom_gpio_connect_in_signal(iopin->pin, iopin->func, false);
#if ESP_IDF_VERSION_MAJOR > 4
if ((iopin->pin != GPIO_MATRIX_CONST_ZERO_INPUT) && (iopin->pin != GPIO_MATRIX_CONST_ONE_INPUT))
#else
if ((iopin->pin != GPIO_FUNC_IN_LOW) && (iopin->pin != GPIO_FUNC_IN_HIGH))
#endif
{
gpio_ll_input_enable(&GPIO, iopin->pin);
}
}
esp_rom_gpio_pad_unhold(iopin->pin);
}
}
if (!usb->use_external_phy) {
gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3);
gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3);
}
}
// Turn LED on or off
void board_led_write(bool state)
{
#ifdef NEOPIXEL_PIN
strip->set_pixel(strip, 0, (state ? 0x88 : 0x00), 0x00, 0x00);
strip->refresh(strip, 100);
#endif
}
// Get the current state of button
// a '1' means active (pressed), a '0' means inactive.
uint32_t board_button_read(void)
{
return gpio_get_level(BUTTON_PIN) == BUTTON_STATE_ACTIVE;
}
// Get characters from UART
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
// Send characters to UART
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}

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# Apply board specific content here
target_include_directories(${COMPONENT_LIB} PRIVATE .)
target_compile_options(${COMPONENT_TARGET} PUBLIC
"-DCFG_TUSB_MCU=OPT_MCU_ESP32S3"
"-DCFG_TUSB_OS=OPT_OS_FREERTOS"
)

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
// Note: On the production version (v1.1) WS2812 is connected to GPIO 47
#define NEOPIXEL_PIN 47
#define BUTTON_PIN 0
#define BUTTON_STATE_ACTIVE 0
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

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# Apply board specific content here
target_include_directories(${COMPONENT_LIB} PRIVATE .)
target_compile_options(${COMPONENT_TARGET} PUBLIC
"-DCFG_TUSB_MCU=OPT_MCU_ESP32S3"
"-DCFG_TUSB_OS=OPT_OS_FREERTOS"
)

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#define NEOPIXEL_PIN 48
#define BUTTON_PIN 0
#define BUTTON_STATE_ACTIVE 0
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

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# Apply board specific content here
target_include_directories(${COMPONENT_LIB} PRIVATE .)
target_compile_options(${COMPONENT_TARGET} PUBLIC
"-DCFG_TUSB_MCU=OPT_MCU_ESP32S3"
"-DCFG_TUSB_OS=OPT_OS_FREERTOS"
)

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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#define NEOPIXEL_PIN 48
#define BUTTON_PIN 0
#define BUTTON_STATE_ACTIVE 0
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

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set(component_srcs "src/led_strip_rmt_ws2812.c")
idf_component_register(SRCS "${component_srcs}"
INCLUDE_DIRS "include"
PRIV_INCLUDE_DIRS ""
PRIV_REQUIRES "driver"
REQUIRES "")

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// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include "esp_err.h"
/**
* @brief LED Strip Type
*
*/
typedef struct led_strip_s led_strip_t;
/**
* @brief LED Strip Device Type
*
*/
typedef void *led_strip_dev_t;
/**
* @brief Declare of LED Strip Type
*
*/
struct led_strip_s {
/**
* @brief Set RGB for a specific pixel
*
* @param strip: LED strip
* @param index: index of pixel to set
* @param red: red part of color
* @param green: green part of color
* @param blue: blue part of color
*
* @return
* - ESP_OK: Set RGB for a specific pixel successfully
* - ESP_ERR_INVALID_ARG: Set RGB for a specific pixel failed because of invalid parameters
* - ESP_FAIL: Set RGB for a specific pixel failed because other error occurred
*/
esp_err_t (*set_pixel)(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue);
/**
* @brief Refresh memory colors to LEDs
*
* @param strip: LED strip
* @param timeout_ms: timeout value for refreshing task
*
* @return
* - ESP_OK: Refresh successfully
* - ESP_ERR_TIMEOUT: Refresh failed because of timeout
* - ESP_FAIL: Refresh failed because some other error occurred
*
* @note:
* After updating the LED colors in the memory, a following invocation of this API is needed to flush colors to strip.
*/
esp_err_t (*refresh)(led_strip_t *strip, uint32_t timeout_ms);
/**
* @brief Clear LED strip (turn off all LEDs)
*
* @param strip: LED strip
* @param timeout_ms: timeout value for clearing task
*
* @return
* - ESP_OK: Clear LEDs successfully
* - ESP_ERR_TIMEOUT: Clear LEDs failed because of timeout
* - ESP_FAIL: Clear LEDs failed because some other error occurred
*/
esp_err_t (*clear)(led_strip_t *strip, uint32_t timeout_ms);
/**
* @brief Free LED strip resources
*
* @param strip: LED strip
*
* @return
* - ESP_OK: Free resources successfully
* - ESP_FAIL: Free resources failed because error occurred
*/
esp_err_t (*del)(led_strip_t *strip);
};
/**
* @brief LED Strip Configuration Type
*
*/
typedef struct {
uint32_t max_leds; /*!< Maximum LEDs in a single strip */
led_strip_dev_t dev; /*!< LED strip device (e.g. RMT channel, PWM channel, etc) */
} led_strip_config_t;
/**
* @brief Default configuration for LED strip
*
*/
#define LED_STRIP_DEFAULT_CONFIG(number, dev_hdl) \
{ \
.max_leds = number, \
.dev = dev_hdl, \
}
/**
* @brief Install a new ws2812 driver (based on RMT peripheral)
*
* @param config: LED strip configuration
* @return
* LED strip instance or NULL
*/
led_strip_t *led_strip_new_rmt_ws2812(const led_strip_config_t *config);
#ifdef __cplusplus
}
#endif

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// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <stdlib.h>
#include <string.h>
#include <sys/cdefs.h>
#include "esp_log.h"
#include "esp_attr.h"
#include "led_strip.h"
#include "driver/rmt.h"
static const char *TAG = "ws2812";
#define STRIP_CHECK(a, str, goto_tag, ret_value, ...) \
do \
{ \
if (!(a)) \
{ \
ESP_LOGE(TAG, "%s(%d): " str, __FUNCTION__, __LINE__, ##__VA_ARGS__); \
ret = ret_value; \
goto goto_tag; \
} \
} while (0)
#define WS2812_T0H_NS (350)
#define WS2812_T0L_NS (1000)
#define WS2812_T1H_NS (1000)
#define WS2812_T1L_NS (350)
#define WS2812_RESET_US (280)
static uint32_t ws2812_t0h_ticks = 0;
static uint32_t ws2812_t1h_ticks = 0;
static uint32_t ws2812_t0l_ticks = 0;
static uint32_t ws2812_t1l_ticks = 0;
typedef struct {
led_strip_t parent;
rmt_channel_t rmt_channel;
uint32_t strip_len;
uint8_t buffer[0];
} ws2812_t;
/**
* @brief Convert RGB data to RMT format.
*
* @note For WS2812, R,G,B each contains 256 different choices (i.e. uint8_t)
*
* @param[in] src: source data, to converted to RMT format
* @param[in] dest: place where to store the convert result
* @param[in] src_size: size of source data
* @param[in] wanted_num: number of RMT items that want to get
* @param[out] translated_size: number of source data that got converted
* @param[out] item_num: number of RMT items which are converted from source data
*/
static void IRAM_ATTR ws2812_rmt_adapter(const void *src, rmt_item32_t *dest, size_t src_size,
size_t wanted_num, size_t *translated_size, size_t *item_num)
{
if (src == NULL || dest == NULL) {
*translated_size = 0;
*item_num = 0;
return;
}
const rmt_item32_t bit0 = {{{ ws2812_t0h_ticks, 1, ws2812_t0l_ticks, 0 }}}; //Logical 0
const rmt_item32_t bit1 = {{{ ws2812_t1h_ticks, 1, ws2812_t1l_ticks, 0 }}}; //Logical 1
size_t size = 0;
size_t num = 0;
uint8_t *psrc = (uint8_t *)src;
rmt_item32_t *pdest = dest;
while (size < src_size && num < wanted_num) {
for (int i = 0; i < 8; i++) {
// MSB first
if (*psrc & (1 << (7 - i))) {
pdest->val = bit1.val;
} else {
pdest->val = bit0.val;
}
num++;
pdest++;
}
size++;
psrc++;
}
*translated_size = size;
*item_num = num;
}
static esp_err_t ws2812_set_pixel(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue)
{
esp_err_t ret = ESP_OK;
ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent);
STRIP_CHECK(index < ws2812->strip_len, "index out of the maximum number of leds", err, ESP_ERR_INVALID_ARG);
uint32_t start = index * 3;
// In thr order of GRB
ws2812->buffer[start + 0] = green & 0xFF;
ws2812->buffer[start + 1] = red & 0xFF;
ws2812->buffer[start + 2] = blue & 0xFF;
return ESP_OK;
err:
return ret;
}
static esp_err_t ws2812_refresh(led_strip_t *strip, uint32_t timeout_ms)
{
esp_err_t ret = ESP_OK;
ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent);
STRIP_CHECK(rmt_write_sample(ws2812->rmt_channel, ws2812->buffer, ws2812->strip_len * 3, true) == ESP_OK,
"transmit RMT samples failed", err, ESP_FAIL);
return rmt_wait_tx_done(ws2812->rmt_channel, pdMS_TO_TICKS(timeout_ms));
err:
return ret;
}
static esp_err_t ws2812_clear(led_strip_t *strip, uint32_t timeout_ms)
{
ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent);
// Write zero to turn off all leds
memset(ws2812->buffer, 0, ws2812->strip_len * 3);
return ws2812_refresh(strip, timeout_ms);
}
static esp_err_t ws2812_del(led_strip_t *strip)
{
ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent);
free(ws2812);
return ESP_OK;
}
led_strip_t *led_strip_new_rmt_ws2812(const led_strip_config_t *config)
{
led_strip_t *ret = NULL;
STRIP_CHECK(config, "configuration can't be null", err, NULL);
// 24 bits per led
uint32_t ws2812_size = sizeof(ws2812_t) + config->max_leds * 3;
ws2812_t *ws2812 = calloc(1, ws2812_size);
STRIP_CHECK(ws2812, "request memory for ws2812 failed", err, NULL);
uint32_t counter_clk_hz = 0;
STRIP_CHECK(rmt_get_counter_clock((rmt_channel_t)config->dev, &counter_clk_hz) == ESP_OK,
"get rmt counter clock failed", err, NULL);
// ns -> ticks
float ratio = (float)counter_clk_hz / 1e9;
ws2812_t0h_ticks = (uint32_t)(ratio * WS2812_T0H_NS);
ws2812_t0l_ticks = (uint32_t)(ratio * WS2812_T0L_NS);
ws2812_t1h_ticks = (uint32_t)(ratio * WS2812_T1H_NS);
ws2812_t1l_ticks = (uint32_t)(ratio * WS2812_T1L_NS);
// set ws2812 to rmt adapter
rmt_translator_init((rmt_channel_t)config->dev, ws2812_rmt_adapter);
ws2812->rmt_channel = (rmt_channel_t)config->dev;
ws2812->strip_len = config->max_leds;
ws2812->parent.set_pixel = ws2812_set_pixel;
ws2812->parent.refresh = ws2812_refresh;
ws2812->parent.clear = ws2812_clear;
ws2812->parent.del = ws2812_del;
return &ws2812->parent;
err:
return ret;
}

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cmake_minimum_required(VERSION 3.5)
# Add example src and bsp directories
set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s3/boards" "${TOP}/hw/bsp/esp32s3/components")
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
set(SUPPORTED_TARGETS esp32s3)
set(FAMILY_MCUS ESP32S3)

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#DEPS_SUBMODULES +=
.PHONY: all clean flash bootloader-flash app-flash erase monitor dfu-flash dfu
all:
idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) -DIDF_TARGET=esp32s3 build
build: all
clean:
idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) clean
fullclean:
if test -f sdkconfig; then $(RM) -f sdkconfig ; fi
if test -d $(BUILD); then $(RM) -rf $(BUILD) ; fi
flash bootloader-flash app-flash erase monitor dfu-flash dfu:
idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) $@
uf2: $(BUILD)/$(PROJECT).uf2
UF2_FAMILY_ID = 0xc47e5767
$(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).bin
@echo CREATE $@
$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -b 0x0 -c -o $@ $^

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# BSP support for F1Cx00s boards
This folder contains necessary file and scripts to run TinyUSB examples on F1Cx00s boards.
Currently tested on:
- Lichee Pi Nano (F1C100s)
- [Widora Tiny200 v2 (also called MangoPi-R3c)](https://mangopi.org/tiny200)
## Flashing
There are two options to put your code into the MCU: `flash` and `exec`. Both modes require you to install [xfel](https://github.com/xboot/xfel) tool to your PATH. You must enter FEL mode before any operation can be done. To enter FEL mode, press BOOT button, then press RESET once, and release BOOT button. You will find VID/PID=1f3a:efe8 on your PC.
Exec: `make BOARD=f1c100s exec` will just upload the image to the DDR ram and execute it. It will not touch anything in the SPI flash.
Flash: `make BOARD=f1c100s flash` will write the image to SPI flash, and then reset the chip to execute it.
## TODO
* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT` high speed MCU check in examples (maybe we should extract the logic?)

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// Nothing valuable here

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DEPS_SUBMODULES += hw/mcu/allwinner
DEFINES += -D__ARM32_ARCH__=5 -D__ARM926EJS__
CFLAGS += \
-ffreestanding \
-std=gnu99 \
-march=armv5te \
-mtune=arm926ej-s \
-mfloat-abi=soft \
-marm \
-mno-thumb-interwork \
-Wno-unused-parameter \
-Wno-float-equal \
-DCFG_TUSB_MCU=OPT_MCU_F1C100S \
-Wno-error=cast-align \
-Wno-error=address-of-packed-member \
$(DEFINES)
LD_FILE = hw/mcu/allwinner/f1c100s/f1c100s.ld
LDFLAGS += -nostdlib -lgcc
MCU_DIR = hw/mcu/allwinner/f1c100s
SRC_C += \
src/portable/sunxi/dcd_sunxi_musb.c \
$(MCU_DIR)/machine/sys-uart.c \
$(MCU_DIR)/machine/exception.c \
$(MCU_DIR)/machine/sys-clock.c \
$(MCU_DIR)/machine/sys-copyself.c \
$(MCU_DIR)/machine/sys-dram.c \
$(MCU_DIR)/machine/sys-mmu.c \
$(MCU_DIR)/machine/sys-spi-flash.c \
$(MCU_DIR)/machine/f1c100s-intc.c \
$(MCU_DIR)/lib/malloc.c \
$(MCU_DIR)/lib/printf.c
SRC_S += \
$(MCU_DIR)/machine/start.S \
$(MCU_DIR)/lib/memcpy.S \
$(MCU_DIR)/lib/memset.S
INC += \
$(TOP)/$(MCU_DIR)/include \
$(TOP)/$(BOARD_PATH)
# flash target using xfel
flash: flash-xfel
exec: $(BUILD)/$(PROJECT).bin
xfel ddr
xfel write 0x80000000 $<
xfel exec 0x80000000

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/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include <stdint.h>
#include <malloc.h>
#include <irqflags.h>
#include <f1c100s-irq.h>
#include "bsp/board.h"
#include "board.h"
extern void sys_uart_putc(char c);
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
static void timer_init(void);
void board_init(void)
{
arch_local_irq_disable();
do_init_mem_pool();
f1c100s_intc_init();
timer_init();
printf("Timer INIT done\n");
arch_local_irq_enable();
}
// No LED, no button
void board_led_write(bool state)
{
}
uint32_t board_button_read(void)
{
return 0;
}
int board_uart_read(uint8_t* buf, int len)
{
return 0;
}
int board_uart_write(void const * buf, int len)
{
int txsize = len;
while (txsize--) {
sys_uart_putc(*(uint8_t const*)buf);
buf++;
}
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
uint32_t board_millis(void)
{
return system_ticks;
}
static void timer_handler(void)
{
volatile uint32_t *temp_addr = (uint32_t *)(0x01C20C00 + 0x04);
/* clear timer */
*temp_addr |= 0x01;
system_ticks++;
}
static void timer_init(void) {
uint32_t temp;
volatile uint32_t *temp_addr;
/* reload value */
temp = 12000000 / 1000;
temp_addr = (uint32_t *)(0x01C20C00 + 0x14);
*temp_addr = temp;
/* continuous | /2 | 24Mhz | reload*/
temp = (0x00 << 7) | (0x01 << 4) | (0x01 << 2) | (0x00 << 1);
temp_addr = (uint32_t *)(0x01C20C00 + 0x10);
*temp_addr &= 0xffffff00;
*temp_addr |= temp;
/* open timer irq */
temp = 0x01 << 0;
temp_addr = (uint32_t *)(0x01C20C00);
*temp_addr |= temp;
/* set init value */
temp_addr = (uint32_t *)(0x01C20C00 + 0x18);
*temp_addr = 0;
/* begin run timer */
temp = 0x01 << 0;
temp_addr = (uint32_t *)(0x01C20C00 + 0x10);
*temp_addr |= temp;
f1c100s_intc_set_isr(F1C100S_IRQ_TIMER0, timer_handler);
f1c100s_intc_enable_irq(F1C100S_IRQ_TIMER0);
}
#else
static void timer_init(void) { }
#endif

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if (NOT TARGET _family_support_marker)
add_library(_family_support_marker INTERFACE)
if (NOT FAMILY)
message(FATAL_ERROR "You must set a FAMILY variable for the build (e.g. rp2040, eps32s2, esp32s3). You can do this via -DFAMILY=xxx on the cmake command line")
endif()
if (NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
message(FATAL_ERROR "Family '${FAMILY}' is not known/supported")
endif()
function(family_filter RESULT DIR)
get_filename_component(DIR ${DIR} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_SOURCE_DIR})
if (EXISTS "${DIR}/only.txt")
file(READ "${DIR}/only.txt" ONLYS)
# Replace newlines with semicolon so that it is treated as a list by CMake
string(REPLACE "\n" ";" ONLYS_LINES ${ONLYS})
# For each mcu
foreach(MCU IN LISTS FAMILY_MCUS)
# For each line in only.txt
foreach(_line ${ONLYS_LINES})
# If mcu:xxx exists for this mcu then include
if (${_line} STREQUAL "mcu:${MCU}")
set(${RESULT} 1 PARENT_SCOPE)
return()
endif()
endforeach()
endforeach()
# Didn't find it in only file so don't build
set(${RESULT} 0 PARENT_SCOPE)
elseif (EXISTS "${DIR}/skip.txt")
file(READ "${DIR}/skip.txt" SKIPS)
# Replace newlines with semicolon so that it is treated as a list by CMake
string(REPLACE "\n" ";" SKIPS_LINES ${SKIPS})
# For each mcu
foreach(MCU IN LISTS FAMILY_MCUS)
# For each line in only.txt
foreach(_line ${SKIPS_LINES})
# If mcu:xxx exists for this mcu then skip
if (${_line} STREQUAL "mcu:${MCU}")
set(${RESULT} 0 PARENT_SCOPE)
return()
endif()
endforeach()
endforeach()
# Didn't find in skip file so build
set(${RESULT} 1 PARENT_SCOPE)
else()
# Didn't find skip or only file so build
set(${RESULT} 1 PARENT_SCOPE)
endif()
endfunction()
function(family_add_subdirectory DIR)
family_filter(SHOULD_ADD "${DIR}")
if (SHOULD_ADD)
add_subdirectory(${DIR})
endif()
endfunction()
function(family_get_project_name OUTPUT_NAME DIR)
get_filename_component(SHORT_NAME ${DIR} NAME)
set(${OUTPUT_NAME} ${TINYUSB_FAMILY_PROJECT_NAME_PREFIX}${SHORT_NAME} PARENT_SCOPE)
endfunction()
function(family_initialize_project PROJECT DIR)
family_filter(ALLOWED "${DIR}")
if (NOT ALLOWED)
get_filename_component(SHORT_NAME ${DIR} NAME)
message(FATAL_ERROR "${SHORT_NAME} is not supported on FAMILY=${FAMILY}")
endif()
endfunction()
function(family_add_default_example_warnings TARGET)
target_compile_options(${TARGET} PUBLIC
-Wall
-Wextra
-Werror
-Wfatal-errors
-Wdouble-promotion
-Wfloat-equal
-Wshadow
-Wwrite-strings
-Wsign-compare
-Wmissing-format-attribute
-Wunreachable-code
-Wcast-align
-Wcast-qual
-Wnull-dereference
-Wuninitialized
-Wunused
-Wredundant-decls
#-Wstrict-prototypes
#-Werror-implicit-function-declaration
#-Wundef
)
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
# GCC 10
if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 10.0)
target_compile_options(${TARGET} PUBLIC -Wconversion)
endif()
# GCC 8
if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 8.0)
target_compile_options(${TARGET} PUBLIC -Wcast-function-type -Wstrict-overflow)
endif()
# GCC 6
if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 6.0)
target_compile_options(${TARGET} PUBLIC -Wno-strict-aliasing)
endif()
endif()
endfunction()
# configure an executable target to link to tinyusb in device mode, and add the board implementation
function(family_configure_device_example TARGET)
# default implementation is empty, the function should be redefined in the FAMILY/family.cmake
endfunction()
# configure an executable target to link to tinyusb in host mode, and add the board implementation
function(family_configure_host_example TARGET)
# default implementation is empty, the function should be redefined in the FAMILY/family.cmake
endfunction()
include(${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
if (NOT FAMILY_MCUS)
set(FAMILY_MCUS ${FAMILY})
endif()
# save it in case of re-inclusion
set(FAMILY_MCUS ${FAMILY_MCUS} CACHE INTERNAL "")
endif()

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/*
* The MIT License (MIT)
*
* Copyright (c) 2021, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
// Place holder only
#ifdef __cplusplus
}
#endif
#endif

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# place holder

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.global main
.global isr
.section .text.start
.global _start
_start:
j crt_init
.section .text
.global trap_entry
trap_entry:
sw x1, - 1*4(sp)
sw x5, - 2*4(sp)
sw x6, - 3*4(sp)
sw x7, - 4*4(sp)
sw x10, - 5*4(sp)
sw x11, - 6*4(sp)
sw x12, - 7*4(sp)
sw x13, - 8*4(sp)
sw x14, - 9*4(sp)
sw x15, -10*4(sp)
sw x16, -11*4(sp)
sw x17, -12*4(sp)
sw x28, -13*4(sp)
sw x29, -14*4(sp)
sw x30, -15*4(sp)
sw x31, -16*4(sp)
addi sp,sp,-16*4
call isr
lw x1 , 15*4(sp)
lw x5, 14*4(sp)
lw x6, 13*4(sp)
lw x7, 12*4(sp)
lw x10, 11*4(sp)
lw x11, 10*4(sp)
lw x12, 9*4(sp)
lw x13, 8*4(sp)
lw x14, 7*4(sp)
lw x15, 6*4(sp)
lw x16, 5*4(sp)
lw x17, 4*4(sp)
lw x28, 3*4(sp)
lw x29, 2*4(sp)
lw x30, 1*4(sp)
lw x31, 0*4(sp)
addi sp,sp,16*4
mret
.text
crt_init:
la sp, _estack - 4
la a0, trap_entry
csrw mtvec, a0
bss_init:
la a0, _sbss
la a1, _ebss + 4
bss_loop:
beq a0,a1,bss_done
sw zero,0(a0)
add a0,a0,4
j bss_loop
bss_done:
/* Load DATA */
la t0, _etext
la t1, _srelocate
la t2, _erelocate + 4
3:
lw t3, 0(t0)
sw t3, 0(t1)
/* _edata is aligned to 4 bytes. Use word-xfers. */
addi t0, t0, 4
addi t1, t1, 4
bltu t1, t2, 3b
li a0, 0x880 //880 enable timer + external interrupt sources (until mstatus.MIE is set, they will never trigger an interrupt)
csrw mie,a0
call main
infinite_loop:
j infinite_loop

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#!/usr/bin/python
# Written by Antonio Galea - 2010/11/18
# Updated for DFU 1.1 by Sean Cross - 2020/03/31
# Distributed under Gnu LGPL 3.0
# see http://www.gnu.org/licenses/lgpl-3.0.txt
import sys,struct,zlib,os
from optparse import OptionParser
DEFAULT_DEVICE="0x1209:0x5bf0"
def named(tuple,names):
return dict(zip(names.split(),tuple))
def consume(fmt,data,names):
n = struct.calcsize(fmt)
return named(struct.unpack(fmt,data[:n]),names),data[n:]
def cstring(string):
return string.split('\0',1)[0]
def compute_crc(data):
return 0xFFFFFFFF & -zlib.crc32(data) -1
def parse(file,dump_images=False):
print ('File: "%s"' % file)
data = open(file,'rb').read()
crc = compute_crc(data[:-4])
data = data[len(data)-16:]
suffix = named(struct.unpack('<4H3sBI',data[:16]),'device product vendor dfu ufd len crc')
print ('usb: %(vendor)04x:%(product)04x, device: 0x%(device)04x, dfu: 0x%(dfu)04x, %(ufd)s, %(len)d, 0x%(crc)08x' % suffix)
if crc != suffix['crc']:
print ("CRC ERROR: computed crc32 is 0x%08x" % crc)
data = data[16:]
if data:
print ("PARSE ERROR")
def build(file,data,device=DEFAULT_DEVICE):
# Parse the VID and PID from the `device` argument
v,d=map(lambda x: int(x,0) & 0xFFFF, device.split(':',1))
# Generate the DFU suffix, consisting of these fields:
# Field name | Length | Description
# ================+=========+================================
# bcdDevice | 2 | The release number of this firmware (0xffff - don't care)
# idProduct | 2 | PID of this device
# idVendor | 2 | VID of this device
# bcdDFU | 2 | Version of this DFU spec (0x01 0x00)
# ucDfuSignature | 3 | The characters 'DFU', printed in reverse order
# bLength | 1 | The length of this suffix (16 bytes)
# dwCRC | 4 | A CRC32 of the data, including this suffix
data += struct.pack('<4H3sB',0xffff,d,v,0x0100,b'UFD',16)
crc = compute_crc(data)
# Append the CRC32 of the entire block
data += struct.pack('<I',crc)
open(file,'wb').write(data)
if __name__=="__main__":
usage = """
%prog [-d|--dump] infile.dfu
%prog {-b|--build} file.bin [{-D|--device}=vendor:device] outfile.dfu"""
parser = OptionParser(usage=usage)
parser.add_option("-b", "--build", action="store", dest="binfile",
help="build a DFU file from given BINFILE", metavar="BINFILE")
parser.add_option("-D", "--device", action="store", dest="device",
help="build for DEVICE, defaults to %s" % DEFAULT_DEVICE, metavar="DEVICE")
parser.add_option("-d", "--dump", action="store_true", dest="dump_images",
default=False, help="dump contained images to current directory")
(options, args) = parser.parse_args()
if options.binfile and len(args)==1:
binfile = options.binfile
if not os.path.isfile(binfile):
print ("Unreadable file '%s'." % binfile)
sys.exit(1)
target = open(binfile,'rb').read()
outfile = args[0]
device = DEFAULT_DEVICE
# If a device is specified, parse the pair into a VID:PID pair
# in order to validate them.
if options.device:
device=options.device
try:
v,d=map(lambda x: int(x,0) & 0xFFFF, device.split(':',1))
except:
print ("Invalid device '%s'." % device)
sys.exit(1)
build(outfile,target,device)
elif len(args)==1:
infile = args[0]
if not os.path.isfile(infile):
print ("Unreadable file '%s'." % infile)
sys.exit(1)
parse(infile, dump_images=options.dump_images)
else:
parser.print_help()
sys.exit(1)

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CFLAGS += \
-flto \
-march=rv32i \
-mabi=ilp32 \
-nostdlib \
-DCFG_TUSB_MCU=OPT_MCU_VALENTYUSB_EPTRI
# Toolchain from https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack
CROSS_COMPILE = riscv-none-embed-
# All source paths should be relative to the top level.
LD_FILE = $(FAMILY_PATH)/fomu.ld
SRC_C += src/portable/valentyusb/eptri/dcd_eptri.c
SRC_S += $(FAMILY_PATH)/crt0-vexriscv.S
INC += \
$(TOP)/$(FAMILY_PATH)/include
# For freeRTOS port source
FREERTOS_PORT = RISC-V
# flash using dfu-util
$(BUILD)/$(PROJECT).dfu: $(BUILD)/$(PROJECT).bin
@echo "Create $@"
python $(TOP)/hw/bsp/$(BOARD)/dfu.py -b $^ -D 0x1209:0x5bf0 $@
flash: $(BUILD)/$(PROJECT).dfu
dfu-util -D $^

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/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include <stdint.h>
#include <stdbool.h>
#include "../board.h"
#include "csr.h"
#include "irq.h"
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void fomu_error(uint32_t line)
{
(void)line;
TU_BREAKPOINT();
}
volatile uint32_t system_ticks = 0;
static void timer_init(void)
{
int t;
timer0_en_write(0);
t = CONFIG_CLOCK_FREQUENCY / 1000; // 1000 kHz tick
timer0_reload_write(t);
timer0_load_write(t);
timer0_en_write(1);
timer0_ev_enable_write(1);
timer0_ev_pending_write(1);
irq_setmask(irq_getmask() | (1 << TIMER0_INTERRUPT));
}
void isr(void)
{
unsigned int irqs;
irqs = irq_pending() & irq_getmask();
#if CFG_TUD_ENABLED
if (irqs & (1 << USB_INTERRUPT)) {
tud_int_handler(0);
}
#endif
if (irqs & (1 << TIMER0_INTERRUPT)) {
system_ticks++;
timer0_ev_pending_write(1);
}
}
void board_init(void)
{
irq_setmask(0);
irq_setie(1);
timer_init();
return;
}
void board_led_write(bool state)
{
rgb_ctrl_write(0xff);
rgb_raw_write(state);
}
uint32_t board_button_read(void)
{
return 0;
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf;
(void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
int32_t offset = 0;
uint8_t const* buf8 = (uint8_t const*) buf;
for (offset = 0; offset < len; offset++)
{
if (!(messible_status_read() & CSR_MESSIBLE_STATUS_FULL_OFFSET))
{
messible_in_write(buf8[offset]);
}
}
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
uint32_t board_millis(void)
{
return system_ticks;
}
#endif

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@ -0,0 +1,104 @@
OUTPUT_FORMAT("elf32-littleriscv")
ENTRY(_start)
__DYNAMIC = 0;
MEMORY {
csr : ORIGIN = 0x60000000, LENGTH = 0x01000000
vexriscv_debug : ORIGIN = 0xf00f0000, LENGTH = 0x00000100
ram : ORIGIN = 0x10000000, LENGTH = 0x00020000
rom : ORIGIN = 0x20040000, LENGTH = 0x00200000 - 0x40000
}
/* The stack size used by the application. NOTE: you need to adjust according to your application. */
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
/* Section Definitions */
SECTIONS
{
.text :
{
. = ALIGN(4);
_ftext = .;
*(.text.start)
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
/* Support C constructors, and C destructors in both user code
and the C library. This also provides support for C++ code. */
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
. = ALIGN(4);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
. = ALIGN(4);
KEEP(*(.fini))
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
} > rom
. = ALIGN(4);
_etext = .; /* End of text section */
.relocate : AT (_etext)
{
. = ALIGN(4);
_srelocate = .;
*(.ramfunc .ramfunc.*);
*(.data .data.*);
. = ALIGN(4);
_erelocate = .;
} > ram
/* .bss section which is used for uninitialized data */
.bss (NOLOAD) :
{
. = ALIGN(4);
_sbss = . ;
_szero = .;
*(.bss .bss.*)
*(.sbss .sbss.*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
_ezero = .;
end = .;
} > ram
/* stack section */
.stack (NOLOAD):
{
. = ALIGN(8);
_sstack = .;
. = . + STACK_SIZE;
. = ALIGN(8);
_estack = .;
} > ram
. = ALIGN(4);
_end = . ;
}

View File

@ -0,0 +1,750 @@
//--------------------------------------------------------------------------------
// Auto-generated by Migen (f4fcd10) & LiteX (1425a68d) on 2019-11-12 19:41:49
//--------------------------------------------------------------------------------
#ifndef __GENERATED_CSR_H
#define __GENERATED_CSR_H
#include <stdint.h>
#ifdef CSR_ACCESSORS_DEFINED
extern void csr_writeb(uint8_t value, unsigned long addr);
extern uint8_t csr_readb(unsigned long addr);
extern void csr_writew(uint16_t value, unsigned long addr);
extern uint16_t csr_readw(unsigned long addr);
extern void csr_writel(uint32_t value, unsigned long addr);
extern uint32_t csr_readl(unsigned long addr);
#else /* ! CSR_ACCESSORS_DEFINED */
#include <hw/common.h>
#endif /* ! CSR_ACCESSORS_DEFINED */
/* ctrl */
#define CSR_CTRL_BASE 0xe0000000L
#define CSR_CTRL_RESET_ADDR 0xe0000000L
#define CSR_CTRL_RESET_SIZE 1
static inline unsigned char ctrl_reset_read(void) {
unsigned char r = csr_readl(0xe0000000L);
return r;
}
static inline void ctrl_reset_write(unsigned char value) {
csr_writel(value, 0xe0000000L);
}
#define CSR_CTRL_SCRATCH_ADDR 0xe0000004L
#define CSR_CTRL_SCRATCH_SIZE 4
static inline unsigned int ctrl_scratch_read(void) {
unsigned int r = csr_readl(0xe0000004L);
r <<= 8;
r |= csr_readl(0xe0000008L);
r <<= 8;
r |= csr_readl(0xe000000cL);
r <<= 8;
r |= csr_readl(0xe0000010L);
return r;
}
static inline void ctrl_scratch_write(unsigned int value) {
csr_writel(value >> 24, 0xe0000004L);
csr_writel(value >> 16, 0xe0000008L);
csr_writel(value >> 8, 0xe000000cL);
csr_writel(value, 0xe0000010L);
}
#define CSR_CTRL_BUS_ERRORS_ADDR 0xe0000014L
#define CSR_CTRL_BUS_ERRORS_SIZE 4
static inline unsigned int ctrl_bus_errors_read(void) {
unsigned int r = csr_readl(0xe0000014L);
r <<= 8;
r |= csr_readl(0xe0000018L);
r <<= 8;
r |= csr_readl(0xe000001cL);
r <<= 8;
r |= csr_readl(0xe0000020L);
return r;
}
/* messible */
#define CSR_MESSIBLE_BASE 0xe0008000L
#define CSR_MESSIBLE_IN_ADDR 0xe0008000L
#define CSR_MESSIBLE_IN_SIZE 1
static inline unsigned char messible_in_read(void) {
unsigned char r = csr_readl(0xe0008000L);
return r;
}
static inline void messible_in_write(unsigned char value) {
csr_writel(value, 0xe0008000L);
}
#define CSR_MESSIBLE_OUT_ADDR 0xe0008004L
#define CSR_MESSIBLE_OUT_SIZE 1
static inline unsigned char messible_out_read(void) {
unsigned char r = csr_readl(0xe0008004L);
return r;
}
#define CSR_MESSIBLE_STATUS_ADDR 0xe0008008L
#define CSR_MESSIBLE_STATUS_SIZE 1
static inline unsigned char messible_status_read(void) {
unsigned char r = csr_readl(0xe0008008L);
return r;
}
#define CSR_MESSIBLE_STATUS_FULL_OFFSET 0
#define CSR_MESSIBLE_STATUS_FULL_SIZE 1
#define CSR_MESSIBLE_STATUS_HAVE_OFFSET 1
#define CSR_MESSIBLE_STATUS_HAVE_SIZE 1
/* picorvspi */
#define CSR_PICORVSPI_BASE 0xe0005000L
#define CSR_PICORVSPI_CFG1_ADDR 0xe0005000L
#define CSR_PICORVSPI_CFG1_SIZE 1
static inline unsigned char picorvspi_cfg1_read(void) {
unsigned char r = csr_readl(0xe0005000L);
return r;
}
static inline void picorvspi_cfg1_write(unsigned char value) {
csr_writel(value, 0xe0005000L);
}
#define CSR_PICORVSPI_CFG1_BB_OUT_OFFSET 0
#define CSR_PICORVSPI_CFG1_BB_OUT_SIZE 4
#define CSR_PICORVSPI_CFG1_BB_CLK_OFFSET 4
#define CSR_PICORVSPI_CFG1_BB_CLK_SIZE 1
#define CSR_PICORVSPI_CFG1_BB_CS_OFFSET 5
#define CSR_PICORVSPI_CFG1_BB_CS_SIZE 1
#define CSR_PICORVSPI_CFG2_ADDR 0xe0005004L
#define CSR_PICORVSPI_CFG2_SIZE 1
static inline unsigned char picorvspi_cfg2_read(void) {
unsigned char r = csr_readl(0xe0005004L);
return r;
}
static inline void picorvspi_cfg2_write(unsigned char value) {
csr_writel(value, 0xe0005004L);
}
#define CSR_PICORVSPI_CFG2_BB_OE_OFFSET 0
#define CSR_PICORVSPI_CFG2_BB_OE_SIZE 4
#define CSR_PICORVSPI_CFG3_ADDR 0xe0005008L
#define CSR_PICORVSPI_CFG3_SIZE 1
static inline unsigned char picorvspi_cfg3_read(void) {
unsigned char r = csr_readl(0xe0005008L);
return r;
}
static inline void picorvspi_cfg3_write(unsigned char value) {
csr_writel(value, 0xe0005008L);
}
#define CSR_PICORVSPI_CFG3_RLAT_OFFSET 0
#define CSR_PICORVSPI_CFG3_RLAT_SIZE 4
#define CSR_PICORVSPI_CFG3_CRM_OFFSET 4
#define CSR_PICORVSPI_CFG3_CRM_SIZE 1
#define CSR_PICORVSPI_CFG3_QSPI_OFFSET 5
#define CSR_PICORVSPI_CFG3_QSPI_SIZE 1
#define CSR_PICORVSPI_CFG3_DDR_OFFSET 6
#define CSR_PICORVSPI_CFG3_DDR_SIZE 1
#define CSR_PICORVSPI_CFG4_ADDR 0xe000500cL
#define CSR_PICORVSPI_CFG4_SIZE 1
static inline unsigned char picorvspi_cfg4_read(void) {
unsigned char r = csr_readl(0xe000500cL);
return r;
}
static inline void picorvspi_cfg4_write(unsigned char value) {
csr_writel(value, 0xe000500cL);
}
#define CSR_PICORVSPI_CFG4_MEMIO_OFFSET 7
#define CSR_PICORVSPI_CFG4_MEMIO_SIZE 1
#define CSR_PICORVSPI_STAT1_ADDR 0xe0005010L
#define CSR_PICORVSPI_STAT1_SIZE 1
static inline unsigned char picorvspi_stat1_read(void) {
unsigned char r = csr_readl(0xe0005010L);
return r;
}
#define CSR_PICORVSPI_STAT1_BB_IN_OFFSET 0
#define CSR_PICORVSPI_STAT1_BB_IN_SIZE 4
#define CSR_PICORVSPI_STAT2_ADDR 0xe0005014L
#define CSR_PICORVSPI_STAT2_SIZE 1
static inline unsigned char picorvspi_stat2_read(void) {
unsigned char r = csr_readl(0xe0005014L);
return r;
}
#define CSR_PICORVSPI_STAT3_ADDR 0xe0005018L
#define CSR_PICORVSPI_STAT3_SIZE 1
static inline unsigned char picorvspi_stat3_read(void) {
unsigned char r = csr_readl(0xe0005018L);
return r;
}
#define CSR_PICORVSPI_STAT4_ADDR 0xe000501cL
#define CSR_PICORVSPI_STAT4_SIZE 1
static inline unsigned char picorvspi_stat4_read(void) {
unsigned char r = csr_readl(0xe000501cL);
return r;
}
/* reboot */
#define CSR_REBOOT_BASE 0xe0006000L
#define CSR_REBOOT_CTRL_ADDR 0xe0006000L
#define CSR_REBOOT_CTRL_SIZE 1
static inline unsigned char reboot_ctrl_read(void) {
unsigned char r = csr_readl(0xe0006000L);
return r;
}
static inline void reboot_ctrl_write(unsigned char value) {
csr_writel(value, 0xe0006000L);
}
#define CSR_REBOOT_CTRL_IMAGE_OFFSET 0
#define CSR_REBOOT_CTRL_IMAGE_SIZE 2
#define CSR_REBOOT_CTRL_KEY_OFFSET 2
#define CSR_REBOOT_CTRL_KEY_SIZE 6
#define CSR_REBOOT_ADDR_ADDR 0xe0006004L
#define CSR_REBOOT_ADDR_SIZE 4
static inline unsigned int reboot_addr_read(void) {
unsigned int r = csr_readl(0xe0006004L);
r <<= 8;
r |= csr_readl(0xe0006008L);
r <<= 8;
r |= csr_readl(0xe000600cL);
r <<= 8;
r |= csr_readl(0xe0006010L);
return r;
}
static inline void reboot_addr_write(unsigned int value) {
csr_writel(value >> 24, 0xe0006004L);
csr_writel(value >> 16, 0xe0006008L);
csr_writel(value >> 8, 0xe000600cL);
csr_writel(value, 0xe0006010L);
}
/* rgb */
#define CSR_RGB_BASE 0xe0006800L
#define CSR_RGB_DAT_ADDR 0xe0006800L
#define CSR_RGB_DAT_SIZE 1
static inline unsigned char rgb_dat_read(void) {
unsigned char r = csr_readl(0xe0006800L);
return r;
}
static inline void rgb_dat_write(unsigned char value) {
csr_writel(value, 0xe0006800L);
}
#define CSR_RGB_ADDR_ADDR 0xe0006804L
#define CSR_RGB_ADDR_SIZE 1
static inline unsigned char rgb_addr_read(void) {
unsigned char r = csr_readl(0xe0006804L);
return r;
}
static inline void rgb_addr_write(unsigned char value) {
csr_writel(value, 0xe0006804L);
}
#define CSR_RGB_CTRL_ADDR 0xe0006808L
#define CSR_RGB_CTRL_SIZE 1
static inline unsigned char rgb_ctrl_read(void) {
unsigned char r = csr_readl(0xe0006808L);
return r;
}
static inline void rgb_ctrl_write(unsigned char value) {
csr_writel(value, 0xe0006808L);
}
#define CSR_RGB_CTRL_EXE_OFFSET 0
#define CSR_RGB_CTRL_EXE_SIZE 1
#define CSR_RGB_CTRL_CURREN_OFFSET 1
#define CSR_RGB_CTRL_CURREN_SIZE 1
#define CSR_RGB_CTRL_RGBLEDEN_OFFSET 2
#define CSR_RGB_CTRL_RGBLEDEN_SIZE 1
#define CSR_RGB_CTRL_RRAW_OFFSET 3
#define CSR_RGB_CTRL_RRAW_SIZE 1
#define CSR_RGB_CTRL_GRAW_OFFSET 4
#define CSR_RGB_CTRL_GRAW_SIZE 1
#define CSR_RGB_CTRL_BRAW_OFFSET 5
#define CSR_RGB_CTRL_BRAW_SIZE 1
#define CSR_RGB_RAW_ADDR 0xe000680cL
#define CSR_RGB_RAW_SIZE 1
static inline unsigned char rgb_raw_read(void) {
unsigned char r = csr_readl(0xe000680cL);
return r;
}
static inline void rgb_raw_write(unsigned char value) {
csr_writel(value, 0xe000680cL);
}
#define CSR_RGB_RAW_R_OFFSET 0
#define CSR_RGB_RAW_R_SIZE 1
#define CSR_RGB_RAW_G_OFFSET 1
#define CSR_RGB_RAW_G_SIZE 1
#define CSR_RGB_RAW_B_OFFSET 2
#define CSR_RGB_RAW_B_SIZE 1
/* timer0 */
#define CSR_TIMER0_BASE 0xe0002800L
#define CSR_TIMER0_LOAD_ADDR 0xe0002800L
#define CSR_TIMER0_LOAD_SIZE 4
static inline unsigned int timer0_load_read(void) {
unsigned int r = csr_readl(0xe0002800L);
r <<= 8;
r |= csr_readl(0xe0002804L);
r <<= 8;
r |= csr_readl(0xe0002808L);
r <<= 8;
r |= csr_readl(0xe000280cL);
return r;
}
static inline void timer0_load_write(unsigned int value) {
csr_writel(value >> 24, 0xe0002800L);
csr_writel(value >> 16, 0xe0002804L);
csr_writel(value >> 8, 0xe0002808L);
csr_writel(value, 0xe000280cL);
}
#define CSR_TIMER0_RELOAD_ADDR 0xe0002810L
#define CSR_TIMER0_RELOAD_SIZE 4
static inline unsigned int timer0_reload_read(void) {
unsigned int r = csr_readl(0xe0002810L);
r <<= 8;
r |= csr_readl(0xe0002814L);
r <<= 8;
r |= csr_readl(0xe0002818L);
r <<= 8;
r |= csr_readl(0xe000281cL);
return r;
}
static inline void timer0_reload_write(unsigned int value) {
csr_writel(value >> 24, 0xe0002810L);
csr_writel(value >> 16, 0xe0002814L);
csr_writel(value >> 8, 0xe0002818L);
csr_writel(value, 0xe000281cL);
}
#define CSR_TIMER0_EN_ADDR 0xe0002820L
#define CSR_TIMER0_EN_SIZE 1
static inline unsigned char timer0_en_read(void) {
unsigned char r = csr_readl(0xe0002820L);
return r;
}
static inline void timer0_en_write(unsigned char value) {
csr_writel(value, 0xe0002820L);
}
#define CSR_TIMER0_UPDATE_VALUE_ADDR 0xe0002824L
#define CSR_TIMER0_UPDATE_VALUE_SIZE 1
static inline unsigned char timer0_update_value_read(void) {
unsigned char r = csr_readl(0xe0002824L);
return r;
}
static inline void timer0_update_value_write(unsigned char value) {
csr_writel(value, 0xe0002824L);
}
#define CSR_TIMER0_VALUE_ADDR 0xe0002828L
#define CSR_TIMER0_VALUE_SIZE 4
static inline unsigned int timer0_value_read(void) {
unsigned int r = csr_readl(0xe0002828L);
r <<= 8;
r |= csr_readl(0xe000282cL);
r <<= 8;
r |= csr_readl(0xe0002830L);
r <<= 8;
r |= csr_readl(0xe0002834L);
return r;
}
#define CSR_TIMER0_EV_STATUS_ADDR 0xe0002838L
#define CSR_TIMER0_EV_STATUS_SIZE 1
static inline unsigned char timer0_ev_status_read(void) {
unsigned char r = csr_readl(0xe0002838L);
return r;
}
static inline void timer0_ev_status_write(unsigned char value) {
csr_writel(value, 0xe0002838L);
}
#define CSR_TIMER0_EV_PENDING_ADDR 0xe000283cL
#define CSR_TIMER0_EV_PENDING_SIZE 1
static inline unsigned char timer0_ev_pending_read(void) {
unsigned char r = csr_readl(0xe000283cL);
return r;
}
static inline void timer0_ev_pending_write(unsigned char value) {
csr_writel(value, 0xe000283cL);
}
#define CSR_TIMER0_EV_ENABLE_ADDR 0xe0002840L
#define CSR_TIMER0_EV_ENABLE_SIZE 1
static inline unsigned char timer0_ev_enable_read(void) {
unsigned char r = csr_readl(0xe0002840L);
return r;
}
static inline void timer0_ev_enable_write(unsigned char value) {
csr_writel(value, 0xe0002840L);
}
/* touch */
#define CSR_TOUCH_BASE 0xe0005800L
#define CSR_TOUCH_O_ADDR 0xe0005800L
#define CSR_TOUCH_O_SIZE 1
static inline unsigned char touch_o_read(void) {
unsigned char r = csr_readl(0xe0005800L);
return r;
}
static inline void touch_o_write(unsigned char value) {
csr_writel(value, 0xe0005800L);
}
#define CSR_TOUCH_O_O_OFFSET 0
#define CSR_TOUCH_O_O_SIZE 4
#define CSR_TOUCH_OE_ADDR 0xe0005804L
#define CSR_TOUCH_OE_SIZE 1
static inline unsigned char touch_oe_read(void) {
unsigned char r = csr_readl(0xe0005804L);
return r;
}
static inline void touch_oe_write(unsigned char value) {
csr_writel(value, 0xe0005804L);
}
#define CSR_TOUCH_OE_OE_OFFSET 0
#define CSR_TOUCH_OE_OE_SIZE 4
#define CSR_TOUCH_I_ADDR 0xe0005808L
#define CSR_TOUCH_I_SIZE 1
static inline unsigned char touch_i_read(void) {
unsigned char r = csr_readl(0xe0005808L);
return r;
}
#define CSR_TOUCH_I_I_OFFSET 0
#define CSR_TOUCH_I_I_SIZE 4
/* usb */
#define CSR_USB_BASE 0xe0004800L
#define CSR_USB_PULLUP_OUT_ADDR 0xe0004800L
#define CSR_USB_PULLUP_OUT_SIZE 1
static inline unsigned char usb_pullup_out_read(void) {
unsigned char r = csr_readl(0xe0004800L);
return r;
}
static inline void usb_pullup_out_write(unsigned char value) {
csr_writel(value, 0xe0004800L);
}
#define CSR_USB_ADDRESS_ADDR 0xe0004804L
#define CSR_USB_ADDRESS_SIZE 1
static inline unsigned char usb_address_read(void) {
unsigned char r = csr_readl(0xe0004804L);
return r;
}
static inline void usb_address_write(unsigned char value) {
csr_writel(value, 0xe0004804L);
}
#define CSR_USB_ADDRESS_ADDR_OFFSET 0
#define CSR_USB_ADDRESS_ADDR_SIZE 7
#define CSR_USB_NEXT_EV_ADDR 0xe0004808L
#define CSR_USB_NEXT_EV_SIZE 1
static inline unsigned char usb_next_ev_read(void) {
unsigned char r = csr_readl(0xe0004808L);
return r;
}
#define CSR_USB_NEXT_EV_IN_OFFSET 0
#define CSR_USB_NEXT_EV_IN_SIZE 1
#define CSR_USB_NEXT_EV_OUT_OFFSET 1
#define CSR_USB_NEXT_EV_OUT_SIZE 1
#define CSR_USB_NEXT_EV_SETUP_OFFSET 2
#define CSR_USB_NEXT_EV_SETUP_SIZE 1
#define CSR_USB_NEXT_EV_RESET_OFFSET 3
#define CSR_USB_NEXT_EV_RESET_SIZE 1
#define CSR_USB_SETUP_DATA_ADDR 0xe000480cL
#define CSR_USB_SETUP_DATA_SIZE 1
static inline unsigned char usb_setup_data_read(void) {
unsigned char r = csr_readl(0xe000480cL);
return r;
}
#define CSR_USB_SETUP_DATA_DATA_OFFSET 0
#define CSR_USB_SETUP_DATA_DATA_SIZE 8
#define CSR_USB_SETUP_CTRL_ADDR 0xe0004810L
#define CSR_USB_SETUP_CTRL_SIZE 1
static inline unsigned char usb_setup_ctrl_read(void) {
unsigned char r = csr_readl(0xe0004810L);
return r;
}
static inline void usb_setup_ctrl_write(unsigned char value) {
csr_writel(value, 0xe0004810L);
}
#define CSR_USB_SETUP_CTRL_RESET_OFFSET 5
#define CSR_USB_SETUP_CTRL_RESET_SIZE 1
#define CSR_USB_SETUP_STATUS_ADDR 0xe0004814L
#define CSR_USB_SETUP_STATUS_SIZE 1
static inline unsigned char usb_setup_status_read(void) {
unsigned char r = csr_readl(0xe0004814L);
return r;
}
#define CSR_USB_SETUP_STATUS_EPNO_OFFSET 0
#define CSR_USB_SETUP_STATUS_EPNO_SIZE 4
#define CSR_USB_SETUP_STATUS_HAVE_OFFSET 4
#define CSR_USB_SETUP_STATUS_HAVE_SIZE 1
#define CSR_USB_SETUP_STATUS_PEND_OFFSET 5
#define CSR_USB_SETUP_STATUS_PEND_SIZE 1
#define CSR_USB_SETUP_STATUS_IS_IN_OFFSET 6
#define CSR_USB_SETUP_STATUS_IS_IN_SIZE 1
#define CSR_USB_SETUP_STATUS_DATA_OFFSET 7
#define CSR_USB_SETUP_STATUS_DATA_SIZE 1
#define CSR_USB_SETUP_EV_STATUS_ADDR 0xe0004818L
#define CSR_USB_SETUP_EV_STATUS_SIZE 1
static inline unsigned char usb_setup_ev_status_read(void) {
unsigned char r = csr_readl(0xe0004818L);
return r;
}
static inline void usb_setup_ev_status_write(unsigned char value) {
csr_writel(value, 0xe0004818L);
}
#define CSR_USB_SETUP_EV_PENDING_ADDR 0xe000481cL
#define CSR_USB_SETUP_EV_PENDING_SIZE 1
static inline unsigned char usb_setup_ev_pending_read(void) {
unsigned char r = csr_readl(0xe000481cL);
return r;
}
static inline void usb_setup_ev_pending_write(unsigned char value) {
csr_writel(value, 0xe000481cL);
}
#define CSR_USB_SETUP_EV_ENABLE_ADDR 0xe0004820L
#define CSR_USB_SETUP_EV_ENABLE_SIZE 1
static inline unsigned char usb_setup_ev_enable_read(void) {
unsigned char r = csr_readl(0xe0004820L);
return r;
}
static inline void usb_setup_ev_enable_write(unsigned char value) {
csr_writel(value, 0xe0004820L);
}
#define CSR_USB_IN_DATA_ADDR 0xe0004824L
#define CSR_USB_IN_DATA_SIZE 1
static inline unsigned char usb_in_data_read(void) {
unsigned char r = csr_readl(0xe0004824L);
return r;
}
static inline void usb_in_data_write(unsigned char value) {
csr_writel(value, 0xe0004824L);
}
#define CSR_USB_IN_DATA_DATA_OFFSET 0
#define CSR_USB_IN_DATA_DATA_SIZE 8
#define CSR_USB_IN_CTRL_ADDR 0xe0004828L
#define CSR_USB_IN_CTRL_SIZE 1
static inline unsigned char usb_in_ctrl_read(void) {
unsigned char r = csr_readl(0xe0004828L);
return r;
}
static inline void usb_in_ctrl_write(unsigned char value) {
csr_writel(value, 0xe0004828L);
}
#define CSR_USB_IN_CTRL_EPNO_OFFSET 0
#define CSR_USB_IN_CTRL_EPNO_SIZE 4
#define CSR_USB_IN_CTRL_RESET_OFFSET 5
#define CSR_USB_IN_CTRL_RESET_SIZE 1
#define CSR_USB_IN_CTRL_STALL_OFFSET 6
#define CSR_USB_IN_CTRL_STALL_SIZE 1
#define CSR_USB_IN_STATUS_ADDR 0xe000482cL
#define CSR_USB_IN_STATUS_SIZE 1
static inline unsigned char usb_in_status_read(void) {
unsigned char r = csr_readl(0xe000482cL);
return r;
}
#define CSR_USB_IN_STATUS_IDLE_OFFSET 0
#define CSR_USB_IN_STATUS_IDLE_SIZE 1
#define CSR_USB_IN_STATUS_HAVE_OFFSET 4
#define CSR_USB_IN_STATUS_HAVE_SIZE 1
#define CSR_USB_IN_STATUS_PEND_OFFSET 5
#define CSR_USB_IN_STATUS_PEND_SIZE 1
#define CSR_USB_IN_EV_STATUS_ADDR 0xe0004830L
#define CSR_USB_IN_EV_STATUS_SIZE 1
static inline unsigned char usb_in_ev_status_read(void) {
unsigned char r = csr_readl(0xe0004830L);
return r;
}
static inline void usb_in_ev_status_write(unsigned char value) {
csr_writel(value, 0xe0004830L);
}
#define CSR_USB_IN_EV_PENDING_ADDR 0xe0004834L
#define CSR_USB_IN_EV_PENDING_SIZE 1
static inline unsigned char usb_in_ev_pending_read(void) {
unsigned char r = csr_readl(0xe0004834L);
return r;
}
static inline void usb_in_ev_pending_write(unsigned char value) {
csr_writel(value, 0xe0004834L);
}
#define CSR_USB_IN_EV_ENABLE_ADDR 0xe0004838L
#define CSR_USB_IN_EV_ENABLE_SIZE 1
static inline unsigned char usb_in_ev_enable_read(void) {
unsigned char r = csr_readl(0xe0004838L);
return r;
}
static inline void usb_in_ev_enable_write(unsigned char value) {
csr_writel(value, 0xe0004838L);
}
#define CSR_USB_OUT_DATA_ADDR 0xe000483cL
#define CSR_USB_OUT_DATA_SIZE 1
static inline unsigned char usb_out_data_read(void) {
unsigned char r = csr_readl(0xe000483cL);
return r;
}
#define CSR_USB_OUT_DATA_DATA_OFFSET 0
#define CSR_USB_OUT_DATA_DATA_SIZE 8
#define CSR_USB_OUT_CTRL_ADDR 0xe0004840L
#define CSR_USB_OUT_CTRL_SIZE 1
static inline unsigned char usb_out_ctrl_read(void) {
unsigned char r = csr_readl(0xe0004840L);
return r;
}
static inline void usb_out_ctrl_write(unsigned char value) {
csr_writel(value, 0xe0004840L);
}
#define CSR_USB_OUT_CTRL_EPNO_OFFSET 0
#define CSR_USB_OUT_CTRL_EPNO_SIZE 4
#define CSR_USB_OUT_CTRL_ENABLE_OFFSET 4
#define CSR_USB_OUT_CTRL_ENABLE_SIZE 1
#define CSR_USB_OUT_CTRL_RESET_OFFSET 5
#define CSR_USB_OUT_CTRL_RESET_SIZE 1
#define CSR_USB_OUT_CTRL_STALL_OFFSET 6
#define CSR_USB_OUT_CTRL_STALL_SIZE 1
#define CSR_USB_OUT_STATUS_ADDR 0xe0004844L
#define CSR_USB_OUT_STATUS_SIZE 1
static inline unsigned char usb_out_status_read(void) {
unsigned char r = csr_readl(0xe0004844L);
return r;
}
#define CSR_USB_OUT_STATUS_EPNO_OFFSET 0
#define CSR_USB_OUT_STATUS_EPNO_SIZE 4
#define CSR_USB_OUT_STATUS_HAVE_OFFSET 4
#define CSR_USB_OUT_STATUS_HAVE_SIZE 1
#define CSR_USB_OUT_STATUS_PEND_OFFSET 5
#define CSR_USB_OUT_STATUS_PEND_SIZE 1
#define CSR_USB_OUT_EV_STATUS_ADDR 0xe0004848L
#define CSR_USB_OUT_EV_STATUS_SIZE 1
static inline unsigned char usb_out_ev_status_read(void) {
unsigned char r = csr_readl(0xe0004848L);
return r;
}
static inline void usb_out_ev_status_write(unsigned char value) {
csr_writel(value, 0xe0004848L);
}
#define CSR_USB_OUT_EV_PENDING_ADDR 0xe000484cL
#define CSR_USB_OUT_EV_PENDING_SIZE 1
static inline unsigned char usb_out_ev_pending_read(void) {
unsigned char r = csr_readl(0xe000484cL);
return r;
}
static inline void usb_out_ev_pending_write(unsigned char value) {
csr_writel(value, 0xe000484cL);
}
#define CSR_USB_OUT_EV_ENABLE_ADDR 0xe0004850L
#define CSR_USB_OUT_EV_ENABLE_SIZE 1
static inline unsigned char usb_out_ev_enable_read(void) {
unsigned char r = csr_readl(0xe0004850L);
return r;
}
static inline void usb_out_ev_enable_write(unsigned char value) {
csr_writel(value, 0xe0004850L);
}
#define CSR_USB_OUT_ENABLE_STATUS_ADDR 0xe0004854L
#define CSR_USB_OUT_ENABLE_STATUS_SIZE 1
static inline unsigned char usb_out_enable_status_read(void) {
unsigned char r = csr_readl(0xe0004854L);
return r;
}
#define CSR_USB_OUT_STALL_STATUS_ADDR 0xe0004858L
#define CSR_USB_OUT_STALL_STATUS_SIZE 1
static inline unsigned char usb_out_stall_status_read(void) {
unsigned char r = csr_readl(0xe0004858L);
return r;
}
/* version */
#define CSR_VERSION_BASE 0xe0007000L
#define CSR_VERSION_MAJOR_ADDR 0xe0007000L
#define CSR_VERSION_MAJOR_SIZE 1
static inline unsigned char version_major_read(void) {
unsigned char r = csr_readl(0xe0007000L);
return r;
}
#define CSR_VERSION_MINOR_ADDR 0xe0007004L
#define CSR_VERSION_MINOR_SIZE 1
static inline unsigned char version_minor_read(void) {
unsigned char r = csr_readl(0xe0007004L);
return r;
}
#define CSR_VERSION_REVISION_ADDR 0xe0007008L
#define CSR_VERSION_REVISION_SIZE 1
static inline unsigned char version_revision_read(void) {
unsigned char r = csr_readl(0xe0007008L);
return r;
}
#define CSR_VERSION_GITREV_ADDR 0xe000700cL
#define CSR_VERSION_GITREV_SIZE 4
static inline unsigned int version_gitrev_read(void) {
unsigned int r = csr_readl(0xe000700cL);
r <<= 8;
r |= csr_readl(0xe0007010L);
r <<= 8;
r |= csr_readl(0xe0007014L);
r <<= 8;
r |= csr_readl(0xe0007018L);
return r;
}
#define CSR_VERSION_GITEXTRA_ADDR 0xe000701cL
#define CSR_VERSION_GITEXTRA_SIZE 2
static inline unsigned short int version_gitextra_read(void) {
unsigned short int r = csr_readl(0xe000701cL);
r <<= 8;
r |= csr_readl(0xe0007020L);
return r;
}
#define CSR_VERSION_DIRTY_ADDR 0xe0007024L
#define CSR_VERSION_DIRTY_SIZE 1
static inline unsigned char version_dirty_read(void) {
unsigned char r = csr_readl(0xe0007024L);
return r;
}
#define CSR_VERSION_DIRTY_DIRTY_OFFSET 0
#define CSR_VERSION_DIRTY_DIRTY_SIZE 1
#define CSR_VERSION_MODEL_ADDR 0xe0007028L
#define CSR_VERSION_MODEL_SIZE 1
static inline unsigned char version_model_read(void) {
unsigned char r = csr_readl(0xe0007028L);
return r;
}
#define CSR_VERSION_MODEL_MODEL_OFFSET 0
#define CSR_VERSION_MODEL_MODEL_SIZE 8
#define CSR_VERSION_SEED_ADDR 0xe000702cL
#define CSR_VERSION_SEED_SIZE 4
static inline unsigned int version_seed_read(void) {
unsigned int r = csr_readl(0xe000702cL);
r <<= 8;
r |= csr_readl(0xe0007030L);
r <<= 8;
r |= csr_readl(0xe0007034L);
r <<= 8;
r |= csr_readl(0xe0007038L);
return r;
}
/* constants */
#define TIMER0_INTERRUPT 2
static inline int timer0_interrupt_read(void) {
return 2;
}
#define USB_INTERRUPT 3
static inline int usb_interrupt_read(void) {
return 3;
}
#define CONFIG_BITSTREAM_SYNC_HEADER1 2123999870
static inline int config_bitstream_sync_header1_read(void) {
return 2123999870;
}
#define CONFIG_BITSTREAM_SYNC_HEADER2 2125109630
static inline int config_bitstream_sync_header2_read(void) {
return 2125109630;
}
#define CONFIG_CLOCK_FREQUENCY 12000000
static inline int config_clock_frequency_read(void) {
return 12000000;
}
#define CONFIG_CPU_RESET_ADDR 0
static inline int config_cpu_reset_addr_read(void) {
return 0;
}
#define CONFIG_CPU_TYPE "VEXRISCV"
static inline const char * config_cpu_type_read(void) {
return "VEXRISCV";
}
#define CONFIG_CPU_TYPE_VEXRISCV 1
static inline int config_cpu_type_vexriscv_read(void) {
return 1;
}
#define CONFIG_CPU_VARIANT "MIN"
static inline const char * config_cpu_variant_read(void) {
return "MIN";
}
#define CONFIG_CPU_VARIANT_MIN 1
static inline int config_cpu_variant_min_read(void) {
return 1;
}
#define CONFIG_CSR_ALIGNMENT 32
static inline int config_csr_alignment_read(void) {
return 32;
}
#define CONFIG_CSR_DATA_WIDTH 8
static inline int config_csr_data_width_read(void) {
return 8;
}
#endif

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#ifndef _HW_COMMON_H_
#define _HW_COMMON_H_
#include <stdint.h>
static inline void csr_writeb(uint8_t value, uint32_t addr)
{
*((volatile uint8_t *)addr) = value;
}
static inline uint8_t csr_readb(uint32_t addr)
{
return *(volatile uint8_t *)addr;
}
static inline void csr_writew(uint16_t value, uint32_t addr)
{
*((volatile uint16_t *)addr) = value;
}
static inline uint16_t csr_readw(uint32_t addr)
{
return *(volatile uint16_t *)addr;
}
static inline void csr_writel(uint32_t value, uint32_t addr)
{
*((volatile uint32_t *)addr) = value;
}
static inline uint32_t csr_readl(uint32_t addr)
{
return *(volatile uint32_t *)addr;
}
#endif /* _HW_COMMON_H_ */

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#ifndef __IRQ_H
#define __IRQ_H
#ifdef __cplusplus
extern "C" {
#endif
#define CSR_MSTATUS_MIE 0x8
#define CSR_IRQ_MASK 0xBC0
#define CSR_IRQ_PENDING 0xFC0
#define CSR_DCACHE_INFO 0xCC0
#define csrr(reg) ({ unsigned long __tmp; \
asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
__tmp; })
#define csrw(reg, val) ({ \
if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
asm volatile ("csrw " #reg ", %0" :: "i"(val)); \
else \
asm volatile ("csrw " #reg ", %0" :: "r"(val)); })
#define csrs(reg, bit) ({ \
if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
asm volatile ("csrrs x0, " #reg ", %0" :: "i"(bit)); \
else \
asm volatile ("csrrs x0, " #reg ", %0" :: "r"(bit)); })
#define csrc(reg, bit) ({ \
if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
asm volatile ("csrrc x0, " #reg ", %0" :: "i"(bit)); \
else \
asm volatile ("csrrc x0, " #reg ", %0" :: "r"(bit)); })
static inline unsigned int irq_getie(void)
{
return (csrr(mstatus) & CSR_MSTATUS_MIE) != 0;
}
static inline void irq_setie(unsigned int ie)
{
if(ie) csrs(mstatus,CSR_MSTATUS_MIE); else csrc(mstatus,CSR_MSTATUS_MIE);
}
static inline unsigned int irq_getmask(void)
{
unsigned int mask;
asm volatile ("csrr %0, %1" : "=r"(mask) : "i"(CSR_IRQ_MASK));
return mask;
}
static inline void irq_setmask(unsigned int mask)
{
asm volatile ("csrw %0, %1" :: "i"(CSR_IRQ_MASK), "r"(mask));
}
static inline unsigned int irq_pending(void)
{
unsigned int pending;
asm volatile ("csrr %0, %1" : "=r"(pending) : "i"(CSR_IRQ_PENDING));
return pending;
}
#ifdef __cplusplus
}
#endif
#endif /* __IRQ_H */

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OUTPUT_FORMAT("elf32-littleriscv")

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