First fully working camera capture, transfer and receive!

This commit is contained in:
Adam Prochazka
2023-04-07 21:34:59 +02:00
parent 5132e015bd
commit 2007a5de10
11 changed files with 146 additions and 310 deletions

View File

@ -121,13 +121,12 @@ void Cam_I2C_write_bulk(I2C_HandleTypeDef *hi2c, const struct sensor_reg regList
void Cam_Init(I2C_HandleTypeDef *hi2c, SPI_HandleTypeDef *hspi)
{
Cam_I2C_write(hi2c, (uint16_t)0x3008, 0x80);
Cam_I2C_write(hi2c, (uint16_t)0x3008, 0x80);
Cam_I2C_write_bulk(hi2c, OV5642_QVGA_Preview);
Cam_I2C_write_bulk(hi2c, OV5642_JPEG_Capture_QSXGA);
Cam_I2C_write_bulk(hi2c, OV5642_720P_Video_setting);
//Cam_I2C_write_bulk(hi2c, OV5642_720P_Video_setting);
Cam_I2C_write(hi2c, (uint16_t)0x3818, 0xa8); // TIMING CONTROL - ENABLE COMPRESSION, THUMBNAIL MODE DISABLE, VERTICAL FLIP, MIRROR
Cam_I2C_write(hi2c, (uint16_t)0x3621, 0x10); // REGISTER FOR CORRECT MIRROR FUNCTION
@ -138,7 +137,7 @@ void Cam_Init(I2C_HandleTypeDef *hi2c, SPI_HandleTypeDef *hspi)
// Setup camera, H-sync: High, V-sync:high, Sensor_delay: no Delay, FIFO_mode:FIFO enabled, power_mode:Low_power
Cam_SPI_write(hspi, 0x03, 0x02);
Cam_SPI_write(hspi, 0x01, 0x01); // Capture Control Register - Set to capture n+1 frames
Cam_SPI_write(hspi, 0x01, 0x00); // Capture Control Register - Set to capture n+1 frames
HAL_Delay(5);
}
@ -155,7 +154,7 @@ int Cam_FIFO_length(SPI_HandleTypeDef *hspi)
void Cam_Start_Capture(SPI_HandleTypeDef *hspi)
{
/*
uint8_t FIFO_Reg = Cam_SPI_read(hspi, 0x04);
uint8_t FIFO_Reg_Clear_Flags = FIFO_Reg | 0x01;
Cam_SPI_write(hspi, 0x04, FIFO_Reg_Clear_Flags); // Clear FIFO Write Done Flaf
@ -172,6 +171,9 @@ void Cam_Start_Capture(SPI_HandleTypeDef *hspi)
FIFO_Reg_Clear_Flags = FIFO_Reg | 0x20;
Cam_SPI_write(hspi, 0x04, FIFO_Reg_Clear_Flags); // Reset FIFO Read Pointer
Cam_SPI_write(hspi, 0x04, FIFO_Reg_Clear_Flags);
*/
Cam_SPI_write(hspi, 0x04, 0x01); // Start capture
Cam_SPI_write(hspi, 0x04, 0x01); // Start capture
HAL_Delay(1);
Cam_SPI_write(hspi, 0x04, 0x02); // Start capture
@ -192,10 +194,12 @@ void Cam_Wait_Capture_Done(SPI_HandleTypeDef *hspi)
void Cam_Start_Burst_Read(SPI_HandleTypeDef *hspi)
{
/*
uint8_t FIFO_Reg = Cam_SPI_read(hspi, 0x04);
uint8_t FIFO_Reg_Clear_Flags = FIFO_Reg | 0x20;
Cam_SPI_write(hspi, 0x04, FIFO_Reg_Clear_Flags); // Reset FIFO Read Pointer
Cam_SPI_write(hspi, 0x04, FIFO_Reg_Clear_Flags);
*/
uint8_t BURST_FIFO_READ = 0x3c;
uint8_t empty = 0x00;

View File

@ -127,7 +127,7 @@ void cdc_task(void)
}
*/
uint8_t sendT[600] = {
uint8_t sendT[700] = {
0xff, 0xd8, 0xff, 0xdb, 0x00, 0x43, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
@ -166,7 +166,14 @@ uint8_t sendT[600] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
/*
@ -274,18 +281,19 @@ int main(void)
uint16_t image_size = Cam_FIFO_length(&hspi1);
uint8_t image_data[10000];
//memset(image_data, 0x00, image_size);
memset(image_data, 0x00, 10000);
Cam_Start_Burst_Read(&hspi1);
HAL_SPI_Receive_DMA(&hspi1, image_data, image_size);
//HAL_SPI_Receive(&hspi1, image_data, image_size, HAL_MAX_DELAY);
//HAL_SPI_Receive_DMA(&hspi1, image_data, 10000);
HAL_SPI_Receive(&hspi1, image_data, 10000, HAL_MAX_DELAY);
LED_On();
while (SPI_Rx_Done_Flag == 0)
{
// Wait for SPI transfer to finish
break;
}
LED_On();
CS_Off();
SPI_Rx_Done_Flag = 0;
@ -298,12 +306,15 @@ int main(void)
tud_task();
if(currentSendingIndex >= 9989){
if(currentSendingIndex >= 9949){
//if(false){
currentSendingIndex = 0;
//free(image_data);
Cam_Capture(&hspi1);
for(int i = 0; i < 10000; i++) image_data[i] = 0x00;
Cam_Init(&hi2c1, &hspi1);
Cam_Capture(&hspi1);
image_size = Cam_FIFO_length(&hspi1);
@ -312,29 +323,31 @@ int main(void)
Cam_Start_Burst_Read(&hspi1);
HAL_SPI_Receive_DMA(&hspi1, image_data, 10000);
HAL_SPI_Receive(&hspi1, image_data, 10000, HAL_MAX_DELAY);
//Debug_LED_On();
while (SPI_Rx_Done_Flag == 0)
{
// Wait for SPI transfer to finish
tud_task();
//tud_task();
break;
}
CS_Off();
SPI_Rx_Done_Flag = 0;
//SPI_Rx_Done_Flag = 0;
if(image_size < 1){
currentSendingIndex = 10000;
currentSendingIndex = 10000;
LED_On();
}
}
else {
LED_On();
//tud_cdc_write("11111111\r\n", 10);
//tud_cdc_write_flush();
//tud_cdc_write(&sendT[currentSendingIndex], 10);
tud_cdc_write(&image_data[currentSendingIndex], 10);
//tud_cdc_write(&sendT[currentSendingIndex], 50);
tud_cdc_write(&image_data[currentSendingIndex], 50);
tud_cdc_write_flush();
currentSendingIndex = currentSendingIndex + 10;
currentSendingIndex = currentSendingIndex + 50;
HAL_Delay(5);
}