From 58b09c93aba147840a6cedd21b3ee11d10ef5bbe Mon Sep 17 00:00:00 2001 From: Adam Prochazka Date: Tue, 11 Apr 2023 00:45:22 +0200 Subject: [PATCH] Auto config, no need to init before each capture, 320x240 cca 5fps --- Firmware/Core/Cam/Cam.c | 38 +- Firmware/Core/Cam/OV5642_regs.h | 1456 +++++++++++++++---------------- Firmware/Core/Inc/main.h | 2 +- Firmware/Core/Src/main.c | 164 +--- 4 files changed, 752 insertions(+), 908 deletions(-) diff --git a/Firmware/Core/Cam/Cam.c b/Firmware/Core/Cam/Cam.c index 944331d..a534516 100644 --- a/Firmware/Core/Cam/Cam.c +++ b/Firmware/Core/Cam/Cam.c @@ -120,27 +120,37 @@ void Cam_I2C_write_bulk(I2C_HandleTypeDef *hi2c, const struct sensor_reg regList void Cam_Init(I2C_HandleTypeDef *hi2c, SPI_HandleTypeDef *hspi) { - Cam_I2C_write(hi2c, (uint16_t)0x3008, 0x80); + Cam_SPI_write(hspi, 0x07, 0x80); + HAL_Delay(100); + Cam_SPI_write(hspi, 0x07, 0x00); + HAL_Delay(100); + //Cam_SPI_write(hspi, 0x00, 0x55); + HAL_Delay(5); + Cam_I2C_write(hi2c, (uint16_t)0x3008, 0x80); +HAL_Delay(5); Cam_I2C_write_bulk(hi2c, OV5642_QVGA_Preview); - +HAL_Delay(200); Cam_I2C_write_bulk(hi2c, OV5642_JPEG_Capture_QSXGA); - + Cam_I2C_write_bulk(hi2c, ov5642_320x240); +HAL_Delay(100); //Cam_I2C_write_bulk(hi2c, OV5642_720P_Video_setting); Cam_I2C_write(hi2c, (uint16_t)0x3818, 0xa8); // TIMING CONTROL - ENABLE COMPRESSION, THUMBNAIL MODE DISABLE, VERTICAL FLIP, MIRROR Cam_I2C_write(hi2c, (uint16_t)0x3621, 0x10); // REGISTER FOR CORRECT MIRROR FUNCTION Cam_I2C_write(hi2c, (uint16_t)0x3801, 0xb0); // TIMING HORIZONTAL START - ALSO FOR MIRROR Cam_I2C_write(hi2c, (uint16_t)0x4407, 0x04); // COMPRESSION CONTROL - Cam_I2C_write(hi2c, (uint16_t)0x5000, 0xFF); - - - Cam_I2C_write_bulk(hi2c, ov5642_1024x768); - + //Cam_I2C_write(hi2c, (uint16_t)0x5000, 0xFF); +HAL_Delay(5); // Setup camera, H-sync: High, V-sync:high, Sensor_delay: no Delay, FIFO_mode:FIFO enabled, power_mode:Low_power Cam_SPI_write(hspi, 0x03, 0x02); +HAL_Delay(5); + //Cam_I2C_write_bulk(hi2c, ov5642_1024x768); + Cam_I2C_write_bulk(hi2c, ov5642_320x240); +HAL_Delay(1000); + Cam_SPI_write(hspi, 0x04, 0x01); +HAL_Delay(5); Cam_SPI_write(hspi, 0x01, 0x00); // Capture Control Register - Set to capture n+1 frames - HAL_Delay(5); /* Cam_I2C_write(hi2c, (uint16_t)0x3008, 0x80); @@ -275,9 +285,8 @@ void Cam_Refresh(I2C_HandleTypeDef *hi2c, SPI_HandleTypeDef *hspi){ Cam_I2C_write(hi2c, (uint16_t)0x3404, 0xf); Cam_I2C_write(hi2c, (uint16_t)0x3405, 0xff); - Cam_SPI_write(hspi, 0x01, 0x00); // Capture Control Register - Set to capture n+1 frames - HAL_Delay(5); + HAL_Delay(50); } int Cam_FIFO_length(SPI_HandleTypeDef *hspi) @@ -311,11 +320,12 @@ void Cam_Start_Capture(SPI_HandleTypeDef *hspi) Cam_SPI_write(hspi, 0x04, FIFO_Reg_Clear_Flags); */ Cam_SPI_write(hspi, 0x04, 0x01); + HAL_Delay(3); Cam_SPI_write(hspi, 0x04, 0x01); - HAL_Delay(10); + HAL_Delay(3); Cam_SPI_write(hspi, 0x04, 0x02); // Start capture - HAL_Delay(10); + HAL_Delay(3); } void Cam_Wait_Capture_Done(SPI_HandleTypeDef *hspi) @@ -354,6 +364,8 @@ void Cam_Capture(SPI_HandleTypeDef *hspi) { //LED_On(); + Cam_SPI_write(hspi, 0x01, 0x00); // Capture Control Register - Set to capture n+1 frames + Cam_Start_Capture(hspi); Cam_Wait_Capture_Done(hspi); diff --git a/Firmware/Core/Cam/OV5642_regs.h b/Firmware/Core/Cam/OV5642_regs.h index 6456a26..24c611d 100644 --- a/Firmware/Core/Cam/OV5642_regs.h +++ b/Firmware/Core/Cam/OV5642_regs.h @@ -9,67 +9,35 @@ typedef struct sensor_reg uint8_t val; } sensor_reg; -static const struct sensor_reg ov5642_320x240[] = - { - /**************************Small viewing angle and fast frame rate*************/ - // {0x3800 ,0x4 }, - // {0x3801 ,0xb0}, - // {0x3802 ,0x2 }, - // {0x3803 ,0xbc}, - // {0x3804 ,0x6 }, - // {0x3805 ,0x40}, - // {0x3806 ,0x4 }, - // {0x3807 ,0xb0}, - // {0x3808 ,0x1 }, - // {0x3809 ,0x40}, - // {0x380a ,0x0 }, - // {0x380b ,0xF0}, - // {0x380c ,0xb }, - // {0x380d ,0x20}, - // {0x380e ,0x7 }, - // {0x380f ,0xD0}, - // {0x5001 ,0x7f}, - // {0x5680 ,0x4 }, - // {0x5681 ,0xb0}, - // {0x5682 ,0x6}, - // {0x5683 ,0x40}, - // {0x5684 ,0x2 }, - // {0x5685 ,0xbc}, - // {0x5686 ,0x4 }, - // {0x5687 ,0xb0}, - // {0x3011 ,0x0F}, //bit[5:0] div - // {0xffff, 0xff}, - /**************************Small viewing angle and fast frame rate*************/ - - /**************************Large viewing angle, slow frame rate*************/ - {0x3800, 0x1}, - {0x3801, 0xa8}, - {0x3802, 0x0}, - {0x3803, 0xA}, - {0x3804, 0xA}, - {0x3805, 0x20}, - {0x3806, 0x7}, - {0x3807, 0x98}, - {0x3808, 0x1}, - {0x3809, 0x40}, - {0x380a, 0x0}, - {0x380b, 0xF0}, - {0x380c, 0xc}, - {0x380d, 0x80}, - {0x380e, 0x7}, - {0x380f, 0xd0}, - {0x5001, 0x7f}, - {0x5680, 0x0}, - {0x5681, 0x0}, - {0x5682, 0xA}, - {0x5683, 0x20}, - {0x5684, 0x0}, - {0x5685, 0x0}, - {0x5686, 0x7}, - {0x5687, 0x98}, - {0x3011, 0x0F}, // bit[5:0] div - {0xffff, 0xff}, - /**************************Large viewing angle, slow frame rate*************/ +static const struct sensor_reg ov5642_320x240[] = +{ + {0x3800 ,0x1 }, + {0x3801 ,0xa8}, + {0x3802 ,0x0 }, + {0x3803 ,0xA }, + {0x3804 ,0xA }, + {0x3805 ,0x20}, + {0x3806 ,0x7 }, + {0x3807 ,0x98}, + {0x3808 ,0x1 }, + {0x3809 ,0x40}, + {0x380a ,0x0 }, + {0x380b ,0xF0}, + {0x380c ,0xc }, + {0x380d ,0x80}, + {0x380e ,0x7 }, + {0x380f ,0xd0}, + {0x5001 ,0x7f}, + {0x5680 ,0x0 }, + {0x5681 ,0x0 }, + {0x5682 ,0xA }, + {0x5683 ,0x20}, + {0x5684 ,0x0 }, + {0x5685 ,0x0 }, + {0x5686 ,0x7 }, + {0x5687 ,0x98}, + {0x3801, 0xb0}, + {0xffff, 0xff}, }; static const struct sensor_reg ov5642_640x480[] = @@ -85,21 +53,21 @@ static const struct sensor_reg ov5642_640x480[] = {0x3808, 0x2}, {0x3809, 0x80}, {0x380a, 0x1}, - {0x380b, 0xe0}, - {0x380c, 0xc}, - {0x380d, 0x80}, - {0x380e, 0x7}, - {0x380f, 0xd0}, - {0x5001, 0x7f}, - {0x5680, 0x0}, - {0x5681, 0x0}, - {0x5682, 0xA}, - {0x5683, 0x20}, - {0x5684, 0x0}, - {0x5685, 0x0}, - {0x5686, 0x7}, - {0x5687, 0x98}, - {0x3801, 0xb0}, + {0x380b, 0xe0}, + {0x380c, 0xc}, // + {0x380d, 0x80}, // + {0x380e, 0x7}, // + {0x380f, 0xd0}, // + {0x5001, 0x7f}, // + {0x5680, 0x0}, // + {0x5681, 0x0}, // + {0x5682, 0xA}, // + {0x5683, 0x20}, // + {0x5684, 0x0}, // + {0x5685, 0x0}, // + {0x5686, 0x7}, // + {0x5687, 0x98}, // + {0x3801, 0xb0}, // {0xffff, 0xff}, }; @@ -329,601 +297,604 @@ static const struct sensor_reg ov5642_dvp_zoom8[] = {0xffff, 0xff}, }; -static const struct sensor_reg OV5642_QVGA_Preview[] = - { - {0x3103, 0x93}, - {0x3008, 0x82}, - {0x3017, 0x7f}, - {0x3018, 0xfc}, - {0x3810, 0xc2}, - {0x3615, 0xf0}, - {0x3000, 0x00}, - {0x3001, 0x00}, - {0x3002, 0x5c}, - {0x3003, 0x00}, - {0x3004, 0xff}, - {0x3005, 0xff}, - {0x3006, 0x43}, - {0x3007, 0x37}, - {0x3011, 0x08}, - {0x3010, 0x10}, - {0x460c, 0x22}, - {0x3815, 0x04}, - {0x370c, 0xa0}, - {0x3602, 0xfc}, - {0x3612, 0xff}, - {0x3634, 0xc0}, - {0x3613, 0x00}, - {0x3605, 0x7c}, - {0x3621, 0x09}, - {0x3622, 0x60}, - {0x3604, 0x40}, - {0x3603, 0xa7}, - {0x3603, 0x27}, - {0x4000, 0x21}, - {0x401d, 0x22}, - {0x3600, 0x54}, - {0x3605, 0x04}, - {0x3606, 0x3f}, - {0x3c01, 0x80}, - {0x5000, 0x4f}, - {0x5020, 0x04}, - {0x5181, 0x79}, - {0x5182, 0x00}, - {0x5185, 0x22}, - {0x5197, 0x01}, - {0x5001, 0xff}, - {0x5500, 0x0a}, - {0x5504, 0x00}, - {0x5505, 0x7f}, - {0x5080, 0x08}, - {0x300e, 0x18}, - {0x4610, 0x00}, - {0x471d, 0x05}, - {0x4708, 0x06}, - {0x3808, 0x02}, - {0x3809, 0x80}, - {0x380a, 0x01}, - {0x380b, 0xe0}, - {0x380e, 0x07}, - {0x380f, 0xd0}, - {0x501f, 0x00}, - {0x5000, 0x4f}, - {0x4300, 0x30}, - {0x3503, 0x07}, - {0x3501, 0x73}, - {0x3502, 0x80}, - {0x350b, 0x00}, - {0x3503, 0x07}, - {0x3824, 0x11}, - {0x3501, 0x1e}, - {0x3502, 0x80}, - {0x350b, 0x7f}, - {0x380c, 0x0c}, - {0x380d, 0x80}, - {0x380e, 0x03}, - {0x380f, 0xe8}, - {0x3a0d, 0x04}, - {0x3a0e, 0x03}, - {0x3818, 0xc1}, - {0x3705, 0xdb}, - {0x370a, 0x81}, - {0x3801, 0x80}, - {0x3621, 0x87}, - {0x3801, 0x50}, - {0x3803, 0x08}, - {0x3827, 0x08}, - {0x3810, 0x40}, - {0x3804, 0x05}, - {0x3805, 0x00}, - {0x5682, 0x05}, - {0x5683, 0x00}, - {0x3806, 0x03}, - {0x3807, 0xc0}, - {0x5686, 0x03}, - {0x5687, 0xbc}, - {0x3a00, 0x78}, - {0x3a1a, 0x05}, - {0x3a13, 0x30}, - {0x3a18, 0x00}, - {0x3a19, 0x7c}, - {0x3a08, 0x12}, - {0x3a09, 0xc0}, - {0x3a0a, 0x0f}, - {0x3a0b, 0xa0}, - {0x350c, 0x07}, - {0x350d, 0xd0}, - {0x3500, 0x00}, - {0x3501, 0x00}, - {0x3502, 0x00}, - {0x350a, 0x00}, - {0x350b, 0x00}, - {0x3503, 0x00}, - {0x528a, 0x02}, - {0x528b, 0x04}, - {0x528c, 0x08}, - {0x528d, 0x08}, - {0x528e, 0x08}, - {0x528f, 0x10}, - {0x5290, 0x10}, - {0x5292, 0x00}, - {0x5293, 0x02}, - {0x5294, 0x00}, - {0x5295, 0x02}, - {0x5296, 0x00}, - {0x5297, 0x02}, - {0x5298, 0x00}, - {0x5299, 0x02}, - {0x529a, 0x00}, - {0x529b, 0x02}, - {0x529c, 0x00}, - {0x529d, 0x02}, - {0x529e, 0x00}, - {0x529f, 0x02}, - {0x3030, 0x0b}, - {0x3a02, 0x00}, - {0x3a03, 0x7d}, - {0x3a04, 0x00}, - {0x3a14, 0x00}, - {0x3a15, 0x7d}, - {0x3a16, 0x00}, - {0x3a00, 0x78}, - {0x3a08, 0x09}, - {0x3a09, 0x60}, - {0x3a0a, 0x07}, - {0x3a0b, 0xd0}, - {0x3a0d, 0x08}, - {0x3a0e, 0x06}, - {0x5193, 0x70}, - {0x589b, 0x04}, - {0x589a, 0xc5}, - {0x401e, 0x20}, - {0x4001, 0x42}, - {0x401c, 0x04}, - {0x528a, 0x01}, - {0x528b, 0x04}, - {0x528c, 0x08}, - {0x528d, 0x10}, - {0x528e, 0x20}, - {0x528f, 0x28}, - {0x5290, 0x30}, - {0x5292, 0x00}, - {0x5293, 0x01}, - {0x5294, 0x00}, - {0x5295, 0x04}, - {0x5296, 0x00}, - {0x5297, 0x08}, - {0x5298, 0x00}, - {0x5299, 0x10}, - {0x529a, 0x00}, - {0x529b, 0x20}, - {0x529c, 0x00}, - {0x529d, 0x28}, - {0x529e, 0x00}, - {0x529f, 0x30}, - {0x5282, 0x00}, - {0x5300, 0x00}, - {0x5301, 0x20}, - {0x5302, 0x00}, - {0x5303, 0x7c}, - {0x530c, 0x00}, - {0x530d, 0x0c}, - {0x530e, 0x20}, - {0x530f, 0x80}, - {0x5310, 0x20}, - {0x5311, 0x80}, - {0x5308, 0x20}, - {0x5309, 0x40}, - {0x5304, 0x00}, - {0x5305, 0x30}, - {0x5306, 0x00}, - {0x5307, 0x80}, - {0x5314, 0x08}, - {0x5315, 0x20}, - {0x5319, 0x30}, - {0x5316, 0x10}, - {0x5317, 0x00}, - {0x5318, 0x02}, - {0x5402, 0x3f}, - {0x5403, 0x00}, - {0x3406, 0x00}, - {0x5180, 0xff}, - {0x5181, 0x52}, - {0x5182, 0x11}, - {0x5183, 0x14}, - {0x5184, 0x25}, - {0x5185, 0x24}, - {0x5186, 0x06}, - {0x5187, 0x08}, - {0x5188, 0x08}, - {0x5189, 0x7c}, - {0x518a, 0x60}, - {0x518b, 0xb2}, - {0x518c, 0xb2}, - {0x518d, 0x44}, - {0x518e, 0x3d}, - {0x518f, 0x58}, - {0x5190, 0x46}, - {0x5191, 0xf8}, - {0x5192, 0x04}, - {0x5193, 0x70}, - {0x5194, 0xf0}, - {0x5195, 0xf0}, - {0x5196, 0x03}, - {0x5197, 0x01}, - {0x5198, 0x04}, - {0x5199, 0x12}, - {0x519a, 0x04}, - {0x519b, 0x00}, - {0x519c, 0x06}, - {0x519d, 0x82}, - {0x519e, 0x00}, - {0x5025, 0x80}, - {0x5583, 0x40}, - {0x5584, 0x40}, - {0x5580, 0x02}, - {0x5000, 0xcf}, - {0x3710, 0x10}, - {0x3632, 0x51}, - {0x3702, 0x10}, - {0x3703, 0xb2}, - {0x3704, 0x18}, - {0x370b, 0x40}, - {0x370d, 0x03}, - {0x3631, 0x01}, - {0x3632, 0x52}, - {0x3606, 0x24}, - {0x3620, 0x96}, - {0x5785, 0x07}, - {0x3a13, 0x30}, - {0x3600, 0x52}, - {0x3604, 0x48}, - {0x3606, 0x1b}, - {0x370d, 0x0b}, - {0x370f, 0xc0}, - {0x3709, 0x01}, - {0x3823, 0x00}, - {0x5007, 0x00}, - {0x5009, 0x00}, - {0x5011, 0x00}, - {0x5013, 0x00}, - {0x519e, 0x00}, - {0x5086, 0x00}, - {0x5087, 0x00}, - {0x5088, 0x00}, - {0x5089, 0x00}, - {0x302b, 0x00}, - {0x3808, 0x01}, - {0x3809, 0x40}, - {0x380a, 0x00}, - {0x380b, 0xf0}, - {0x3a00, 0x78}, - {0x5001, 0xFF}, - {0x5583, 0x50}, - {0x5584, 0x50}, - {0x5580, 0x02}, - {0x3c01, 0x80}, - {0x3c00, 0x04}, +static const struct sensor_reg OV5642_QVGA_Preview[] = +{ + {0x3103 ,0x93}, + {0x3008 ,0x82}, + {0x3017 ,0x7f}, + {0x3018 ,0xfc}, + {0x3810 ,0xc2}, + {0x3615 ,0xf0}, + {0x3000 ,0x00}, + {0x3001 ,0x00}, + {0x3002 ,0x5c}, + {0x3003 ,0x00}, + {0x3004 ,0xff}, + {0x3005 ,0xff}, + {0x3006 ,0x43}, + {0x3007 ,0x37}, + {0x3011 ,0x08}, + {0x3010 ,0x10}, + {0x460c ,0x22}, + {0x3815 ,0x04}, + {0x370c ,0xa0}, + {0x3602 ,0xfc}, + {0x3612 ,0xff}, + {0x3634 ,0xc0}, + {0x3613 ,0x00}, + {0x3605 ,0x7c}, + {0x3621 ,0x09}, + {0x3622 ,0x60}, + {0x3604 ,0x40}, + {0x3603 ,0xa7}, + {0x3603 ,0x27}, + {0x4000 ,0x21}, + {0x401d ,0x22}, + {0x3600 ,0x54}, + {0x3605 ,0x04}, + {0x3606 ,0x3f}, + {0x3c01 ,0x80}, + {0x5000 ,0x4f}, + {0x5020 ,0x04}, + {0x5181 ,0x79}, + {0x5182 ,0x00}, + {0x5185 ,0x22}, + {0x5197 ,0x01}, + {0x5001 ,0xff}, + {0x5500 ,0x0a}, + {0x5504 ,0x00}, + {0x5505 ,0x7f}, + {0x5080 ,0x08}, + {0x300e ,0x18}, + {0x4610 ,0x00}, + {0x471d ,0x05}, + {0x4708 ,0x06}, + {0x3808 ,0x02}, + {0x3809 ,0x80}, + {0x380a ,0x01}, + {0x380b ,0xe0}, + {0x380e ,0x07}, + {0x380f ,0xd0}, + {0x501f ,0x00}, + {0x5000 ,0x4f}, + {0x4300 ,0x30}, + {0x3503 ,0x07}, + {0x3501 ,0x73}, + {0x3502 ,0x80}, + {0x350b ,0x00}, + {0x3503 ,0x07}, + {0x3824 ,0x11}, + {0x3501 ,0x1e}, + {0x3502 ,0x80}, + {0x350b ,0x7f}, + {0x380c ,0x0c}, + {0x380d ,0x80}, + {0x380e ,0x03}, + {0x380f ,0xe8}, + {0x3a0d ,0x04}, + {0x3a0e ,0x03}, + {0x3818 ,0xc1}, + {0x3705 ,0xdb}, + {0x370a ,0x81}, + {0x3801 ,0x80}, + {0x3621 ,0x87}, + {0x3801 ,0x50}, + {0x3803 ,0x08}, + {0x3827 ,0x08}, + {0x3810 ,0x40}, + {0x3804 ,0x05}, + {0x3805 ,0x00}, + {0x5682 ,0x05}, + {0x5683 ,0x00}, + {0x3806 ,0x03}, + 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- {0x5839, 0x39}, - {0x583a, 0x27}, - {0x583b, 0x1f}, - {0x583c, 0x1e}, - {0x583d, 0x23}, - {0x583e, 0x2f}, - {0x583f, 0x41}, - {0x5840, 0xe}, - {0x5841, 0xc}, - {0x5842, 0xd}, - {0x5843, 0xc}, - {0x5844, 0xc}, - {0x5845, 0xc}, - {0x5846, 0xc}, - {0x5847, 0xc}, - {0x5848, 0xd}, - {0x5849, 0xe}, - {0x584a, 0xe}, - {0x584b, 0xa}, - {0x584c, 0xe}, - {0x584d, 0xe}, - {0x584e, 0x10}, - {0x584f, 0x10}, - {0x5850, 0x11}, - {0x5851, 0xa}, - {0x5852, 0xf}, - {0x5853, 0xe}, - {0x5854, 0x10}, - {0x5855, 0x10}, - {0x5856, 0x10}, - {0x5857, 0xa}, - {0x5858, 0xe}, - {0x5859, 0xe}, - {0x585a, 0xf}, - {0x585b, 0xf}, - {0x585c, 0xf}, - {0x585d, 0xa}, - {0x585e, 0x9}, - {0x585f, 0xd}, - {0x5860, 0xc}, - {0x5861, 0xb}, - {0x5862, 0xd}, - {0x5863, 0x7}, - {0x5864, 0x17}, - {0x5865, 0x14}, - {0x5866, 0x18}, - {0x5867, 0x18}, - {0x5868, 0x16}, - {0x5869, 0x12}, - {0x586a, 0x1b}, - {0x586b, 0x1a}, - {0x586c, 0x16}, - {0x586d, 0x16}, - {0x586e, 0x18}, - {0x586f, 0x1f}, - {0x5870, 0x1c}, - {0x5871, 0x16}, - {0x5872, 0x10}, - {0x5873, 0xf}, - {0x5874, 0x13}, - {0x5875, 0x1c}, - {0x5876, 0x1e}, - {0x5877, 0x17}, - {0x5878, 0x11}, - {0x5879, 0x11}, - {0x587a, 0x14}, - {0x587b, 0x1e}, - {0x587c, 0x1c}, - {0x587d, 0x1c}, - {0x587e, 0x1a}, - {0x587f, 0x1a}, - {0x5880, 0x1b}, - {0x5881, 0x1f}, - {0x5882, 0x14}, - {0x5883, 0x1a}, - {0x5884, 0x1d}, - {0x5885, 0x1e}, - {0x5886, 0x1a}, - {0x5887, 0x1a}, - {0x5180, 0xff}, - {0x5181, 0x52}, - {0x5182, 0x11}, - {0x5183, 0x14}, - {0x5184, 0x25}, - {0x5185, 0x24}, - {0x5186, 0x14}, - {0x5187, 0x14}, - {0x5188, 0x14}, - {0x5189, 0x69}, - {0x518a, 0x60}, - {0x518b, 0xa2}, - {0x518c, 0x9c}, - {0x518d, 0x36}, - {0x518e, 0x34}, - {0x518f, 0x54}, - {0x5190, 0x4c}, - {0x5191, 0xf8}, - {0x5192, 0x04}, - {0x5193, 0x70}, - {0x5194, 0xf0}, - {0x5195, 0xf0}, - {0x5196, 0x03}, - {0x5197, 0x01}, - {0x5198, 0x05}, - {0x5199, 0x2f}, - {0x519a, 0x04}, - {0x519b, 0x00}, - {0x519c, 0x06}, - {0x519d, 0xa0}, - {0x519e, 0xa0}, - - {0x528a, 0x00}, - {0x528b, 0x01}, - {0x528c, 0x04}, - {0x528d, 0x08}, - {0x528e, 0x10}, - {0x528f, 0x20}, - {0x5290, 0x30}, - {0x5292, 0x00}, - {0x5293, 0x00}, - {0x5294, 0x00}, - {0x5295, 0x01}, - {0x5296, 0x00}, - {0x5297, 0x04}, - {0x5298, 0x00}, - {0x5299, 0x08}, - {0x529a, 0x00}, - {0x529b, 0x10}, - {0x529c, 0x00}, - {0x529d, 0x20}, - {0x529e, 0x00}, - {0x529f, 0x30}, - {0x5282, 0x00}, - {0x5300, 0x00}, - {0x5301, 0x20}, - {0x5302, 0x00}, - {0x5303, 0x7c}, - {0x530c, 0x00}, - {0x530d, 0x10}, - {0x530e, 0x20}, - {0x530f, 0x80}, - {0x5310, 0x20}, - {0x5311, 0x80}, - {0x5308, 0x20}, - {0x5309, 0x40}, - {0x5304, 0x00}, - {0x5305, 0x30}, - {0x5306, 0x00}, - {0x5307, 0x80}, - {0x5314, 0x08}, - {0x5315, 0x20}, - {0x5319, 0x30}, - {0x5316, 0x10}, - {0x5317, 0x00}, - {0x5318, 0x02}, - - {0x5380, 0x01}, - {0x5381, 0x00}, - {0x5382, 0x00}, - {0x5383, 0x1f}, - {0x5384, 0x00}, - {0x5385, 0x06}, - {0x5386, 0x00}, - {0x5387, 0x00}, - {0x5388, 0x00}, - {0x5389, 0xE1}, - {0x538A, 0x00}, - {0x538B, 0x2B}, - {0x538C, 0x00}, - {0x538D, 0x00}, - {0x538E, 0x00}, - {0x538F, 0x10}, - {0x5390, 0x00}, - {0x5391, 0xB3}, - {0x5392, 0x00}, - {0x5393, 0xA6}, - {0x5394, 0x08}, - - {0x5480, 0x0c}, - {0x5481, 0x18}, - {0x5482, 0x2f}, - {0x5483, 0x55}, - {0x5484, 0x64}, - {0x5485, 0x71}, - {0x5486, 0x7d}, - {0x5487, 0x87}, - {0x5488, 0x91}, - {0x5489, 0x9a}, - {0x548A, 0xaa}, - {0x548B, 0xb8}, - {0x548C, 0xcd}, - {0x548D, 0xdd}, - {0x548E, 0xea}, - {0x548F, 0x1d}, - {0x5490, 0x05}, - {0x5491, 0x00}, - {0x5492, 0x04}, - {0x5493, 0x20}, - {0x5494, 0x03}, - {0x5495, 0x60}, - {0x5496, 0x02}, - {0x5497, 0xB8}, - {0x5498, 0x02}, - {0x5499, 0x86}, - {0x549A, 0x02}, - {0x549B, 0x5B}, - {0x549C, 0x02}, - {0x549D, 0x3B}, - {0x549E, 0x02}, - {0x549F, 0x1C}, - {0x54A0, 0x02}, - {0x54A1, 0x04}, - {0x54A2, 0x01}, - {0x54A3, 0xED}, - {0x54A4, 0x01}, - {0x54A5, 0xC5}, - {0x54A6, 0x01}, - {0x54A7, 0xA5}, - {0x54A8, 0x01}, - {0x54A9, 0x6C}, - {0x54AA, 0x01}, - {0x54AB, 0x41}, - {0x54AC, 0x01}, - {0x54AD, 0x20}, - {0x54AE, 0x00}, - {0x54AF, 0x16}, - {0x54B0, 0x01}, - {0x54B1, 0x20}, - {0x54B2, 0x00}, - {0x54B3, 0x10}, - {0x54B4, 0x00}, - {0x54B5, 0xf0}, - {0x54B6, 0x00}, - {0x54B7, 0xDF}, - {0x5402, 0x3f}, - {0x5403, 0x00}, - - {0x5500, 0x10}, - {0x5502, 0x00}, - {0x5503, 0x06}, - {0x5504, 0x00}, - {0x5505, 0x7f}, - {0x5025, 0x80}, - {0x3a0f, 0x30}, - {0x3a10, 0x28}, - {0x3a1b, 0x30}, - {0x3a1e, 0x28}, - {0x3a11, 0x61}, - {0x3a1f, 0x10}, - {0x5688, 0xfd}, - {0x5689, 0xdf}, - {0x568a, 0xfe}, - {0x568b, 0xef}, - {0x568c, 0xfe}, - {0x568d, 0xef}, - {0x568e, 0xaa}, - {0x568f, 0xaa}, + {0xffff,0xff}, +}; - {0xffff, 0xff}, -}; static const struct sensor_reg OV5642_JPEG_Capture_QSXGA[] = { @@ -931,82 +902,81 @@ static const struct sensor_reg OV5642_JPEG_Capture_QSXGA[] = // 24 MHz input clock, 24Mhz pclk // jpeg mode 7.5fps - {0x3503, 0x07}, // AEC Manual Mode Control - {0x3000, 0x00}, // SYSTEM RESET00 - {0x3001, 0x00}, // Reset for Individual Block - {0x3002, 0x00}, // Reset for Individual Block - {0x3003, 0x00}, // Reset for Individual Block - {0x3005, 0xff}, // Clock Enable Control - {0x3006, 0xff}, // Clock Enable Control - {0x3007, 0x3f}, // Clock Enable Control - {0x350c, 0x07}, // AEC VTS Output high bits - {0x350d, 0xd0}, // AEC VTS Output low bits - {0x3602, 0xe4}, // Analog Control Registers - {0x3612, 0xac}, // Analog Control Registers - {0x3613, 0x44}, // Analog Control Registers - {0x3621, 0x27}, // Array Control 01 - {0x3622, 0x08}, // Analog Control Registers - {0x3623, 0x22}, // Analog Control Registers - {0x3604, 0x60}, // Analog Control Registers - {0x3705, 0xda}, // Analog Control Registers - {0x370a, 0x80}, // Analog Control Registers - {0x3801, 0x8a}, // HS - {0x3803, 0x0a}, // VS - {0x3804, 0x0a}, // HW - {0x3805, 0x20}, // HW - {0x3806, 0x07}, // VH - {0x3807, 0x98}, // VH - {0x3808, 0x0a}, // DVPHO - {0x3809, 0x20}, // DVPHO - {0x380a, 0x07}, // DVPVO - {0x380b, 0x98}, // DVPVO - {0x380c, 0x0c}, // HTS - {0x380d, 0x80}, // HTS - {0x380e, 0x07}, // VTS - {0x380f, 0xd0}, // VTS - {0x3810, 0xc2}, - {0x3815, 0x44}, - {0x3818, 0xc8}, // Mirror NO, Compression enable - {0x3824, 0x01}, // RSV - {0x3827, 0x0a}, // RSV - {0x3a00, 0x78}, // AEC System Control 0 - {0x3a0d, 0x10}, // 60 Hz Max Bands in One Frame - {0x3a0e, 0x0d}, // 50 Hz Max Bands in One Frame - {0x3a10, 0x32}, // Stable Range Low Limit (enter) - {0x3a1b, 0x3c}, // Stable Range High Limit (go out) - {0x3a1e, 0x32}, // Stable Range Low Limit (go out) - {0x3a11, 0x80}, // Step Manual Mode, Fast Zone High Limit - {0x3a1f, 0x20}, // Step Manual Mode, Fast Zone Low Limit - {0x3a00, 0x78}, // AEC System Control 0 - {0x460b, 0x35}, // RSV VFIFO Control 0B - {0x471d, 0x00}, // DVP CONTROL 1D - {0x4713, 0x03}, // COMPRESSION MODE SELECT mode3 - {0x471c, 0x50}, // RSV - {0x5682, 0x0a}, // AVG X END - {0x5683, 0x20}, // AVG X END - {0x5686, 0x07}, // AVG Y END - {0x5687, 0x98}, // AVG Y END - {0x5001, 0x4f}, // ISP CONTROL 01, UV adjust/Line stretch/UV average/Color matrix/AWB enable - {0x589b, 0x00}, // RSV - {0x589a, 0xc0}, // RSV - {0x4407, 0x08}, // COMPRESSION CTRL07 Bit[5:0]: Quantization scale 0x02 - {0x589b, 0x00}, // RSV - {0x589a, 0xc0}, // RSV - {0x3002, 0x0c}, // Reset for Individual Block, Reset SFIFO/compression - {0x3002, 0x00}, // Reset for Individual Block - {0x3503, 0x00}, // AEC Manual Mode Control, Auto enable - //{0x3818, 0xa8}, - //{0x3621, 0x17}, - //{0x3801, 0xb0}, - {0x5025, 0x80}, - {0x3a0f, 0x48}, - {0x3a10, 0x40}, - {0x3a1b, 0x4a}, - {0x3a1e, 0x3e}, - {0x3a11, 0x70}, - {0x3a1f, 0x20}, - {0xffff, 0xff}, - + {0x3503 ,0x07}, //AEC Manual Mode Control + {0x3000 ,0x00}, //SYSTEM RESET00 + {0x3001 ,0x00}, //Reset for Individual Block + {0x3002 ,0x00}, //Reset for Individual Block + {0x3003 ,0x00}, //Reset for Individual Block + {0x3005 ,0xff}, //Clock Enable Control + {0x3006 ,0xff}, //Clock Enable Control + {0x3007 ,0x3f}, //Clock Enable Control + {0x350c ,0x07}, //AEC VTS Output high bits + {0x350d ,0xd0}, //AEC VTS Output low bits + {0x3602 ,0xe4}, //Analog Control Registers + {0x3612 ,0xac}, //Analog Control Registers + {0x3613 ,0x44}, //Analog Control Registers + {0x3621 ,0x27}, //Array Control 01 + {0x3622 ,0x08}, //Analog Control Registers + {0x3623 ,0x22}, //Analog Control Registers + {0x3604 ,0x60}, //Analog Control Registers + {0x3705 ,0xda}, //Analog Control Registers + {0x370a ,0x80}, //Analog Control Registers + {0x3801 ,0x8a}, //HS + {0x3803 ,0x0a}, //VS + {0x3804 ,0x0a}, //HW + {0x3805 ,0x20}, //HW + {0x3806 ,0x07}, //VH + {0x3807 ,0x98}, //VH + {0x3808 ,0x0a}, //DVPHO + {0x3809 ,0x20}, //DVPHO + {0x380a ,0x07}, //DVPVO + {0x380b ,0x98}, //DVPVO + {0x380c ,0x0c}, //HTS + {0x380d ,0x80}, //HTS + {0x380e ,0x07}, //VTS + {0x380f ,0xd0}, //VTS + {0x3810 ,0xc2}, + {0x3815 ,0x44}, + {0x3818 ,0xc8}, //Mirror NO, Compression enable + {0x3824 ,0x01}, //RSV + {0x3827 ,0x0a}, //RSV + {0x3a00 ,0x78}, //AEC System Control 0 + {0x3a0d ,0x10}, //60 Hz Max Bands in One Frame + {0x3a0e ,0x0d}, //50 Hz Max Bands in One Frame + {0x3a10 ,0x32}, //Stable Range Low Limit (enter) + {0x3a1b ,0x3c}, //Stable Range High Limit (go out) + {0x3a1e ,0x32}, //Stable Range Low Limit (go out) + {0x3a11 ,0x80}, //Step Manual Mode, Fast Zone High Limit + {0x3a1f ,0x20}, //Step Manual Mode, Fast Zone Low Limit + {0x3a00 ,0x78}, //AEC System Control 0 + {0x460b ,0x35}, //RSV VFIFO Control 0B + {0x471d ,0x00}, //DVP CONTROL 1D + {0x4713 ,0x03}, //COMPRESSION MODE SELECT mode3 + {0x471c ,0x50}, //RSV + {0x5682 ,0x0a}, //AVG X END + {0x5683 ,0x20}, //AVG X END + {0x5686 ,0x07}, //AVG Y END + {0x5687 ,0x98}, //AVG Y END + {0x5001 ,0x4f}, //ISP CONTROL 01, UV adjust/Line stretch/UV average/Color matrix/AWB enable + {0x589b ,0x00}, //RSV + {0x589a ,0xc0}, //RSV + {0x4407 ,0x08}, //COMPRESSION CTRL07 Bit[5:0]: Quantization scale 0x02 + {0x589b ,0x00}, //RSV + {0x589a ,0xc0}, //RSV + {0x3002 ,0x0c}, //Reset for Individual Block, Reset SFIFO/compression + {0x3002 ,0x00}, //Reset for Individual Block + {0x3503 ,0x00}, //AEC Manual Mode Control, Auto enable + //{0x3818, 0xa8}, + //{0x3621, 0x17}, + //{0x3801, 0xb0}, + {0x5025, 0x80}, + {0x3a0f, 0x48}, + {0x3a10, 0x40}, + {0x3a1b, 0x4a}, + {0x3a1e, 0x3e}, + {0x3a11, 0x70}, + {0x3a1f, 0x20}, + {0xffff, 0xff}, }; static const struct sensor_reg OV5642_1080P_Video_setting[] = diff --git a/Firmware/Core/Inc/main.h b/Firmware/Core/Inc/main.h index 20ed300..8c0ed7e 100644 --- a/Firmware/Core/Inc/main.h +++ b/Firmware/Core/Inc/main.h @@ -86,7 +86,7 @@ void Error_Handler(void); #define LD3_GPIO_Port GPIOB /* USER CODE BEGIN Private defines */ -#define CDC_BUFF_SIZE 10048 +#define CDC_BUFF_SIZE 12800 #define CDC_FRAME_SIZE 64 #define CDC_FRAME_DELAY 1 /* USER CODE END Private defines */ diff --git a/Firmware/Core/Src/main.c b/Firmware/Core/Src/main.c index f4ba136..55f3b20 100644 --- a/Firmware/Core/Src/main.c +++ b/Firmware/Core/Src/main.c @@ -73,151 +73,7 @@ static void MX_USB_PCD_Init(void); /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ -/* -static unsigned frame_num = 0; -static unsigned tx_busy = 0; -static unsigned interval_ms = 1000 / FRAME_RATE; - -static struct { - uint32_t size; - uint8_t const *buffer; -} const frames[] = { - {color_bar_0_jpg_len, color_bar_0_jpg}, - {color_bar_1_jpg_len, color_bar_1_jpg}, - {color_bar_2_jpg_len, color_bar_2_jpg}, - {color_bar_3_jpg_len, color_bar_3_jpg}, - {color_bar_4_jpg_len, color_bar_4_jpg}, - {color_bar_5_jpg_len, color_bar_5_jpg}, - {color_bar_6_jpg_len, color_bar_6_jpg}, - {color_bar_7_jpg_len, color_bar_7_jpg}, -}; - -*/ -/* -void cdc_task(void) -{ - // connected() check for DTR bit - // Most but not all terminal client set this when making connection - // if ( tud_cdc_connected() ) - { - // connected and there are data available - if (tud_cdc_available()) - { - - // read data - char buf[64]; - uint32_t count = tud_cdc_read(buf, sizeof(buf)); - (void)count; - - //char buf_2[10] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9'}; - //uint32_t count_2 = 10; - // Echo back - // Note: Skip echo by commenting out write() and write_flush() - // for throughput test e.g - // $ dd if=/dev/zero of=/dev/ttyACM0 count=10000 - tud_cdc_write(buf, count); - //tud_cdc_n_write(10, buf_2, count_2); - tud_cdc_write_flush(); - } - } -} -*/ - -uint8_t sendT[700] = { - 0xff, 0xd8, 0xff, 0xdb, 0x00, 0x43, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xdb, 0x00, 0x43, 0x01, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc0, 0x00, 0x11, - 0x08, 0x00, 0x60, 0x00, 0x80, 0x03, 0x01, 0x21, 0x00, 0x02, 0x11, 0x01, 0x03, 0x11, 0x01, 0xff, - 0xda, 0x00, 0x0c, 0x03, 0x01, 0x00, 0x02, 0x11, 0x03, 0x11, 0x00, 0x3f, 0x00, 0x92, 0x8a, 0x00, - 0x4a, 0x2b, 0x31, 0x89, 0x45, 0x6a, 0x64, 0x25, 0x15, 0x98, 0xc6, 0xd1, 0x5b, 0x1b, 0x09, 0x45, - 0x66, 0x31, 0x28, 0xad, 0x4c, 0x84, 0xa2, 0xb3, 0x19, 0x62, 0x8a, 0x00, 0x4a, 0x2b, 0x31, 0x89, - 0x45, 0x6a, 0x64, 0x25, 0x15, 0x98, 0xc6, 0xd1, 0x5b, 0x1b, 0x09, 0x45, 0x66, 0x31, 0x28, 0xad, - 0x4c, 0x84, 0xa2, 0xb3, 0x19, 0x62, 0x8a, 0x00, 0x4a, 0x2b, 0x31, 0x89, 0x45, 0x6a, 0x64, 0x25, - 0x15, 0x98, 0xc6, 0xd1, 0x5b, 0x1b, 0x09, 0x45, 0x66, 0x31, 0x28, 0xad, 0x4c, 0x84, 0xa2, 0xb3, - 0x19, 0x62, 0x8a, 0x00, 0x4a, 0x2b, 0x31, 0x89, 0x45, 0x6a, 0x64, 0x25, 0x15, 0x98, 0xc6, 0xd1, - 0x5b, 0x1b, 0x09, 0x45, 0x66, 0x31, 0x28, 0xad, 0x4c, 0x84, 0xa2, 0xb3, 0x19, 0x62, 0x8a, 0x00, - 0x4a, 0x2b, 0x31, 0x89, 0x45, 0x6a, 0x64, 0x25, 0x15, 0x98, 0xc6, 0xd1, 0x5b, 0x1b, 0x09, 0x45, - 0x66, 0x31, 0x28, 0xad, 0x4c, 0x84, 0xa2, 0xb3, 0x19, 0x62, 0x8a, 0x00, 0x4a, 0x2b, 0x31, 0x89, - 0x45, 0x6a, 0x64, 0x25, 0x15, 0x98, 0xc6, 0xd1, 0x5b, 0x1b, 0x09, 0x45, 0x66, 0x31, 0x28, 0xad, - 0x4c, 0x84, 0xa2, 0xb3, 0x19, 0x62, 0x8a, 0x00, 0x4a, 0x2b, 0x31, 0x89, 0x45, 0x6a, 0x64, 0x25, - 0x15, 0x98, 0xc6, 0xd1, 0x5b, 0x1b, 0x09, 0x45, 0x66, 0x31, 0x28, 0xad, 0x4c, 0x84, 0xa2, 0xb3, - 0x19, 0x62, 0x8a, 0x00, 0x4a, 0x2b, 0x31, 0x89, 0x45, 0x6a, 0x64, 0x25, 0x15, 0x98, 0xc6, 0xd1, - 0x5b, 0x1b, 0x09, 0x45, 0x66, 0x31, 0x28, 0xad, 0x4c, 0x84, 0xa2, 0xb3, 0x19, 0x62, 0x8a, 0x00, - 0x4a, 0x2b, 0x31, 0x89, 0x45, 0x6a, 0x64, 0x25, 0x15, 0x98, 0xc6, 0xd1, 0x5b, 0x1b, 0x09, 0x45, - 0x66, 0x31, 0x28, 0xad, 0x4c, 0x84, 0xa2, 0xb3, 0x19, 0x62, 0x8a, 0x00, 0x4a, 0x2b, 0x31, 0x89, - 0x45, 0x6a, 0x64, 0x25, 0x15, 0x98, 0xc6, 0xd1, 0x5b, 0x1b, 0x09, 0x45, 0x66, 0x31, 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tud_cdc_write(&color_bar_3_jpg[currentIdx], 10); - break; - case 4: - tud_cdc_write(&color_bar_4_jpg[currentIdx], 10); - break; - case 5: - tud_cdc_write(&color_bar_5_jpg[currentIdx], 10); - break; - case 6: - tud_cdc_write(&color_bar_6_jpg[currentIdx], 10); - break; - case 7: - tud_cdc_write(&color_bar_7_jpg[currentIdx], 10); - break; - default: - break; - } - //tud_cdc_write(&sendT[currentIdx], 10); - tud_cdc_write_flush(); - currentIdx = currentIdx + 10; - return 1; -} -*/ void SysTick_Init(void) { SysTick_Config(SystemCoreClock / 10000); // Set SysTick interrupt to occur every 100us @@ -311,8 +167,9 @@ int main(void) tud_task(); - Cam_Refresh(&hi2c1, &hspi1); - + //Cam_Refresh(&hi2c1, &hspi1); + //Cam_Init(&hi2c1, &hspi1); + tud_task(); Cam_Capture(&hspi1); @@ -326,7 +183,6 @@ int main(void) continue; - //HAL_SPI_Receive(&hspi1, cdc_buff, CDC_BUFF_SIZE, HAL_MAX_DELAY); } else { int number_to_read = 0; @@ -346,13 +202,19 @@ int main(void) int current_sending_idx = 0; do{ tud_task(); - tud_cdc_write(&cdc_buff[current_sending_idx], CDC_FRAME_SIZE); - current_sending_idx = current_sending_idx + CDC_FRAME_SIZE; - last_sent_idx = last_sent_idx + CDC_FRAME_SIZE; + int sendLen = CDC_FRAME_SIZE; + if(last_sent_idx + CDC_FRAME_SIZE > buff_stop_idx){ + sendLen = buff_stop_idx - last_sent_idx; + } + + tud_cdc_write(&cdc_buff[current_sending_idx], sendLen); + current_sending_idx = current_sending_idx + sendLen; + last_sent_idx = last_sent_idx + sendLen; + tud_cdc_write_flush(); //Delay between sends int i = 0; - for(;i<4000;i++); + for(;i<7000;i++); } while(last_sent_idx < buff_stop_idx);